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1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py2; RUN: llc < %s -mtriple=aarch64-none-linux-gnu -mattr=+neon | FileCheck %s3 4; Check that pmull2 instruction is used for vmull_high_p8 intrinsic5; even if shufflevector instructions are located in different basic blocks,6; which can happen when vmull_high_p8 is used inside a loop body.7;8 9define <8 x i16> @test_pmull2_sink(<16 x i8> %a, <16 x i8> %b, <8 x i16> %c, i1 %t) {10; CHECK-LABEL: test_pmull2_sink:11; CHECK:       // %bb.0: // %entry12; CHECK-NEXT:    tbz w0, #0, .LBB0_213; CHECK-NEXT:  // %bb.1: // %if.then14; CHECK-NEXT:    pmull2 v0.8h, v0.16b, v1.16b15; CHECK-NEXT:    ret16; CHECK-NEXT:  .LBB0_2: // %cleanup17; CHECK-NEXT:    mov v0.16b, v2.16b18; CHECK-NEXT:    ret19entry:20  %0 = shufflevector <16 x i8> %a, <16 x i8> poison, <8 x i32> <i32 8, i32 9, i32 10, i32 11, i32 12, i32 13, i32 14, i32 15>21  br i1 %t, label %if.then, label %cleanup22 23if.then:24  %1 = shufflevector <16 x i8> %b, <16 x i8> poison, <8 x i32> <i32 8, i32 9, i32 10, i32 11, i32 12, i32 13, i32 14, i32 15>25  %res = tail call <8 x i16> @llvm.aarch64.neon.pmull.v8i16(<8 x i8> %0, <8 x i8> %1)26  br label %cleanup27 28cleanup:29  %retval = phi <8 x i16> [ %res, %if.then ], [ %c, %entry ]30  ret <8 x i16> %retval31}32 33define <8 x i16> @test_pmull2_sink2(<16 x i8> %a, <16 x i8> %b, <8 x i16> %c, i1 %t) {34; CHECK-LABEL: test_pmull2_sink2:35; CHECK:       // %bb.0: // %entry36; CHECK-NEXT:    tbz w0, #0, .LBB1_237; CHECK-NEXT:  // %bb.1: // %if.then38; CHECK-NEXT:    pmull2 v0.8h, v0.16b, v0.16b39; CHECK-NEXT:    ret40; CHECK-NEXT:  .LBB1_2: // %cleanup41; CHECK-NEXT:    mov v0.16b, v2.16b42; CHECK-NEXT:    ret43entry:44  %0 = shufflevector <16 x i8> %a, <16 x i8> poison, <8 x i32> <i32 8, i32 9, i32 10, i32 11, i32 12, i32 13, i32 14, i32 15>45  %1 = shufflevector <16 x i8> %a, <16 x i8> poison, <8 x i32> <i32 8, i32 9, i32 10, i32 11, i32 12, i32 13, i32 14, i32 15>46  br i1 %t, label %if.then, label %cleanup47 48if.then:49  %res = tail call <8 x i16> @llvm.aarch64.neon.pmull.v8i16(<8 x i8> %0, <8 x i8> %1)50  br label %cleanup51 52cleanup:53  %retval = phi <8 x i16> [ %res, %if.then ], [ %c, %entry ]54  ret <8 x i16> %retval55}56 57define <8 x i16> @test_pmull2_sink3(<16 x i8> %a, <16 x i8> %b, <8 x i16> %c, i1 %t, i1 %t2) {58; CHECK-LABEL: test_pmull2_sink3:59; CHECK:       // %bb.0: // %entry60; CHECK-NEXT:    tbz w0, #0, .LBB2_261; CHECK-NEXT:  // %bb.1: // %if.then62; CHECK-NEXT:    tbz w1, #0, .LBB2_363; CHECK-NEXT:  .LBB2_2: // %if.then.264; CHECK-NEXT:    pmull2 v0.8h, v0.16b, v1.16b65; CHECK-NEXT:    ret66; CHECK-NEXT:  .LBB2_3: // %cleanup67; CHECK-NEXT:    pmull2 v0.8h, v0.16b, v0.16b68; CHECK-NEXT:    ret69entry:70  %0 = shufflevector <16 x i8> %a, <16 x i8> poison, <8 x i32> <i32 8, i32 9, i32 10, i32 11, i32 12, i32 13, i32 14, i32 15>71  br i1 %t, label %if.then, label %if.then.272 73if.then:74  %res = tail call <8 x i16> @llvm.aarch64.neon.pmull.v8i16(<8 x i8> %0, <8 x i8> %0)75  br i1 %t2, label %if.then.2, label %cleanup76 77if.then.2:78  %1 = shufflevector <16 x i8> %b, <16 x i8> poison, <8 x i32> <i32 8, i32 9, i32 10, i32 11, i32 12, i32 13, i32 14, i32 15>79  %res2 = tail call <8 x i16> @llvm.aarch64.neon.pmull.v8i16(<8 x i8> %0, <8 x i8> %1)80  br label %cleanup81 82cleanup:83  %retval = phi <8 x i16> [ %res2, %if.then.2 ], [ %res, %if.then ]84  ret <8 x i16> %retval85}86 87declare <8 x i16> @llvm.aarch64.neon.pmull.v8i16(<8 x i8>, <8 x i8>)88