61 lines · plain
1# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py2# RUN: llc -run-pass=aarch64-mi-peephole-opt -o - -mtriple=aarch64-unknown-linux -verify-machineinstrs %s | FileCheck %s3 4---5name: remove_kill_flags6tracksRegLiveness: true7body: |8 bb.0.entry:9 liveins: $w010 ; CHECK-LABEL: name: remove_kill_flags11 ; CHECK: liveins: $w012 ; CHECK-NEXT: {{ $}}13 ; CHECK-NEXT: [[MOVIv2d_ns:%[0-9]+]]:fpr128 = MOVIv2d_ns 014 ; CHECK-NEXT: [[COPY:%[0-9]+]]:fpr64 = COPY [[MOVIv2d_ns]].dsub15 ; CHECK-NEXT: [[UQSHLv8i8_shift:%[0-9]+]]:fpr64 = UQSHLv8i8_shift killed [[COPY]], 116 ; CHECK-NEXT: [[SUBREG_TO_REG:%[0-9]+]]:fpr128 = SUBREG_TO_REG 0, [[UQSHLv8i8_shift]], %subreg.dsub17 ; CHECK-NEXT: [[TBLv8i8One:%[0-9]+]]:fpr64 = TBLv8i8One killed [[SUBREG_TO_REG]], [[UQSHLv8i8_shift]]18 ; CHECK-NEXT: [[DEF:%[0-9]+]]:fpr128 = IMPLICIT_DEF19 ; CHECK-NEXT: [[INSERT_SUBREG:%[0-9]+]]:fpr128 = INSERT_SUBREG [[DEF]], [[UQSHLv8i8_shift]], %subreg.dsub20 ; CHECK-NEXT: RET_ReallyLR implicit $w021 %0:fpr128 = MOVIv2d_ns 022 %1:fpr64 = COPY %0.dsub:fpr12823 %2:fpr64 = UQSHLv8i8_shift killed %1:fpr64, 124 %3:fpr64 = FMOVDr %2:fpr6425 %4:fpr128 = SUBREG_TO_REG 0, killed %3:fpr64, %subreg.dsub26 %5:fpr64 = TBLv8i8One killed %4:fpr128, %2:fpr6427 %7:fpr128 = IMPLICIT_DEF28 %6:fpr128 = INSERT_SUBREG %7:fpr128, killed %2:fpr64, %subreg.dsub29 RET_ReallyLR implicit $w030...31---32name: remove_kill_flags233tracksRegLiveness: true34body: |35 bb.0.entry:36 liveins: $w037 ; CHECK-LABEL: name: remove_kill_flags238 ; CHECK: liveins: $w039 ; CHECK-NEXT: {{ $}}40 ; CHECK-NEXT: [[MOVIv2d_ns:%[0-9]+]]:fpr128 = MOVIv2d_ns 041 ; CHECK-NEXT: [[COPY:%[0-9]+]]:fpr64 = COPY [[MOVIv2d_ns]].dsub42 ; CHECK-NEXT: [[UQSHLv8i8_shift:%[0-9]+]]:fpr64 = UQSHLv8i8_shift killed [[COPY]], 143 ; CHECK-NEXT: [[SUBREG_TO_REG:%[0-9]+]]:fpr128 = SUBREG_TO_REG 0, [[UQSHLv8i8_shift]], %subreg.dsub44 ; CHECK-NEXT: [[DEF:%[0-9]+]]:fpr128 = IMPLICIT_DEF45 ; CHECK-NEXT: [[INSERT_SUBREG:%[0-9]+]]:fpr128 = INSERT_SUBREG [[DEF]], [[UQSHLv8i8_shift]], %subreg.dsub46 ; CHECK-NEXT: [[DEF1:%[0-9]+]]:fpr128 = IMPLICIT_DEF47 ; CHECK-NEXT: [[INSERT_SUBREG1:%[0-9]+]]:fpr128 = INSERT_SUBREG [[DEF1]], [[UQSHLv8i8_shift]], %subreg.dsub48 ; CHECK-NEXT: RET_ReallyLR implicit $w049 %0:fpr128 = MOVIv2d_ns 050 %1:fpr64 = COPY %0.dsub:fpr12851 %2:fpr64 = UQSHLv8i8_shift killed %1:fpr64, 152 %3:fpr64 = FMOVDr %2:fpr6453 %4:fpr128 = SUBREG_TO_REG 0, %3:fpr64, %subreg.dsub54 %7:fpr128 = IMPLICIT_DEF55 %6:fpr128 = INSERT_SUBREG %7:fpr128, killed %2:fpr64, %subreg.dsub56 %9:fpr128 = IMPLICIT_DEF57 %8:fpr128 = INSERT_SUBREG %9:fpr128, killed %3:fpr64, %subreg.dsub58 RET_ReallyLR implicit $w059...60 61