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1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 62; RUN: llc < %s | FileCheck %s3 4target triple = "aarch64-unknown-linux-gnu"5 6define i32 @vmask_popcount_i32_v8i8(<8 x i8> %a, <8 x i8> %b) {7; CHECK-LABEL: vmask_popcount_i32_v8i8:8; CHECK: // %bb.0:9; CHECK-NEXT: cmgt v0.8b, v1.8b, v0.8b10; CHECK-NEXT: sshll v0.8h, v0.8b, #011; CHECK-NEXT: saddlv s0, v0.8h12; CHECK-NEXT: fmov w8, s013; CHECK-NEXT: neg w0, w814; CHECK-NEXT: ret15 %mask = icmp slt <8 x i8> %a, %b16 %t1 = bitcast <8 x i1> %mask to i817 %t2 = call i8 @llvm.ctpop(i8 %t1)18 %t3 = zext i8 %t2 to i3219 ret i32 %t320}21 22define i32 @vmask_popcount_i32_v16i8(<16 x i8> %a, <16 x i8> %b) {23; CHECK-LABEL: vmask_popcount_i32_v16i8:24; CHECK: // %bb.0:25; CHECK-NEXT: cmgt v0.16b, v1.16b, v0.16b26; CHECK-NEXT: sshll2 v1.8h, v0.16b, #027; CHECK-NEXT: sshll v0.8h, v0.8b, #028; CHECK-NEXT: saddl2 v2.4s, v0.8h, v1.8h29; CHECK-NEXT: saddl v0.4s, v0.4h, v1.4h30; CHECK-NEXT: add v0.4s, v0.4s, v2.4s31; CHECK-NEXT: addv s0, v0.4s32; CHECK-NEXT: fmov w8, s033; CHECK-NEXT: neg w0, w834; CHECK-NEXT: ret35 %mask = icmp slt <16 x i8> %a, %b36 %t1 = bitcast <16 x i1> %mask to i1637 %t2 = call i16 @llvm.ctpop(i16 %t1)38 %t3 = zext i16 %t2 to i3239 ret i32 %t340}41 42define i32 @vmask_popcount_i32_v4i16(<4 x i16> %a, <4 x i16> %b) {43; CHECK-LABEL: vmask_popcount_i32_v4i16:44; CHECK: // %bb.0:45; CHECK-NEXT: cmgt v0.4h, v1.4h, v0.4h46; CHECK-NEXT: saddlv s0, v0.4h47; CHECK-NEXT: fmov w8, s048; CHECK-NEXT: neg w0, w849; CHECK-NEXT: ret50 %mask = icmp slt <4 x i16> %a, %b51 %t1 = bitcast <4 x i1> %mask to i452 %t2 = call i4 @llvm.ctpop(i4 %t1)53 %t3 = zext i4 %t2 to i3254 ret i32 %t355}56 57define i32 @vmask_popcount_i32_v8i16(<8 x i16> %a, <8 x i16> %b) {58; CHECK-LABEL: vmask_popcount_i32_v8i16:59; CHECK: // %bb.0:60; CHECK-NEXT: cmgt v0.8h, v1.8h, v0.8h61; CHECK-NEXT: saddlv s0, v0.8h62; CHECK-NEXT: fmov w8, s063; CHECK-NEXT: neg w0, w864; CHECK-NEXT: ret65 %mask = icmp slt <8 x i16> %a, %b66 %t1 = bitcast <8 x i1> %mask to i867 %t2 = call i8 @llvm.ctpop(i8 %t1)68 %t3 = zext i8 %t2 to i3269 ret i32 %t370}71 72define i32 @vmask_popcount_i32_v2i32(<2 x i32> %a, <2 x i32> %b) {73; CHECK-LABEL: vmask_popcount_i32_v2i32:74; CHECK: // %bb.0:75; CHECK-NEXT: cmgt v0.2s, v1.2s, v0.2s76; CHECK-NEXT: addp v0.2s, v0.2s, v0.2s77; CHECK-NEXT: fmov w8, s078; CHECK-NEXT: neg w0, w879; CHECK-NEXT: ret80 %mask = icmp slt <2 x i32> %a, %b81 %t1 = bitcast <2 x i1> %mask to i282 %t2 = call i2 @llvm.ctpop(i2 %t1)83 %t3 = zext i2 %t2 to i3284 ret i32 %t385}86 87define i32 @vmask_popcount_i32_v4i32(<4 x i32> %a, <4 x i32> %b) {88; CHECK-LABEL: vmask_popcount_i32_v4i32:89; CHECK: // %bb.0:90; CHECK-NEXT: cmgt v0.4s, v1.4s, v0.4s91; CHECK-NEXT: addv s0, v0.4s92; CHECK-NEXT: fmov w8, s093; CHECK-NEXT: neg w0, w894; CHECK-NEXT: ret95 %mask = icmp slt <4 x i32> %a, %b96 %t1 = bitcast <4 x i1> %mask to i497 %t2 = call i4 @llvm.ctpop(i4 %t1)98 %t3 = zext i4 %t2 to i3299 ret i32 %t3100}101 102define i32 @vmask_popcount_i32_v1i64(<1 x i64> %a, <1 x i64> %b) {103; CHECK-LABEL: vmask_popcount_i32_v1i64:104; CHECK: // %bb.0:105; CHECK-NEXT: // kill: def $d1 killed $d1 def $q1106; CHECK-NEXT: // kill: def $d0 killed $d0 def $q0107; CHECK-NEXT: fmov x8, d1108; CHECK-NEXT: fmov x9, d0109; CHECK-NEXT: cmp x9, x8110; CHECK-NEXT: cset w0, lt111; CHECK-NEXT: ret112 %mask = icmp slt <1 x i64> %a, %b113 %t1 = bitcast <1 x i1> %mask to i1114 %t2 = call i1 @llvm.ctpop(i1 %t1)115 %t3 = zext i1 %t2 to i32116 ret i32 %t3117}118 119define i32 @vmask_popcount_i32_v2i64(<2 x i64> %a, <2 x i64> %b) {120; CHECK-LABEL: vmask_popcount_i32_v2i64:121; CHECK: // %bb.0:122; CHECK-NEXT: cmgt v0.2d, v1.2d, v0.2d123; CHECK-NEXT: xtn v0.2s, v0.2d124; CHECK-NEXT: addp v0.2s, v0.2s, v0.2s125; CHECK-NEXT: fmov w8, s0126; CHECK-NEXT: neg w0, w8127; CHECK-NEXT: ret128 %mask = icmp slt <2 x i64> %a, %b129 %t1 = bitcast <2 x i1> %mask to i2130 %t2 = call i2 @llvm.ctpop(i2 %t1)131 %t3 = zext i2 %t2 to i32132 ret i32 %t3133}134 135define i64 @vmask_popcount_i64_v8i8(<8 x i8> %a, <8 x i8> %b) {136; CHECK-LABEL: vmask_popcount_i64_v8i8:137; CHECK: // %bb.0:138; CHECK-NEXT: cmgt v0.8b, v1.8b, v0.8b139; CHECK-NEXT: sshll v0.8h, v0.8b, #0140; CHECK-NEXT: saddlv s0, v0.8h141; CHECK-NEXT: fmov w8, s0142; CHECK-NEXT: neg w0, w8143; CHECK-NEXT: ret144 %mask = icmp slt <8 x i8> %a, %b145 %t1 = bitcast <8 x i1> %mask to i8146 %t2 = call i8 @llvm.ctpop(i8 %t1)147 %t3 = zext i8 %t2 to i64148 ret i64 %t3149}150 151define i64 @vmask_popcount_i64_v16i8(<16 x i8> %a, <16 x i8> %b) {152; CHECK-LABEL: vmask_popcount_i64_v16i8:153; CHECK: // %bb.0:154; CHECK-NEXT: cmgt v0.16b, v1.16b, v0.16b155; CHECK-NEXT: sshll2 v1.8h, v0.16b, #0156; CHECK-NEXT: sshll v0.8h, v0.8b, #0157; CHECK-NEXT: saddl2 v2.4s, v0.8h, v1.8h158; CHECK-NEXT: saddl v0.4s, v0.4h, v1.4h159; CHECK-NEXT: add v0.4s, v0.4s, v2.4s160; CHECK-NEXT: addv s0, v0.4s161; CHECK-NEXT: fmov w8, s0162; CHECK-NEXT: neg w0, w8163; CHECK-NEXT: ret164 %mask = icmp slt <16 x i8> %a, %b165 %t1 = bitcast <16 x i1> %mask to i16166 %t2 = call i16 @llvm.ctpop(i16 %t1)167 %t3 = zext i16 %t2 to i64168 ret i64 %t3169}170 171define i64 @vmask_popcount_i64_v4i16(<4 x i16> %a, <4 x i16> %b) {172; CHECK-LABEL: vmask_popcount_i64_v4i16:173; CHECK: // %bb.0:174; CHECK-NEXT: cmgt v0.4h, v1.4h, v0.4h175; CHECK-NEXT: saddlv s0, v0.4h176; CHECK-NEXT: fmov w8, s0177; CHECK-NEXT: neg w0, w8178; CHECK-NEXT: ret179 %mask = icmp slt <4 x i16> %a, %b180 %t1 = bitcast <4 x i1> %mask to i4181 %t2 = call i4 @llvm.ctpop(i4 %t1)182 %t3 = zext i4 %t2 to i64183 ret i64 %t3184}185 186define i64 @vmask_popcount_i64_v8i16(<8 x i16> %a, <8 x i16> %b) {187; CHECK-LABEL: vmask_popcount_i64_v8i16:188; CHECK: // %bb.0:189; CHECK-NEXT: cmgt v0.8h, v1.8h, v0.8h190; CHECK-NEXT: saddlv s0, v0.8h191; CHECK-NEXT: fmov w8, s0192; CHECK-NEXT: neg w0, w8193; CHECK-NEXT: ret194 %mask = icmp slt <8 x i16> %a, %b195 %t1 = bitcast <8 x i1> %mask to i8196 %t2 = call i8 @llvm.ctpop(i8 %t1)197 %t3 = zext i8 %t2 to i64198 ret i64 %t3199}200 201define i64 @vmask_popcount_i64_v2i32(<2 x i32> %a, <2 x i32> %b) {202; CHECK-LABEL: vmask_popcount_i64_v2i32:203; CHECK: // %bb.0:204; CHECK-NEXT: cmgt v0.2s, v1.2s, v0.2s205; CHECK-NEXT: addp v0.2s, v0.2s, v0.2s206; CHECK-NEXT: fmov w8, s0207; CHECK-NEXT: neg w0, w8208; CHECK-NEXT: ret209 %mask = icmp slt <2 x i32> %a, %b210 %t1 = bitcast <2 x i1> %mask to i2211 %t2 = call i2 @llvm.ctpop(i2 %t1)212 %t3 = zext i2 %t2 to i64213 ret i64 %t3214}215 216define i64 @vmask_popcount_i64_v4i32(<4 x i32> %a, <4 x i32> %b) {217; CHECK-LABEL: vmask_popcount_i64_v4i32:218; CHECK: // %bb.0:219; CHECK-NEXT: cmgt v0.4s, v1.4s, v0.4s220; CHECK-NEXT: addv s0, v0.4s221; CHECK-NEXT: fmov w8, s0222; CHECK-NEXT: neg w0, w8223; CHECK-NEXT: ret224 %mask = icmp slt <4 x i32> %a, %b225 %t1 = bitcast <4 x i1> %mask to i4226 %t2 = call i4 @llvm.ctpop(i4 %t1)227 %t3 = zext i4 %t2 to i64228 ret i64 %t3229}230 231define i64 @vmask_popcount_i64_v1i64(<1 x i64> %a, <1 x i64> %b) {232; CHECK-LABEL: vmask_popcount_i64_v1i64:233; CHECK: // %bb.0:234; CHECK-NEXT: // kill: def $d1 killed $d1 def $q1235; CHECK-NEXT: // kill: def $d0 killed $d0 def $q0236; CHECK-NEXT: fmov x8, d1237; CHECK-NEXT: fmov x9, d0238; CHECK-NEXT: cmp x9, x8239; CHECK-NEXT: cset w0, lt240; CHECK-NEXT: ret241 %mask = icmp slt <1 x i64> %a, %b242 %t1 = bitcast <1 x i1> %mask to i1243 %t2 = call i1 @llvm.ctpop(i1 %t1)244 %t3 = zext i1 %t2 to i64245 ret i64 %t3246}247 248define i64 @vmask_popcount_i64_v2i64(<2 x i64> %a, <2 x i64> %b) {249; CHECK-LABEL: vmask_popcount_i64_v2i64:250; CHECK: // %bb.0:251; CHECK-NEXT: cmgt v0.2d, v1.2d, v0.2d252; CHECK-NEXT: xtn v0.2s, v0.2d253; CHECK-NEXT: addp v0.2s, v0.2s, v0.2s254; CHECK-NEXT: fmov w8, s0255; CHECK-NEXT: neg w0, w8256; CHECK-NEXT: ret257 %mask = icmp slt <2 x i64> %a, %b258 %t1 = bitcast <2 x i1> %mask to i2259 %t2 = call i2 @llvm.ctpop(i2 %t1)260 %t3 = zext i2 %t2 to i64261 ret i64 %t3262}263 264define i32 @non_vmask_popcount_1(half %a) {265; CHECK-LABEL: non_vmask_popcount_1:266; CHECK: // %bb.0:267; CHECK-NEXT: // kill: def $h0 killed $h0 def $s0268; CHECK-NEXT: fmov w8, s0269; CHECK-NEXT: and w8, w8, #0xffff270; CHECK-NEXT: fmov s0, w8271; CHECK-NEXT: cnt v0.8b, v0.8b272; CHECK-NEXT: addv b0, v0.8b273; CHECK-NEXT: fmov w0, s0274; CHECK-NEXT: ret275 %t1 = bitcast half %a to i16276 %t2 = call i16 @llvm.ctpop(i16 %t1)277 %t3 = zext i16 %t2 to i32278 ret i32 %t3279}280 281define i32 @non_vmask_popcount_2(<8 x i16> %a) {282; CHECK-LABEL: non_vmask_popcount_2:283; CHECK: // %bb.0:284; CHECK-NEXT: sub sp, sp, #16285; CHECK-NEXT: .cfi_def_cfa_offset 16286; CHECK-NEXT: xtn v0.8b, v0.8h287; CHECK-NEXT: umov w8, v0.b[0]288; CHECK-NEXT: umov w9, v0.b[1]289; CHECK-NEXT: umov w10, v0.b[2]290; CHECK-NEXT: and w8, w8, #0x3291; CHECK-NEXT: bfi w8, w9, #2, #2292; CHECK-NEXT: umov w9, v0.b[3]293; CHECK-NEXT: bfi w8, w10, #4, #2294; CHECK-NEXT: umov w10, v0.b[4]295; CHECK-NEXT: bfi w8, w9, #6, #2296; CHECK-NEXT: umov w9, v0.b[5]297; CHECK-NEXT: bfi w8, w10, #8, #2298; CHECK-NEXT: umov w10, v0.b[6]299; CHECK-NEXT: bfi w8, w9, #10, #2300; CHECK-NEXT: umov w9, v0.b[7]301; CHECK-NEXT: bfi w8, w10, #12, #2302; CHECK-NEXT: orr w8, w8, w9, lsl #14303; CHECK-NEXT: and w8, w8, #0xffff304; CHECK-NEXT: fmov s0, w8305; CHECK-NEXT: cnt v0.8b, v0.8b306; CHECK-NEXT: addv b0, v0.8b307; CHECK-NEXT: fmov w0, s0308; CHECK-NEXT: add sp, sp, #16309; CHECK-NEXT: ret310 %mask = trunc <8 x i16> %a to <8 x i2>311 %t1 = bitcast <8 x i2> %mask to i16312 %t2 = call i16 @llvm.ctpop(i16 %t1)313 %t3 = zext i16 %t2 to i32314 ret i32 %t3315}316