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1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 52; RUN: llc -mtriple=aarch64 < %s | FileCheck %s3 4%va_list = type { ptr, ptr, ptr, i32, i32 }5 6define preserve_nonecc i32 @callee(i32 %a1, i32 %a2, i32 %a3, i32 %a4, i32 %a5, ...) nounwind noinline ssp {7; CHECK-LABEL: callee:8; CHECK: // %bb.0: // %entry9; CHECK-NEXT: sub sp, sp, #19210; CHECK-NEXT: mov x8, #-24 // =0xffffffffffffffe811; CHECK-NEXT: mov x9, sp12; CHECK-NEXT: add x10, sp, #13613; CHECK-NEXT: movk x8, #65408, lsl #3214; CHECK-NEXT: add x9, x9, #12815; CHECK-NEXT: stp x6, x7, [sp, #144]16; CHECK-NEXT: stp x9, x8, [sp, #176]17; CHECK-NEXT: add x9, x10, #2418; CHECK-NEXT: add x10, sp, #19219; CHECK-NEXT: mov w8, #-24 // =0xffffffe820; CHECK-NEXT: str x5, [sp, #136]21; CHECK-NEXT: stp q0, q1, [sp]22; CHECK-NEXT: stp q2, q3, [sp, #32]23; CHECK-NEXT: stp q4, q5, [sp, #64]24; CHECK-NEXT: stp q6, q7, [sp, #96]25; CHECK-NEXT: stp x10, x9, [sp, #160]26; CHECK-NEXT: tbz w8, #31, .LBB0_327; CHECK-NEXT: // %bb.1: // %maybe_reg28; CHECK-NEXT: add w9, w8, #829; CHECK-NEXT: cmp w9, #030; CHECK-NEXT: str w9, [sp, #184]31; CHECK-NEXT: b.gt .LBB0_332; CHECK-NEXT: // %bb.2: // %in_reg33; CHECK-NEXT: ldr x9, [sp, #168]34; CHECK-NEXT: add x8, x9, w8, sxtw35; CHECK-NEXT: b .LBB0_436; CHECK-NEXT: .LBB0_3: // %on_stack37; CHECK-NEXT: ldr x8, [sp, #160]38; CHECK-NEXT: add x9, x8, #839; CHECK-NEXT: str x9, [sp, #160]40; CHECK-NEXT: .LBB0_4: // %end41; CHECK-NEXT: ldr w0, [x8]42; CHECK-NEXT: add sp, sp, #19243; CHECK-NEXT: ret44entry:45 %args = alloca %va_list, align 846 call void @llvm.va_start(ptr %args)47 %gr_offs_p = getelementptr inbounds %va_list, ptr %args, i32 0, i32 348 %gr_offs = load i32, ptr %gr_offs_p, align 849 %0 = icmp sge i32 %gr_offs, 050 br i1 %0, label %on_stack, label %maybe_reg51 52maybe_reg:53 %new_reg_offs = add i32 %gr_offs, 854 store i32 %new_reg_offs, ptr %gr_offs_p, align 855 %inreg = icmp sle i32 %new_reg_offs, 056 br i1 %inreg, label %in_reg, label %on_stack57 58in_reg:59 %reg_top_p = getelementptr inbounds %va_list, ptr %args, i32 0, i32 160 %reg_top = load ptr, ptr %reg_top_p, align 861 %reg = getelementptr inbounds i8, ptr %reg_top, i32 %gr_offs62 br label %end63 64on_stack:65 %stack_p = getelementptr inbounds %va_list, ptr %args, i32 0, i32 066 %stack = load ptr, ptr %stack_p, align 867 %new_stack = getelementptr inbounds i8, ptr %stack, i64 868 store ptr %new_stack, ptr %stack_p, align 869 br label %end70 71end:72 %p = phi ptr [ %reg, %in_reg ], [ %stack, %on_stack ]73 %10 = load i32, ptr %p, align 874 call void @llvm.va_end.p0(ptr %args)75 ret i32 %1076}77 78declare void @llvm.va_start(ptr) nounwind79declare void @llvm.va_end(ptr) nounwind80 81define i32 @caller() nounwind ssp {82; CHECK-LABEL: caller:83; CHECK: // %bb.0:84; CHECK-NEXT: sub sp, sp, #17685; CHECK-NEXT: mov w8, #10 // =0xa86; CHECK-NEXT: mov w9, #9 // =0x987; CHECK-NEXT: mov w0, #1 // =0x188; CHECK-NEXT: mov w1, #2 // =0x289; CHECK-NEXT: mov w2, #3 // =0x390; CHECK-NEXT: mov w3, #4 // =0x491; CHECK-NEXT: mov w4, #5 // =0x592; CHECK-NEXT: mov w5, #6 // =0x693; CHECK-NEXT: mov w6, #7 // =0x794; CHECK-NEXT: mov w7, #8 // =0x895; CHECK-NEXT: stp d15, d14, [sp, #16] // 16-byte Folded Spill96; CHECK-NEXT: stp d13, d12, [sp, #32] // 16-byte Folded Spill97; CHECK-NEXT: stp d11, d10, [sp, #48] // 16-byte Folded Spill98; CHECK-NEXT: stp d9, d8, [sp, #64] // 16-byte Folded Spill99; CHECK-NEXT: str x30, [sp, #80] // 8-byte Spill100; CHECK-NEXT: stp x28, x27, [sp, #96] // 16-byte Folded Spill101; CHECK-NEXT: stp x26, x25, [sp, #112] // 16-byte Folded Spill102; CHECK-NEXT: stp x24, x23, [sp, #128] // 16-byte Folded Spill103; CHECK-NEXT: stp x22, x21, [sp, #144] // 16-byte Folded Spill104; CHECK-NEXT: stp x20, x19, [sp, #160] // 16-byte Folded Spill105; CHECK-NEXT: str w8, [sp, #8]106; CHECK-NEXT: str w9, [sp]107; CHECK-NEXT: bl callee108; CHECK-NEXT: ldp x20, x19, [sp, #160] // 16-byte Folded Reload109; CHECK-NEXT: ldr x30, [sp, #80] // 8-byte Reload110; CHECK-NEXT: ldp x22, x21, [sp, #144] // 16-byte Folded Reload111; CHECK-NEXT: ldp x24, x23, [sp, #128] // 16-byte Folded Reload112; CHECK-NEXT: ldp x26, x25, [sp, #112] // 16-byte Folded Reload113; CHECK-NEXT: ldp x28, x27, [sp, #96] // 16-byte Folded Reload114; CHECK-NEXT: ldp d9, d8, [sp, #64] // 16-byte Folded Reload115; CHECK-NEXT: ldp d11, d10, [sp, #48] // 16-byte Folded Reload116; CHECK-NEXT: ldp d13, d12, [sp, #32] // 16-byte Folded Reload117; CHECK-NEXT: ldp d15, d14, [sp, #16] // 16-byte Folded Reload118; CHECK-NEXT: add sp, sp, #176119; CHECK-NEXT: ret120 %r = tail call preserve_nonecc i32 (i32, i32, i32, i32, i32, ...) @callee(i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7, i32 8, i32 9, i32 10)121 ret i32 %r122}123 124