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1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py2; RUN: llc < %s -mtriple=aarch64 -verify-machineinstrs -global-isel=0 | FileCheck %s --check-prefixes=CHECK,CHECK-SD3; RUN: llc < %s -mtriple=aarch64 -verify-machineinstrs -global-isel=1 | FileCheck %s --check-prefixes=CHECK,CHECK-GI4 5define ptr @scalar_gep_i32(ptr %b, i32 %off) {6; CHECK-LABEL: scalar_gep_i32:7; CHECK: // %bb.0: // %entry8; CHECK-NEXT: add x0, x0, w1, sxtw9; CHECK-NEXT: ret10entry:11 %g = getelementptr i8, ptr %b, i32 %off12 ret ptr %g13}14 15define ptr @scalar_gep_i64(ptr %b, i64 %off) {16; CHECK-LABEL: scalar_gep_i64:17; CHECK: // %bb.0: // %entry18; CHECK-NEXT: add x0, x0, x119; CHECK-NEXT: ret20entry:21 %g = getelementptr i8, ptr %b, i64 %off22 ret ptr %g23}24 25define ptr @scalar_gep_c10(ptr %b) {26; CHECK-LABEL: scalar_gep_c10:27; CHECK: // %bb.0: // %entry28; CHECK-NEXT: add x0, x0, #1029; CHECK-NEXT: ret30entry:31 %g = getelementptr i8, ptr %b, i64 1032 ret ptr %g33}34 35define ptr @scalar_gep_cm10(ptr %b) {36; CHECK-LABEL: scalar_gep_cm10:37; CHECK: // %bb.0: // %entry38; CHECK-NEXT: sub x0, x0, #1039; CHECK-NEXT: ret40entry:41 %g = getelementptr i8, ptr %b, i64 -1042 ret ptr %g43}44 45define <1 x ptr> @vector_gep_v1i32(<1 x ptr> %b, <1 x i32> %off) {46; CHECK-SD-LABEL: vector_gep_v1i32:47; CHECK-SD: // %bb.0: // %entry48; CHECK-SD-NEXT: shl d1, d1, #3249; CHECK-SD-NEXT: ssra d0, d1, #3250; CHECK-SD-NEXT: ret51;52; CHECK-GI-LABEL: vector_gep_v1i32:53; CHECK-GI: // %bb.0: // %entry54; CHECK-GI-NEXT: fmov w8, s155; CHECK-GI-NEXT: fmov x9, d056; CHECK-GI-NEXT: add x8, x9, w8, sxtw57; CHECK-GI-NEXT: fmov d0, x858; CHECK-GI-NEXT: ret59entry:60 %g = getelementptr i8, <1 x ptr> %b, <1 x i32> %off61 ret <1 x ptr> %g62}63 64define <2 x ptr> @vector_gep_v2i32(<2 x ptr> %b, <2 x i32> %off) {65; CHECK-LABEL: vector_gep_v2i32:66; CHECK: // %bb.0: // %entry67; CHECK-NEXT: saddw v0.2d, v0.2d, v1.2s68; CHECK-NEXT: ret69entry:70 %g = getelementptr i8, <2 x ptr> %b, <2 x i32> %off71 ret <2 x ptr> %g72}73 74define <3 x ptr> @vector_gep_v3i32(<3 x ptr> %b, <3 x i32> %off) {75; CHECK-SD-LABEL: vector_gep_v3i32:76; CHECK-SD: // %bb.0: // %entry77; CHECK-SD-NEXT: // kill: def $d0 killed $d0 def $q078; CHECK-SD-NEXT: // kill: def $d1 killed $d1 def $q179; CHECK-SD-NEXT: ext v4.16b, v3.16b, v3.16b, #880; CHECK-SD-NEXT: // kill: def $d2 killed $d2 def $q281; CHECK-SD-NEXT: mov v0.d[1], v1.d[0]82; CHECK-SD-NEXT: saddw v2.2d, v2.2d, v4.2s83; CHECK-SD-NEXT: saddw v0.2d, v0.2d, v3.2s84; CHECK-SD-NEXT: // kill: def $d2 killed $d2 killed $q285; CHECK-SD-NEXT: ext v1.16b, v0.16b, v0.16b, #886; CHECK-SD-NEXT: // kill: def $d0 killed $d0 killed $q087; CHECK-SD-NEXT: // kill: def $d1 killed $d1 killed $q188; CHECK-SD-NEXT: ret89;90; CHECK-GI-LABEL: vector_gep_v3i32:91; CHECK-GI: // %bb.0: // %entry92; CHECK-GI-NEXT: smov x9, v3.s[0]93; CHECK-GI-NEXT: smov x10, v3.s[1]94; CHECK-GI-NEXT: // kill: def $d0 killed $d0 def $q095; CHECK-GI-NEXT: fmov x8, d196; CHECK-GI-NEXT: mov v0.d[1], x897; CHECK-GI-NEXT: mov w8, v3.s[2]98; CHECK-GI-NEXT: fmov d1, x999; CHECK-GI-NEXT: fmov x9, d2100; CHECK-GI-NEXT: mov v1.d[1], x10101; CHECK-GI-NEXT: add x8, x9, w8, sxtw102; CHECK-GI-NEXT: fmov d2, x8103; CHECK-GI-NEXT: add v0.2d, v0.2d, v1.2d104; CHECK-GI-NEXT: mov d1, v0.d[1]105; CHECK-GI-NEXT: ret106entry:107 %g = getelementptr i8, <3 x ptr> %b, <3 x i32> %off108 ret <3 x ptr> %g109}110 111define <4 x ptr> @vector_gep_v4i32(<4 x ptr> %b, <4 x i32> %off) {112; CHECK-SD-LABEL: vector_gep_v4i32:113; CHECK-SD: // %bb.0: // %entry114; CHECK-SD-NEXT: saddw2 v1.2d, v1.2d, v2.4s115; CHECK-SD-NEXT: saddw v0.2d, v0.2d, v2.2s116; CHECK-SD-NEXT: ret117;118; CHECK-GI-LABEL: vector_gep_v4i32:119; CHECK-GI: // %bb.0: // %entry120; CHECK-GI-NEXT: saddw v0.2d, v0.2d, v2.2s121; CHECK-GI-NEXT: saddw2 v1.2d, v1.2d, v2.4s122; CHECK-GI-NEXT: ret123entry:124 %g = getelementptr i8, <4 x ptr> %b, <4 x i32> %off125 ret <4 x ptr> %g126}127 128define <1 x ptr> @vector_gep_v1i64(<1 x ptr> %b, <1 x i64> %off) {129; CHECK-SD-LABEL: vector_gep_v1i64:130; CHECK-SD: // %bb.0: // %entry131; CHECK-SD-NEXT: add d0, d0, d1132; CHECK-SD-NEXT: ret133;134; CHECK-GI-LABEL: vector_gep_v1i64:135; CHECK-GI: // %bb.0: // %entry136; CHECK-GI-NEXT: fmov x8, d0137; CHECK-GI-NEXT: fmov x9, d1138; CHECK-GI-NEXT: add x8, x8, x9139; CHECK-GI-NEXT: fmov d0, x8140; CHECK-GI-NEXT: ret141entry:142 %g = getelementptr i8, <1 x ptr> %b, <1 x i64> %off143 ret <1 x ptr> %g144}145 146define <2 x ptr> @vector_gep_v2i64(<2 x ptr> %b, <2 x i64> %off) {147; CHECK-LABEL: vector_gep_v2i64:148; CHECK: // %bb.0: // %entry149; CHECK-NEXT: add v0.2d, v0.2d, v1.2d150; CHECK-NEXT: ret151entry:152 %g = getelementptr i8, <2 x ptr> %b, <2 x i64> %off153 ret <2 x ptr> %g154}155 156define <3 x ptr> @vector_gep_v3i64(<3 x ptr> %b, <3 x i64> %off) {157; CHECK-SD-LABEL: vector_gep_v3i64:158; CHECK-SD: // %bb.0: // %entry159; CHECK-SD-NEXT: add d0, d0, d3160; CHECK-SD-NEXT: add d1, d1, d4161; CHECK-SD-NEXT: add d2, d2, d5162; CHECK-SD-NEXT: ret163;164; CHECK-GI-LABEL: vector_gep_v3i64:165; CHECK-GI: // %bb.0: // %entry166; CHECK-GI-NEXT: fmov x8, d1167; CHECK-GI-NEXT: // kill: def $d0 killed $d0 def $q0168; CHECK-GI-NEXT: // kill: def $d3 killed $d3 def $q3169; CHECK-GI-NEXT: // kill: def $d4 killed $d4 def $q4170; CHECK-GI-NEXT: fmov x9, d5171; CHECK-GI-NEXT: mov v3.d[1], v4.d[0]172; CHECK-GI-NEXT: mov v0.d[1], x8173; CHECK-GI-NEXT: fmov x8, d2174; CHECK-GI-NEXT: add x8, x8, x9175; CHECK-GI-NEXT: add v0.2d, v0.2d, v3.2d176; CHECK-GI-NEXT: fmov d2, x8177; CHECK-GI-NEXT: mov d1, v0.d[1]178; CHECK-GI-NEXT: ret179entry:180 %g = getelementptr i8, <3 x ptr> %b, <3 x i64> %off181 ret <3 x ptr> %g182}183 184define <4 x ptr> @vector_gep_v4i64(<4 x ptr> %b, <4 x i64> %off) {185; CHECK-SD-LABEL: vector_gep_v4i64:186; CHECK-SD: // %bb.0: // %entry187; CHECK-SD-NEXT: add v1.2d, v1.2d, v3.2d188; CHECK-SD-NEXT: add v0.2d, v0.2d, v2.2d189; CHECK-SD-NEXT: ret190;191; CHECK-GI-LABEL: vector_gep_v4i64:192; CHECK-GI: // %bb.0: // %entry193; CHECK-GI-NEXT: add v0.2d, v0.2d, v2.2d194; CHECK-GI-NEXT: add v1.2d, v1.2d, v3.2d195; CHECK-GI-NEXT: ret196entry:197 %g = getelementptr i8, <4 x ptr> %b, <4 x i64> %off198 ret <4 x ptr> %g199}200 201define <2 x ptr> @vector_gep_v4i128(<2 x ptr> %b, <2 x i128> %off) {202; CHECK-LABEL: vector_gep_v4i128:203; CHECK: // %bb.0: // %entry204; CHECK-NEXT: fmov d1, x0205; CHECK-NEXT: mov v1.d[1], x2206; CHECK-NEXT: add v0.2d, v0.2d, v1.2d207; CHECK-NEXT: ret208entry:209 %g = getelementptr i8, <2 x ptr> %b, <2 x i128> %off210 ret <2 x ptr> %g211}212 213 214define <1 x ptr> @vector_gep_v1i64_base(ptr %b, <1 x i64> %off) {215; CHECK-SD-LABEL: vector_gep_v1i64_base:216; CHECK-SD: // %bb.0: // %entry217; CHECK-SD-NEXT: fmov d1, x0218; CHECK-SD-NEXT: add d0, d1, d0219; CHECK-SD-NEXT: ret220;221; CHECK-GI-LABEL: vector_gep_v1i64_base:222; CHECK-GI: // %bb.0: // %entry223; CHECK-GI-NEXT: fmov x8, d0224; CHECK-GI-NEXT: add x8, x0, x8225; CHECK-GI-NEXT: fmov d0, x8226; CHECK-GI-NEXT: ret227entry:228 %g = getelementptr i8, ptr %b, <1 x i64> %off229 ret <1 x ptr> %g230}231 232define <2 x ptr> @vector_gep_v2i64_base(ptr %b, <2 x i64> %off) {233; CHECK-LABEL: vector_gep_v2i64_base:234; CHECK: // %bb.0: // %entry235; CHECK-NEXT: dup v1.2d, x0236; CHECK-NEXT: add v0.2d, v1.2d, v0.2d237; CHECK-NEXT: ret238entry:239 %g = getelementptr i8, ptr %b, <2 x i64> %off240 ret <2 x ptr> %g241}242 243define <3 x ptr> @vector_gep_v3i64_base(ptr %b, <3 x i64> %off) {244; CHECK-SD-LABEL: vector_gep_v3i64_base:245; CHECK-SD: // %bb.0: // %entry246; CHECK-SD-NEXT: // kill: def $d0 killed $d0 def $q0247; CHECK-SD-NEXT: // kill: def $d1 killed $d1 def $q1248; CHECK-SD-NEXT: fmov d3, x0249; CHECK-SD-NEXT: mov v0.d[1], v1.d[0]250; CHECK-SD-NEXT: dup v1.2d, x0251; CHECK-SD-NEXT: add d2, d3, d2252; CHECK-SD-NEXT: add v0.2d, v1.2d, v0.2d253; CHECK-SD-NEXT: ext v1.16b, v0.16b, v0.16b, #8254; CHECK-SD-NEXT: // kill: def $d0 killed $d0 killed $q0255; CHECK-SD-NEXT: // kill: def $d1 killed $d1 killed $q1256; CHECK-SD-NEXT: ret257;258; CHECK-GI-LABEL: vector_gep_v3i64_base:259; CHECK-GI: // %bb.0: // %entry260; CHECK-GI-NEXT: // kill: def $d0 killed $d0 def $q0261; CHECK-GI-NEXT: // kill: def $d1 killed $d1 def $q1262; CHECK-GI-NEXT: fmov x8, d2263; CHECK-GI-NEXT: mov v0.d[1], v1.d[0]264; CHECK-GI-NEXT: dup v1.2d, x0265; CHECK-GI-NEXT: add x8, x0, x8266; CHECK-GI-NEXT: fmov d2, x8267; CHECK-GI-NEXT: add v0.2d, v1.2d, v0.2d268; CHECK-GI-NEXT: mov d1, v0.d[1]269; CHECK-GI-NEXT: ret270entry:271 %g = getelementptr i8, ptr %b, <3 x i64> %off272 ret <3 x ptr> %g273}274 275define <4 x ptr> @vector_gep_v4i64_base(ptr %b, <4 x i64> %off) {276; CHECK-LABEL: vector_gep_v4i64_base:277; CHECK: // %bb.0: // %entry278; CHECK-NEXT: dup v2.2d, x0279; CHECK-NEXT: add v0.2d, v2.2d, v0.2d280; CHECK-NEXT: add v1.2d, v2.2d, v1.2d281; CHECK-NEXT: ret282entry:283 %g = getelementptr i8, ptr %b, <4 x i64> %off284 ret <4 x ptr> %g285}286 287define <1 x ptr> @vector_gep_v1i64_c10(ptr %b) {288; CHECK-LABEL: vector_gep_v1i64_c10:289; CHECK: // %bb.0: // %entry290; CHECK-NEXT: add x8, x0, #10291; CHECK-NEXT: fmov d0, x8292; CHECK-NEXT: ret293entry:294 %g = getelementptr i8, ptr %b, <1 x i64> <i64 10>295 ret <1 x ptr> %g296}297 298define <2 x ptr> @vector_gep_v2i64_c10(ptr %b) {299; CHECK-SD-LABEL: vector_gep_v2i64_c10:300; CHECK-SD: // %bb.0: // %entry301; CHECK-SD-NEXT: add x8, x0, #10302; CHECK-SD-NEXT: dup v0.2d, x8303; CHECK-SD-NEXT: ret304;305; CHECK-GI-LABEL: vector_gep_v2i64_c10:306; CHECK-GI: // %bb.0: // %entry307; CHECK-GI-NEXT: adrp x8, .LCPI18_0308; CHECK-GI-NEXT: dup v0.2d, x0309; CHECK-GI-NEXT: ldr q1, [x8, :lo12:.LCPI18_0]310; CHECK-GI-NEXT: add v0.2d, v0.2d, v1.2d311; CHECK-GI-NEXT: ret312entry:313 %g = getelementptr i8, ptr %b, <2 x i64> <i64 10, i64 10>314 ret <2 x ptr> %g315}316 317define <3 x ptr> @vector_gep_v3i64_c10(ptr %b) {318; CHECK-SD-LABEL: vector_gep_v3i64_c10:319; CHECK-SD: // %bb.0: // %entry320; CHECK-SD-NEXT: add x8, x0, #10321; CHECK-SD-NEXT: fmov d0, x8322; CHECK-SD-NEXT: fmov d1, d0323; CHECK-SD-NEXT: fmov d2, d0324; CHECK-SD-NEXT: ret325;326; CHECK-GI-LABEL: vector_gep_v3i64_c10:327; CHECK-GI: // %bb.0: // %entry328; CHECK-GI-NEXT: adrp x8, .LCPI19_0329; CHECK-GI-NEXT: dup v0.2d, x0330; CHECK-GI-NEXT: ldr q1, [x8, :lo12:.LCPI19_0]331; CHECK-GI-NEXT: add x8, x0, #10332; CHECK-GI-NEXT: fmov d2, x8333; CHECK-GI-NEXT: add v0.2d, v0.2d, v1.2d334; CHECK-GI-NEXT: mov d1, v0.d[1]335; CHECK-GI-NEXT: ret336entry:337 %g = getelementptr i8, ptr %b, <3 x i64> <i64 10, i64 10, i64 10>338 ret <3 x ptr> %g339}340 341define <4 x ptr> @vector_gep_v4i64_c10(ptr %b) {342; CHECK-SD-LABEL: vector_gep_v4i64_c10:343; CHECK-SD: // %bb.0: // %entry344; CHECK-SD-NEXT: add x8, x0, #10345; CHECK-SD-NEXT: dup v0.2d, x8346; CHECK-SD-NEXT: mov v1.16b, v0.16b347; CHECK-SD-NEXT: ret348;349; CHECK-GI-LABEL: vector_gep_v4i64_c10:350; CHECK-GI: // %bb.0: // %entry351; CHECK-GI-NEXT: adrp x8, .LCPI20_0352; CHECK-GI-NEXT: dup v0.2d, x0353; CHECK-GI-NEXT: ldr q1, [x8, :lo12:.LCPI20_0]354; CHECK-GI-NEXT: add v0.2d, v0.2d, v1.2d355; CHECK-GI-NEXT: mov v1.16b, v0.16b356; CHECK-GI-NEXT: ret357entry:358 %g = getelementptr i8, ptr %b, <4 x i64> <i64 10, i64 10, i64 10, i64 10>359 ret <4 x ptr> %g360}361 362define <1 x ptr> @vector_gep_v1i64_cm10(ptr %b) {363; CHECK-LABEL: vector_gep_v1i64_cm10:364; CHECK: // %bb.0: // %entry365; CHECK-NEXT: sub x8, x0, #10366; CHECK-NEXT: fmov d0, x8367; CHECK-NEXT: ret368entry:369 %g = getelementptr i8, ptr %b, <1 x i64> <i64 -10>370 ret <1 x ptr> %g371}372 373define <2 x ptr> @vector_gep_v2i64_cm10(ptr %b) {374; CHECK-SD-LABEL: vector_gep_v2i64_cm10:375; CHECK-SD: // %bb.0: // %entry376; CHECK-SD-NEXT: sub x8, x0, #10377; CHECK-SD-NEXT: dup v0.2d, x8378; CHECK-SD-NEXT: ret379;380; CHECK-GI-LABEL: vector_gep_v2i64_cm10:381; CHECK-GI: // %bb.0: // %entry382; CHECK-GI-NEXT: adrp x8, .LCPI22_0383; CHECK-GI-NEXT: dup v0.2d, x0384; CHECK-GI-NEXT: ldr q1, [x8, :lo12:.LCPI22_0]385; CHECK-GI-NEXT: add v0.2d, v0.2d, v1.2d386; CHECK-GI-NEXT: ret387entry:388 %g = getelementptr i8, ptr %b, <2 x i64> <i64 -10, i64 -10>389 ret <2 x ptr> %g390}391 392define <3 x ptr> @vector_gep_v3i64_cm10(ptr %b) {393; CHECK-SD-LABEL: vector_gep_v3i64_cm10:394; CHECK-SD: // %bb.0: // %entry395; CHECK-SD-NEXT: sub x8, x0, #10396; CHECK-SD-NEXT: fmov d0, x8397; CHECK-SD-NEXT: fmov d1, d0398; CHECK-SD-NEXT: fmov d2, d0399; CHECK-SD-NEXT: ret400;401; CHECK-GI-LABEL: vector_gep_v3i64_cm10:402; CHECK-GI: // %bb.0: // %entry403; CHECK-GI-NEXT: adrp x8, .LCPI23_0404; CHECK-GI-NEXT: dup v0.2d, x0405; CHECK-GI-NEXT: ldr q1, [x8, :lo12:.LCPI23_0]406; CHECK-GI-NEXT: sub x8, x0, #10407; CHECK-GI-NEXT: fmov d2, x8408; CHECK-GI-NEXT: add v0.2d, v0.2d, v1.2d409; CHECK-GI-NEXT: mov d1, v0.d[1]410; CHECK-GI-NEXT: ret411entry:412 %g = getelementptr i8, ptr %b, <3 x i64> <i64 -10, i64 -10, i64 -10>413 ret <3 x ptr> %g414}415 416define <4 x ptr> @vector_gep_v4i64_cm10(ptr %b) {417; CHECK-SD-LABEL: vector_gep_v4i64_cm10:418; CHECK-SD: // %bb.0: // %entry419; CHECK-SD-NEXT: sub x8, x0, #10420; CHECK-SD-NEXT: dup v0.2d, x8421; CHECK-SD-NEXT: mov v1.16b, v0.16b422; CHECK-SD-NEXT: ret423;424; CHECK-GI-LABEL: vector_gep_v4i64_cm10:425; CHECK-GI: // %bb.0: // %entry426; CHECK-GI-NEXT: adrp x8, .LCPI24_0427; CHECK-GI-NEXT: dup v0.2d, x0428; CHECK-GI-NEXT: ldr q1, [x8, :lo12:.LCPI24_0]429; CHECK-GI-NEXT: add v0.2d, v0.2d, v1.2d430; CHECK-GI-NEXT: mov v1.16b, v0.16b431; CHECK-GI-NEXT: ret432entry:433 %g = getelementptr i8, ptr %b, <4 x i64> <i64 -10, i64 -10, i64 -10, i64 -10>434 ret <4 x ptr> %g435}436