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1; NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py UTC_ARGS: --version 52; RUN: llc < %s -mtriple arm64e-apple-darwin -verify-machineinstrs -stop-after=finalize-isel -global-isel=0 \3; RUN: | FileCheck %s --check-prefixes=DAGISEL4; RUN: llc < %s -mtriple arm64e-apple-darwin -verify-machineinstrs -stop-after=finalize-isel -global-isel=1 -global-isel-abort=1 \5; RUN: | FileCheck %s --check-prefixes=GISEL6; RUN: llc < %s -mtriple aarch64-linux-gnu -mattr=+pauth -verify-machineinstrs -stop-after=finalize-isel -global-isel=0 \7; RUN: | FileCheck %s --check-prefixes=DAGISEL8; RUN: llc < %s -mtriple aarch64-linux-gnu -mattr=+pauth -verify-machineinstrs -stop-after=finalize-isel -global-isel=1 -global-isel-abort=1 \9; RUN: | FileCheck %s --check-prefixes=GISEL10 11; Check MIR produced by the instruction selector to validate properties that12; cannot be reliably tested by only inspecting the final asm output.13 14@discvar = dso_local global i64 015 16; Make sure the components of blend(addr, imm) and integer constants are17; recognized and passed to PAC pseudo via separate operands to prevent18; substitution of the immediate modifier.19;20; MIR output of the instruction selector is inspected, as it is hard to reliably21; distinguish MOVKXi immediately followed by a pseudo from a standalone pseudo22; instruction carrying address and immediate modifiers in its separate operands23; by only observing the final asm output.24 25define i64 @small_imm_disc_optimized(i64 %addr) {26 ; DAGISEL-LABEL: name: small_imm_disc_optimized27 ; DAGISEL: bb.0.entry:28 ; DAGISEL-NEXT: liveins: $x029 ; DAGISEL-NEXT: {{ $}}30 ; DAGISEL-NEXT: [[COPY:%[0-9]+]]:gpr64 = COPY $x031 ; DAGISEL-NEXT: [[MOVi32imm:%[0-9]+]]:gpr32 = MOVi32imm 4232 ; DAGISEL-NEXT: [[SUBREG_TO_REG:%[0-9]+]]:gpr64noip = SUBREG_TO_REG 0, killed [[MOVi32imm]], %subreg.sub_3233 ; DAGISEL-NEXT: [[PAC:%[0-9]+]]:gpr64 = PAC [[COPY]], 2, 42, killed $noreg, implicit-def dead $x16, implicit-def dead $x1734 ; DAGISEL-NEXT: $x0 = COPY [[PAC]]35 ; DAGISEL-NEXT: RET_ReallyLR implicit $x036 ;37 ; GISEL-LABEL: name: small_imm_disc_optimized38 ; GISEL: bb.1.entry:39 ; GISEL-NEXT: liveins: $x040 ; GISEL-NEXT: {{ $}}41 ; GISEL-NEXT: [[COPY:%[0-9]+]]:gpr64 = COPY $x042 ; GISEL-NEXT: [[MOVi32imm:%[0-9]+]]:gpr32 = MOVi32imm 4243 ; GISEL-NEXT: [[SUBREG_TO_REG:%[0-9]+]]:gpr64noip = SUBREG_TO_REG 0, [[MOVi32imm]], %subreg.sub_3244 ; GISEL-NEXT: [[PAC:%[0-9]+]]:gpr64 = PAC [[COPY]], 2, 42, $noreg, implicit-def dead $x16, implicit-def dead $x1745 ; GISEL-NEXT: $x0 = COPY [[PAC]]46 ; GISEL-NEXT: RET_ReallyLR implicit $x047entry:48 %signed = call i64 @llvm.ptrauth.sign(i64 %addr, i32 2, i64 42)49 ret i64 %signed50}51 52; Without optimization, MOVi64imm may be used for small i64 constants as well.53define i64 @small_imm_disc_non_optimized(i64 %addr) noinline optnone {54 ; DAGISEL-LABEL: name: small_imm_disc_non_optimized55 ; DAGISEL: bb.0.entry:56 ; DAGISEL-NEXT: liveins: $x057 ; DAGISEL-NEXT: {{ $}}58 ; DAGISEL-NEXT: [[COPY:%[0-9]+]]:gpr64 = COPY $x059 ; DAGISEL-NEXT: [[COPY1:%[0-9]+]]:gpr64 = COPY killed [[COPY]]60 ; DAGISEL-NEXT: [[MOVi32imm:%[0-9]+]]:gpr32 = MOVi32imm 4261 ; DAGISEL-NEXT: [[SUBREG_TO_REG:%[0-9]+]]:gpr64noip = SUBREG_TO_REG 0, killed [[MOVi32imm]], %subreg.sub_3262 ; DAGISEL-NEXT: [[PAC:%[0-9]+]]:gpr64 = PAC [[COPY1]], 2, 42, killed $noreg, implicit-def dead $x16, implicit-def dead $x1763 ; DAGISEL-NEXT: [[COPY2:%[0-9]+]]:gpr64all = COPY [[PAC]]64 ; DAGISEL-NEXT: $x0 = COPY [[COPY2]]65 ; DAGISEL-NEXT: RET_ReallyLR implicit $x066 ;67 ; GISEL-LABEL: name: small_imm_disc_non_optimized68 ; GISEL: bb.1.entry:69 ; GISEL-NEXT: liveins: $x070 ; GISEL-NEXT: {{ $}}71 ; GISEL-NEXT: [[COPY:%[0-9]+]]:gpr64 = COPY $x072 ; GISEL-NEXT: [[MOVi64imm:%[0-9]+]]:gpr64noip = MOVi64imm 4273 ; GISEL-NEXT: [[PAC:%[0-9]+]]:gpr64 = PAC [[COPY]], 2, 42, $noreg, implicit-def dead $x16, implicit-def dead $x1774 ; GISEL-NEXT: $x0 = COPY [[PAC]]75 ; GISEL-NEXT: RET_ReallyLR implicit $x076entry:77 %signed = call i64 @llvm.ptrauth.sign(i64 %addr, i32 2, i64 42)78 ret i64 %signed79}80 81define i64 @large_imm_disc_wreg(i64 %addr) {82 ; DAGISEL-LABEL: name: large_imm_disc_wreg83 ; DAGISEL: bb.0.entry:84 ; DAGISEL-NEXT: liveins: $x085 ; DAGISEL-NEXT: {{ $}}86 ; DAGISEL-NEXT: [[COPY:%[0-9]+]]:gpr64 = COPY $x087 ; DAGISEL-NEXT: [[MOVi32imm:%[0-9]+]]:gpr32 = MOVi32imm 1234567888 ; DAGISEL-NEXT: [[SUBREG_TO_REG:%[0-9]+]]:gpr64noip = SUBREG_TO_REG 0, killed [[MOVi32imm]], %subreg.sub_3289 ; DAGISEL-NEXT: [[PAC:%[0-9]+]]:gpr64 = PAC [[COPY]], 2, 0, killed [[SUBREG_TO_REG]], implicit-def dead $x16, implicit-def dead $x1790 ; DAGISEL-NEXT: $x0 = COPY [[PAC]]91 ; DAGISEL-NEXT: RET_ReallyLR implicit $x092 ;93 ; GISEL-LABEL: name: large_imm_disc_wreg94 ; GISEL: bb.1.entry:95 ; GISEL-NEXT: liveins: $x096 ; GISEL-NEXT: {{ $}}97 ; GISEL-NEXT: [[COPY:%[0-9]+]]:gpr64 = COPY $x098 ; GISEL-NEXT: [[MOVi32imm:%[0-9]+]]:gpr32 = MOVi32imm 1234567899 ; GISEL-NEXT: [[SUBREG_TO_REG:%[0-9]+]]:gpr64noip = SUBREG_TO_REG 0, [[MOVi32imm]], %subreg.sub_32100 ; GISEL-NEXT: [[PAC:%[0-9]+]]:gpr64 = PAC [[COPY]], 2, 0, [[SUBREG_TO_REG]], implicit-def dead $x16, implicit-def dead $x17101 ; GISEL-NEXT: $x0 = COPY [[PAC]]102 ; GISEL-NEXT: RET_ReallyLR implicit $x0103entry:104 %signed = call i64 @llvm.ptrauth.sign(i64 %addr, i32 2, i64 12345678)105 ret i64 %signed106}107 108define i64 @large_imm_disc_xreg(i64 %addr) {109 ; DAGISEL-LABEL: name: large_imm_disc_xreg110 ; DAGISEL: bb.0.entry:111 ; DAGISEL-NEXT: liveins: $x0112 ; DAGISEL-NEXT: {{ $}}113 ; DAGISEL-NEXT: [[COPY:%[0-9]+]]:gpr64 = COPY $x0114 ; DAGISEL-NEXT: [[MOVi64imm:%[0-9]+]]:gpr64noip = MOVi64imm 123456789012345115 ; DAGISEL-NEXT: [[PAC:%[0-9]+]]:gpr64 = PAC [[COPY]], 2, 0, killed [[MOVi64imm]], implicit-def dead $x16, implicit-def dead $x17116 ; DAGISEL-NEXT: $x0 = COPY [[PAC]]117 ; DAGISEL-NEXT: RET_ReallyLR implicit $x0118 ;119 ; GISEL-LABEL: name: large_imm_disc_xreg120 ; GISEL: bb.1.entry:121 ; GISEL-NEXT: liveins: $x0122 ; GISEL-NEXT: {{ $}}123 ; GISEL-NEXT: [[COPY:%[0-9]+]]:gpr64 = COPY $x0124 ; GISEL-NEXT: [[MOVi64imm:%[0-9]+]]:gpr64noip = MOVi64imm 123456789012345125 ; GISEL-NEXT: [[PAC:%[0-9]+]]:gpr64 = PAC [[COPY]], 2, 0, [[MOVi64imm]], implicit-def dead $x16, implicit-def dead $x17126 ; GISEL-NEXT: $x0 = COPY [[PAC]]127 ; GISEL-NEXT: RET_ReallyLR implicit $x0128entry:129 %signed = call i64 @llvm.ptrauth.sign(i64 %addr, i32 2, i64 123456789012345)130 ret i64 %signed131}132 133; Make sure blend() is lowered as expected when optimization is disabled.134define i64 @blended_disc_non_optimized(i64 %addr, i64 %addrdisc) noinline optnone {135 ; DAGISEL-LABEL: name: blended_disc_non_optimized136 ; DAGISEL: bb.0.entry:137 ; DAGISEL-NEXT: liveins: $x0, $x1138 ; DAGISEL-NEXT: {{ $}}139 ; DAGISEL-NEXT: [[COPY:%[0-9]+]]:gpr64 = COPY $x1140 ; DAGISEL-NEXT: [[COPY1:%[0-9]+]]:gpr64 = COPY $x0141 ; DAGISEL-NEXT: [[COPY2:%[0-9]+]]:gpr64 = COPY killed [[COPY1]]142 ; DAGISEL-NEXT: [[COPY3:%[0-9]+]]:gpr64 = COPY killed [[COPY]]143 ; DAGISEL-NEXT: [[MOVKXi:%[0-9]+]]:gpr64 = MOVKXi [[COPY3]], 42, 48144 ; DAGISEL-NEXT: [[COPY4:%[0-9]+]]:gpr64noip = COPY [[MOVKXi]]145 ; DAGISEL-NEXT: [[COPY5:%[0-9]+]]:gpr64noip = COPY [[COPY3]]146 ; DAGISEL-NEXT: [[PAC:%[0-9]+]]:gpr64 = PAC [[COPY2]], 2, 42, [[COPY5]], implicit-def dead $x16, implicit-def dead $x17147 ; DAGISEL-NEXT: [[COPY6:%[0-9]+]]:gpr64all = COPY [[PAC]]148 ; DAGISEL-NEXT: $x0 = COPY [[COPY6]]149 ; DAGISEL-NEXT: RET_ReallyLR implicit $x0150 ;151 ; GISEL-LABEL: name: blended_disc_non_optimized152 ; GISEL: bb.1.entry:153 ; GISEL-NEXT: liveins: $x0, $x1154 ; GISEL-NEXT: {{ $}}155 ; GISEL-NEXT: [[COPY:%[0-9]+]]:gpr64 = COPY $x0156 ; GISEL-NEXT: [[COPY1:%[0-9]+]]:gpr64 = COPY $x1157 ; GISEL-NEXT: [[MOVKXi:%[0-9]+]]:gpr64noip = MOVKXi [[COPY1]], 42, 48158 ; GISEL-NEXT: [[COPY2:%[0-9]+]]:gpr64noip = COPY [[COPY1]]159 ; GISEL-NEXT: [[PAC:%[0-9]+]]:gpr64 = PAC [[COPY]], 2, 42, [[COPY2]], implicit-def dead $x16, implicit-def dead $x17160 ; GISEL-NEXT: $x0 = COPY [[PAC]]161 ; GISEL-NEXT: RET_ReallyLR implicit $x0162entry:163 %disc = call i64 @llvm.ptrauth.blend(i64 %addrdisc, i64 42)164 %signed = call i64 @llvm.ptrauth.sign(i64 %addr, i32 2, i64 %disc)165 ret i64 %signed166}167 168define i64 @blend_and_sign_same_bb(i64 %addr) {169 ; DAGISEL-LABEL: name: blend_and_sign_same_bb170 ; DAGISEL: bb.0.entry:171 ; DAGISEL-NEXT: liveins: $x0172 ; DAGISEL-NEXT: {{ $}}173 ; DAGISEL-NEXT: [[COPY:%[0-9]+]]:gpr64 = COPY $x0174 ; DAGISEL-NEXT: [[ADRP:%[0-9]+]]:gpr64common = ADRP target-flags(aarch64-page) @discvar175 ; DAGISEL-NEXT: [[LDRXui:%[0-9]+]]:gpr64 = LDRXui killed [[ADRP]], target-flags(aarch64-pageoff, aarch64-nc) @discvar :: (dereferenceable load (s64) from @discvar)176 ; DAGISEL-NEXT: [[MOVKXi:%[0-9]+]]:gpr64noip = MOVKXi [[LDRXui]], 42, 48177 ; DAGISEL-NEXT: [[COPY1:%[0-9]+]]:gpr64noip = COPY [[LDRXui]]178 ; DAGISEL-NEXT: [[PAC:%[0-9]+]]:gpr64 = PAC [[COPY]], 2, 42, killed [[COPY1]], implicit-def dead $x16, implicit-def dead $x17179 ; DAGISEL-NEXT: $x0 = COPY [[PAC]]180 ; DAGISEL-NEXT: RET_ReallyLR implicit $x0181 ;182 ; GISEL-LABEL: name: blend_and_sign_same_bb183 ; GISEL: bb.1.entry:184 ; GISEL-NEXT: liveins: $x0185 ; GISEL-NEXT: {{ $}}186 ; GISEL-NEXT: [[COPY:%[0-9]+]]:gpr64 = COPY $x0187 ; GISEL-NEXT: [[ADRP:%[0-9]+]]:gpr64common = ADRP target-flags(aarch64-page) @discvar188 ; GISEL-NEXT: [[LDRXui:%[0-9]+]]:gpr64 = LDRXui [[ADRP]], target-flags(aarch64-pageoff, aarch64-nc) @discvar :: (dereferenceable load (s64) from @discvar)189 ; GISEL-NEXT: [[MOVKXi:%[0-9]+]]:gpr64noip = MOVKXi [[LDRXui]], 42, 48190 ; GISEL-NEXT: [[COPY1:%[0-9]+]]:gpr64noip = COPY [[LDRXui]]191 ; GISEL-NEXT: [[PAC:%[0-9]+]]:gpr64 = PAC [[COPY]], 2, 42, [[COPY1]], implicit-def dead $x16, implicit-def dead $x17192 ; GISEL-NEXT: $x0 = COPY [[PAC]]193 ; GISEL-NEXT: RET_ReallyLR implicit $x0194entry:195 %addrdisc = load i64, ptr @discvar196 %disc = call i64 @llvm.ptrauth.blend(i64 %addrdisc, i64 42)197 %signed = call i64 @llvm.ptrauth.sign(i64 %addr, i32 2, i64 %disc)198 ret i64 %signed199}200 201; In the below test cases both %addrdisc and %disc are computed (i.e. they are202; neither global addresses, nor function arguments) in a different basic block,203; making them harder to express via ISD::PtrAuthGlobalAddress.204 205define i64 @blend_and_sign_different_bbs(i64 %addr, i64 %cond) {206 ; DAGISEL-LABEL: name: blend_and_sign_different_bbs207 ; DAGISEL: bb.0.entry:208 ; DAGISEL-NEXT: successors: %bb.1(0x50000000), %bb.2(0x30000000)209 ; DAGISEL-NEXT: liveins: $x0, $x1210 ; DAGISEL-NEXT: {{ $}}211 ; DAGISEL-NEXT: [[COPY:%[0-9]+]]:gpr64 = COPY $x1212 ; DAGISEL-NEXT: [[COPY1:%[0-9]+]]:gpr64 = COPY $x0213 ; DAGISEL-NEXT: [[ADRP:%[0-9]+]]:gpr64common = ADRP target-flags(aarch64-page) @discvar214 ; DAGISEL-NEXT: [[LDRXui:%[0-9]+]]:gpr64 = LDRXui killed [[ADRP]], target-flags(aarch64-pageoff, aarch64-nc) @discvar :: (dereferenceable load (s64) from @discvar)215 ; DAGISEL-NEXT: [[MOVKXi:%[0-9]+]]:gpr64 = MOVKXi [[LDRXui]], 42, 48216 ; DAGISEL-NEXT: [[COPY2:%[0-9]+]]:gpr64noip = COPY [[MOVKXi]]217 ; DAGISEL-NEXT: CBZX [[COPY]], %bb.2218 ; DAGISEL-NEXT: B %bb.1219 ; DAGISEL-NEXT: {{ $}}220 ; DAGISEL-NEXT: bb.1.next:221 ; DAGISEL-NEXT: successors: %bb.2(0x80000000)222 ; DAGISEL-NEXT: {{ $}}223 ; DAGISEL-NEXT: [[COPY3:%[0-9]+]]:gpr64common = COPY [[COPY2]]224 ; DAGISEL-NEXT: INLINEASM &nop, 1 /* sideeffect attdialect */, 3866633 /* reguse:GPR64common */, [[COPY3]]225 ; DAGISEL-NEXT: {{ $}}226 ; DAGISEL-NEXT: bb.2.exit:227 ; DAGISEL-NEXT: [[COPY4:%[0-9]+]]:gpr64noip = COPY [[LDRXui]]228 ; DAGISEL-NEXT: [[PAC:%[0-9]+]]:gpr64 = PAC [[COPY1]], 2, 42, [[COPY4]], implicit-def dead $x16, implicit-def dead $x17229 ; DAGISEL-NEXT: $x0 = COPY [[PAC]]230 ; DAGISEL-NEXT: RET_ReallyLR implicit $x0231 ;232 ; GISEL-LABEL: name: blend_and_sign_different_bbs233 ; GISEL: bb.1.entry:234 ; GISEL-NEXT: successors: %bb.2(0x50000000), %bb.3(0x30000000)235 ; GISEL-NEXT: liveins: $x0, $x1236 ; GISEL-NEXT: {{ $}}237 ; GISEL-NEXT: [[COPY:%[0-9]+]]:gpr64 = COPY $x0238 ; GISEL-NEXT: [[COPY1:%[0-9]+]]:gpr64 = COPY $x1239 ; GISEL-NEXT: [[ADRP:%[0-9]+]]:gpr64common = ADRP target-flags(aarch64-page) @discvar240 ; GISEL-NEXT: [[LDRXui:%[0-9]+]]:gpr64 = LDRXui [[ADRP]], target-flags(aarch64-pageoff, aarch64-nc) @discvar :: (dereferenceable load (s64) from @discvar)241 ; GISEL-NEXT: [[MOVKXi:%[0-9]+]]:gpr64noip = MOVKXi [[LDRXui]], 42, 48242 ; GISEL-NEXT: CBZX [[COPY1]], %bb.3243 ; GISEL-NEXT: B %bb.2244 ; GISEL-NEXT: {{ $}}245 ; GISEL-NEXT: bb.2.next:246 ; GISEL-NEXT: successors: %bb.3(0x80000000)247 ; GISEL-NEXT: {{ $}}248 ; GISEL-NEXT: [[COPY2:%[0-9]+]]:gpr64common = COPY [[MOVKXi]]249 ; GISEL-NEXT: INLINEASM &nop, 1 /* sideeffect attdialect */, 3866633 /* reguse:GPR64common */, [[COPY2]]250 ; GISEL-NEXT: {{ $}}251 ; GISEL-NEXT: bb.3.exit:252 ; GISEL-NEXT: [[COPY3:%[0-9]+]]:gpr64noip = COPY [[LDRXui]]253 ; GISEL-NEXT: [[PAC:%[0-9]+]]:gpr64 = PAC [[COPY]], 2, 42, [[COPY3]], implicit-def dead $x16, implicit-def dead $x17254 ; GISEL-NEXT: $x0 = COPY [[PAC]]255 ; GISEL-NEXT: RET_ReallyLR implicit $x0256entry:257 %addrdisc = load i64, ptr @discvar258 %disc = call i64 @llvm.ptrauth.blend(i64 %addrdisc, i64 42)259 %cond.b = icmp ne i64 %cond, 0260 br i1 %cond.b, label %next, label %exit261 262next:263 call void asm sideeffect "nop", "r"(i64 %disc)264 br label %exit265 266exit:267 %signed = call i64 @llvm.ptrauth.sign(i64 %addr, i32 2, i64 %disc)268 ret i64 %signed269}270