114 lines · plain
1; RUN: llc -mtriple aarch64 -o - %s \2; RUN: -aarch64-authenticated-lr-check-method=xpac-hint \3; RUN: -stop-before=aarch64-ptrauth \4; RUN: | FileCheck --check-prefix=MIR %s5 6; RUN: llc -mtriple aarch64 -o - %s -asm-verbose=0 \7; RUN: -aarch64-authenticated-lr-check-method=xpac-hint \8; RUN: | FileCheck --check-prefix=ASM %s9 10target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i8:8:32-i16:16:32-i64:64-i128:128-n32:64-S128-Fn32"11 12;; Test that expansion of AUTH_TCRETURN does not crash due to unavailability of13;; neither x16 nor x17 as a scratch register.14define i32 @test_scratch_reg_nobti(ptr %callee, ptr %addr) #0 {15entry:16 ;; Force spilling of LR17 tail call void asm sideeffect "", "~{lr}"()18 ;; Clobber x0-x15 and x18-x29. This is rather fragile but it was observed to19 ;; trick regalloc into allocating both x16 and x17 as inputs of AUTH_TCRETURN.20 tail call void asm sideeffect "", "~{x0},~{x1},~{x2},~{x3},~{x4},~{x5},~{x6},~{x7},~{x8},~{x9},~{x10},~{x11},~{x12},~{x13},~{x14},~{x15}"()21 tail call void asm sideeffect "", "~{x18},~{x19},~{x20},~{x21},~{x22},~{x23},~{x24},~{x25},~{x26},~{x27},~{x28},~{fp}"()22 %addr.i = ptrtoint ptr %addr to i6423 %call = tail call i32 %callee() #1 [ "ptrauth"(i32 0, i64 %addr.i) ]24 ret i32 %call25}26;; Ensure the specific tail call pseudo instruction is used.27; MIR-LABEL: name: test_scratch_reg_nobti28; MIR: AUTH_TCRETURN{{ }}29;30; ASM-LABEL: test_scratch_reg_nobti:31; ASM-NEXT: pacibsp32; ASM-NEXT: sub sp, sp, #11233; ASM-NEXT: stp x29, x30, [sp, #16]34; ASM-NEXT: mov x16, x135; ASM-NEXT: stp x28, x27, [sp, #32]36; ASM-NEXT: stp x26, x25, [sp, #48]37; ASM-NEXT: stp x24, x23, [sp, #64]38; ASM-NEXT: stp x22, x21, [sp, #80]39; ASM-NEXT: stp x20, x19, [sp, #96]40; ASM-NEXT: str x0, [sp, #8]41; ASM-NEXT: //APP42; ASM-NEXT: //NO_APP43; ASM-NEXT: //APP44; ASM-NEXT: //NO_APP45; ASM-NEXT: //APP46; ASM-NEXT: //NO_APP47; ASM-NEXT: ldr x0, [sp, #8]48; ASM-NEXT: ldp x20, x19, [sp, #96]49; ASM-NEXT: ldp x22, x21, [sp, #80]50; ASM-NEXT: ldp x24, x23, [sp, #64]51; ASM-NEXT: ldp x26, x25, [sp, #48]52; ASM-NEXT: ldp x28, x27, [sp, #32]53; ASM-NEXT: ldp x29, x30, [sp, #16]54; ASM-NEXT: add sp, sp, #11255; ASM-NEXT: autibsp56; ASM-NEXT: eor x17, x30, x30, lsl #157; ASM-NEXT: tbz x17, #62, .Lauth_success_058; ASM-NEXT: brk #0xc47159; ASM-NEXT: .Lauth_success_0:60; ASM-NEXT: braa x0, x1661; ASM-NEXT: .Lfunc_end0:62 63;; The same for AUTH_TCRETURN_BTI.64define i32 @test_scratch_reg_bti(ptr %callee, ptr %addr) "branch-target-enforcement" #0 {65entry:66 ;; Force spilling of LR67 tail call void asm sideeffect "", "~{lr}"()68 ;; Clobber x0-x15 and x18-x29. This is rather fragile but it was observed to69 ;; trick regalloc into allocating both x16 and x17 as inputs of AUTH_TCRETURN_BTI.70 tail call void asm sideeffect "", "~{x0},~{x1},~{x2},~{x3},~{x4},~{x5},~{x6},~{x7},~{x8},~{x9},~{x10},~{x11},~{x12},~{x13},~{x14},~{x15}"()71 tail call void asm sideeffect "", "~{x18},~{x19},~{x20},~{x21},~{x22},~{x23},~{x24},~{x25},~{x26},~{x27},~{x28},~{fp}"()72 %addr.i = ptrtoint ptr %addr to i6473 %call = tail call i32 %callee() #1 [ "ptrauth"(i32 0, i64 %addr.i) ]74 ret i32 %call75}76;; Ensure the specific tail call pseudo instruction is used.77; MIR-LABEL: name: test_scratch_reg_bti78; MIR: AUTH_TCRETURN_BTI79;80; ASM-LABEL: test_scratch_reg_bti:81; ASM-NEXT: pacibsp82; ASM-NEXT: sub sp, sp, #11283; ASM-NEXT: stp x29, x30, [sp, #16]84; ASM-NEXT: mov x16, x085; ASM-NEXT: stp x28, x27, [sp, #32]86; ASM-NEXT: stp x26, x25, [sp, #48]87; ASM-NEXT: stp x24, x23, [sp, #64]88; ASM-NEXT: stp x22, x21, [sp, #80]89; ASM-NEXT: stp x20, x19, [sp, #96]90; ASM-NEXT: str x1, [sp, #8]91; ASM-NEXT: //APP92; ASM-NEXT: //NO_APP93; ASM-NEXT: //APP94; ASM-NEXT: //NO_APP95; ASM-NEXT: //APP96; ASM-NEXT: //NO_APP97; ASM-NEXT: ldr x0, [sp, #8]98; ASM-NEXT: ldp x20, x19, [sp, #96]99; ASM-NEXT: ldp x22, x21, [sp, #80]100; ASM-NEXT: ldp x24, x23, [sp, #64]101; ASM-NEXT: ldp x26, x25, [sp, #48]102; ASM-NEXT: ldp x28, x27, [sp, #32]103; ASM-NEXT: ldp x29, x30, [sp, #16]104; ASM-NEXT: add sp, sp, #112105; ASM-NEXT: autibsp106; ASM-NEXT: eor x17, x30, x30, lsl #1107; ASM-NEXT: tbz x17, #62, .Lauth_success_1108; ASM-NEXT: brk #0xc471109; ASM-NEXT: .Lauth_success_1:110; ASM-NEXT: braa x16, x0111; ASM-NEXT: .Lfunc_end1:112 113attributes #0 = { nounwind "ptrauth-auth-traps" "ptrauth-calls" "ptrauth-returns" "target-features"="+pauth" }114