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1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py2; RUN: llc -mtriple=aarch64-unknown-linux-gnu < %s | FileCheck %s3 4; shift left5 6define i32 @and_signbit_shl(i32 %x, ptr %dst) {7; CHECK-LABEL: and_signbit_shl:8; CHECK: // %bb.0:9; CHECK-NEXT: lsl w8, w0, #810; CHECK-NEXT: and w0, w8, #0xff00000011; CHECK-NEXT: str w0, [x1]12; CHECK-NEXT: ret13 %t0 = and i32 %x, 4294901760 ; 0xFFFF000014 %r = shl i32 %t0, 815 store i32 %r, ptr %dst16 ret i32 %r17}18define i32 @and_nosignbit_shl(i32 %x, ptr %dst) {19; CHECK-LABEL: and_nosignbit_shl:20; CHECK: // %bb.0:21; CHECK-NEXT: lsl w8, w0, #822; CHECK-NEXT: and w0, w8, #0xff00000023; CHECK-NEXT: str w0, [x1]24; CHECK-NEXT: ret25 %t0 = and i32 %x, 2147418112 ; 0x7FFF000026 %r = shl i32 %t0, 827 store i32 %r, ptr %dst28 ret i32 %r29}30 31define i32 @or_signbit_shl(i32 %x, ptr %dst) {32; CHECK-LABEL: or_signbit_shl:33; CHECK: // %bb.0:34; CHECK-NEXT: lsl w8, w0, #835; CHECK-NEXT: orr w0, w8, #0xff00000036; CHECK-NEXT: str w0, [x1]37; CHECK-NEXT: ret38 %t0 = or i32 %x, 4294901760 ; 0xFFFF000039 %r = shl i32 %t0, 840 store i32 %r, ptr %dst41 ret i32 %r42}43define i32 @or_nosignbit_shl(i32 %x, ptr %dst) {44; CHECK-LABEL: or_nosignbit_shl:45; CHECK: // %bb.0:46; CHECK-NEXT: lsl w8, w0, #847; CHECK-NEXT: orr w0, w8, #0xff00000048; CHECK-NEXT: str w0, [x1]49; CHECK-NEXT: ret50 %t0 = or i32 %x, 2147418112 ; 0x7FFF000051 %r = shl i32 %t0, 852 store i32 %r, ptr %dst53 ret i32 %r54}55 56define i32 @xor_signbit_shl(i32 %x, ptr %dst) {57; CHECK-LABEL: xor_signbit_shl:58; CHECK: // %bb.0:59; CHECK-NEXT: lsl w8, w0, #860; CHECK-NEXT: eor w0, w8, #0xff00000061; CHECK-NEXT: str w0, [x1]62; CHECK-NEXT: ret63 %t0 = xor i32 %x, 4294901760 ; 0xFFFF000064 %r = shl i32 %t0, 865 store i32 %r, ptr %dst66 ret i32 %r67}68define i32 @xor_nosignbit_shl(i32 %x, ptr %dst) {69; CHECK-LABEL: xor_nosignbit_shl:70; CHECK: // %bb.0:71; CHECK-NEXT: lsl w8, w0, #872; CHECK-NEXT: eor w0, w8, #0xff00000073; CHECK-NEXT: str w0, [x1]74; CHECK-NEXT: ret75 %t0 = xor i32 %x, 2147418112 ; 0x7FFF000076 %r = shl i32 %t0, 877 store i32 %r, ptr %dst78 ret i32 %r79}80 81define i32 @add_signbit_shl(i32 %x, ptr %dst) {82; CHECK-LABEL: add_signbit_shl:83; CHECK: // %bb.0:84; CHECK-NEXT: mov w8, #-1677721685; CHECK-NEXT: add w0, w8, w0, lsl #886; CHECK-NEXT: str w0, [x1]87; CHECK-NEXT: ret88 %t0 = add i32 %x, 4294901760 ; 0xFFFF000089 %r = shl i32 %t0, 890 store i32 %r, ptr %dst91 ret i32 %r92}93define i32 @add_nosignbit_shl(i32 %x, ptr %dst) {94; CHECK-LABEL: add_nosignbit_shl:95; CHECK: // %bb.0:96; CHECK-NEXT: mov w8, #-1677721697; CHECK-NEXT: add w0, w8, w0, lsl #898; CHECK-NEXT: str w0, [x1]99; CHECK-NEXT: ret100 %t0 = add i32 %x, 2147418112 ; 0x7FFF0000101 %r = shl i32 %t0, 8102 store i32 %r, ptr %dst103 ret i32 %r104}105 106; logical shift right107 108define i32 @and_signbit_lshr(i32 %x, ptr %dst) {109; CHECK-LABEL: and_signbit_lshr:110; CHECK: // %bb.0:111; CHECK-NEXT: lsr w8, w0, #8112; CHECK-NEXT: and w0, w8, #0xffff00113; CHECK-NEXT: str w0, [x1]114; CHECK-NEXT: ret115 %t0 = and i32 %x, 4294901760 ; 0xFFFF0000116 %r = lshr i32 %t0, 8117 store i32 %r, ptr %dst118 ret i32 %r119}120define i32 @and_nosignbit_lshr(i32 %x, ptr %dst) {121; CHECK-LABEL: and_nosignbit_lshr:122; CHECK: // %bb.0:123; CHECK-NEXT: lsr w8, w0, #8124; CHECK-NEXT: and w0, w8, #0x7fff00125; CHECK-NEXT: str w0, [x1]126; CHECK-NEXT: ret127 %t0 = and i32 %x, 2147418112 ; 0x7FFF0000128 %r = lshr i32 %t0, 8129 store i32 %r, ptr %dst130 ret i32 %r131}132 133define i32 @or_signbit_lshr(i32 %x, ptr %dst) {134; CHECK-LABEL: or_signbit_lshr:135; CHECK: // %bb.0:136; CHECK-NEXT: lsr w8, w0, #8137; CHECK-NEXT: orr w0, w8, #0xffff00138; CHECK-NEXT: str w0, [x1]139; CHECK-NEXT: ret140 %t0 = or i32 %x, 4294901760 ; 0xFFFF0000141 %r = lshr i32 %t0, 8142 store i32 %r, ptr %dst143 ret i32 %r144}145define i32 @or_nosignbit_lshr(i32 %x, ptr %dst) {146; CHECK-LABEL: or_nosignbit_lshr:147; CHECK: // %bb.0:148; CHECK-NEXT: lsr w8, w0, #8149; CHECK-NEXT: orr w0, w8, #0x7fff00150; CHECK-NEXT: str w0, [x1]151; CHECK-NEXT: ret152 %t0 = or i32 %x, 2147418112 ; 0x7FFF0000153 %r = lshr i32 %t0, 8154 store i32 %r, ptr %dst155 ret i32 %r156}157 158define i32 @xor_signbit_lshr(i32 %x, ptr %dst) {159; CHECK-LABEL: xor_signbit_lshr:160; CHECK: // %bb.0:161; CHECK-NEXT: lsr w8, w0, #8162; CHECK-NEXT: eor w0, w8, #0xffff00163; CHECK-NEXT: str w0, [x1]164; CHECK-NEXT: ret165 %t0 = xor i32 %x, 4294901760 ; 0xFFFF0000166 %r = lshr i32 %t0, 8167 store i32 %r, ptr %dst168 ret i32 %r169}170define i32 @xor_nosignbit_lshr(i32 %x, ptr %dst) {171; CHECK-LABEL: xor_nosignbit_lshr:172; CHECK: // %bb.0:173; CHECK-NEXT: lsr w8, w0, #8174; CHECK-NEXT: eor w0, w8, #0x7fff00175; CHECK-NEXT: str w0, [x1]176; CHECK-NEXT: ret177 %t0 = xor i32 %x, 2147418112 ; 0x7FFF0000178 %r = lshr i32 %t0, 8179 store i32 %r, ptr %dst180 ret i32 %r181}182 183define i32 @add_signbit_lshr(i32 %x, ptr %dst) {184; CHECK-LABEL: add_signbit_lshr:185; CHECK: // %bb.0:186; CHECK-NEXT: sub w8, w0, #16, lsl #12 // =65536187; CHECK-NEXT: lsr w0, w8, #8188; CHECK-NEXT: str w0, [x1]189; CHECK-NEXT: ret190 %t0 = add i32 %x, 4294901760 ; 0xFFFF0000191 %r = lshr i32 %t0, 8192 store i32 %r, ptr %dst193 ret i32 %r194}195define i32 @add_nosignbit_lshr(i32 %x, ptr %dst) {196; CHECK-LABEL: add_nosignbit_lshr:197; CHECK: // %bb.0:198; CHECK-NEXT: mov w8, #2147418112199; CHECK-NEXT: add w8, w0, w8200; CHECK-NEXT: lsr w0, w8, #8201; CHECK-NEXT: str w0, [x1]202; CHECK-NEXT: ret203 %t0 = add i32 %x, 2147418112 ; 0x7FFF0000204 %r = lshr i32 %t0, 8205 store i32 %r, ptr %dst206 ret i32 %r207}208 209; arithmetic shift right210 211define i32 @and_signbit_ashr(i32 %x, ptr %dst) {212; CHECK-LABEL: and_signbit_ashr:213; CHECK: // %bb.0:214; CHECK-NEXT: asr w8, w0, #8215; CHECK-NEXT: and w0, w8, #0xffffff00216; CHECK-NEXT: str w0, [x1]217; CHECK-NEXT: ret218 %t0 = and i32 %x, 4294901760 ; 0xFFFF0000219 %r = ashr i32 %t0, 8220 store i32 %r, ptr %dst221 ret i32 %r222}223define i32 @and_nosignbit_ashr(i32 %x, ptr %dst) {224; CHECK-LABEL: and_nosignbit_ashr:225; CHECK: // %bb.0:226; CHECK-NEXT: lsr w8, w0, #8227; CHECK-NEXT: and w0, w8, #0x7fff00228; CHECK-NEXT: str w0, [x1]229; CHECK-NEXT: ret230 %t0 = and i32 %x, 2147418112 ; 0x7FFF0000231 %r = ashr i32 %t0, 8232 store i32 %r, ptr %dst233 ret i32 %r234}235 236define i32 @or_signbit_ashr(i32 %x, ptr %dst) {237; CHECK-LABEL: or_signbit_ashr:238; CHECK: // %bb.0:239; CHECK-NEXT: lsr w8, w0, #8240; CHECK-NEXT: orr w0, w8, #0xffffff00241; CHECK-NEXT: str w0, [x1]242; CHECK-NEXT: ret243 %t0 = or i32 %x, 4294901760 ; 0xFFFF0000244 %r = ashr i32 %t0, 8245 store i32 %r, ptr %dst246 ret i32 %r247}248define i32 @or_nosignbit_ashr(i32 %x, ptr %dst) {249; CHECK-LABEL: or_nosignbit_ashr:250; CHECK: // %bb.0:251; CHECK-NEXT: asr w8, w0, #8252; CHECK-NEXT: orr w0, w8, #0x7fff00253; CHECK-NEXT: str w0, [x1]254; CHECK-NEXT: ret255 %t0 = or i32 %x, 2147418112 ; 0x7FFF0000256 %r = ashr i32 %t0, 8257 store i32 %r, ptr %dst258 ret i32 %r259}260 261define i32 @xor_signbit_ashr(i32 %x, ptr %dst) {262; CHECK-LABEL: xor_signbit_ashr:263; CHECK: // %bb.0:264; CHECK-NEXT: asr w8, w0, #8265; CHECK-NEXT: eor w0, w8, #0xffffff00266; CHECK-NEXT: str w0, [x1]267; CHECK-NEXT: ret268 %t0 = xor i32 %x, 4294901760 ; 0xFFFF0000269 %r = ashr i32 %t0, 8270 store i32 %r, ptr %dst271 ret i32 %r272}273define i32 @xor_nosignbit_ashr(i32 %x, ptr %dst) {274; CHECK-LABEL: xor_nosignbit_ashr:275; CHECK: // %bb.0:276; CHECK-NEXT: asr w8, w0, #8277; CHECK-NEXT: eor w0, w8, #0x7fff00278; CHECK-NEXT: str w0, [x1]279; CHECK-NEXT: ret280 %t0 = xor i32 %x, 2147418112 ; 0x7FFF0000281 %r = ashr i32 %t0, 8282 store i32 %r, ptr %dst283 ret i32 %r284}285 286define i32 @add_signbit_ashr(i32 %x, ptr %dst) {287; CHECK-LABEL: add_signbit_ashr:288; CHECK: // %bb.0:289; CHECK-NEXT: sub w8, w0, #16, lsl #12 // =65536290; CHECK-NEXT: asr w0, w8, #8291; CHECK-NEXT: str w0, [x1]292; CHECK-NEXT: ret293 %t0 = add i32 %x, 4294901760 ; 0xFFFF0000294 %r = ashr i32 %t0, 8295 store i32 %r, ptr %dst296 ret i32 %r297}298define i32 @add_nosignbit_ashr(i32 %x, ptr %dst) {299; CHECK-LABEL: add_nosignbit_ashr:300; CHECK: // %bb.0:301; CHECK-NEXT: mov w8, #2147418112302; CHECK-NEXT: add w8, w0, w8303; CHECK-NEXT: asr w0, w8, #8304; CHECK-NEXT: str w0, [x1]305; CHECK-NEXT: ret306 %t0 = add i32 %x, 2147418112 ; 0x7FFF0000307 %r = ashr i32 %t0, 8308 store i32 %r, ptr %dst309 ret i32 %r310}311