68 lines · plain
1# RUN: llc -mtriple=aarch64 -mattr=+sve -start-before=greedy -stop-after=virtregrewriter -debug-only=regalloc %s -o /dev/null 2>&1 | FileCheck %s --check-prefix=DBG2# REQUIRES: asserts3 4# Check that the register allocator gets hints to reuse registers of one of it's operands.5---6name: prioritize_movprfx_hints7tracksRegLiveness: true8isSSA: false9noVRegs: false10body: |11 bb.0.entry:12 liveins: $z0, $z1, $z2, $z3, $p013 14 ; DBG: Machine code for function prioritize_movprfx_hints15 ;16 ; DBG: selectOrSplit ZPR:%417 ; DBG-NEXT: hints: $z0 $z1{{$}}18 ;19 ; DBG: selectOrSplit ZPR:%520 ; DBG-NEXT: hints: $z2 $z3{{$}}21 ;22 ; DBG: [%0 -> $z3] ZPR23 ; DBG: [%1 -> $z2] ZPR24 ; DBG: [%2 -> $z1] ZPR25 ; DBG: [%3 -> $z0] ZPR26 ; DBG: [%4 -> $z0] ZPR27 ; DBG: [%5 -> $z2] ZPR28 ; DBG: [%6 -> $z0] ZPR29 %0:zpr = COPY $z330 %1:zpr = COPY $z231 %2:zpr = COPY $z132 %3:zpr = COPY $z033 %4:zpr = SDIV_ZPZZ_D_UNDEF $p0, %3:zpr, %2:zpr34 %5:zpr = MUL_ZPZZ_D_UNDEF $p0, %1:zpr, %0:zpr35 %6:zpr = MUL_ZPZZ_D_UNDEF $p0, %5:zpr, %4:zpr36 $z0 = COPY %6:zpr37 RET_ReallyLR implicit $z038...39 40# Check that the register allocator prioritises hints that are set by the register41# allocator itself (i.e. to use z4 for the result register).42---43name: prioritize_regalloc_hints44isSSA: false45noVRegs: false46body: |47 bb.0.entry:48 %0:zpr = FDUP_ZI_S 0, implicit $vg49 %1:zpr = FDUP_ZI_S 16, implicit $vg50 %2:zpr = FDUP_ZI_S 32, implicit $vg51 %3:ppr_3b = PTRUE_S 31, implicit $vg52 53 ; DBG: Machine code for function prioritize_regalloc_hints54 ;55 ; DBG: selectOrSplit ZPR:%456 ; DBG-NEXT: hints: $z4{{$}}57 ;58 ; DBG: [%0 -> $z0] ZPR59 ; DBG: [%1 -> $z1] ZPR60 ; DBG: [%2 -> $z2] ZPR61 ; DBG: [%3 -> $p0] PPR_3b62 ; DBG: [%4 -> $z4] ZPR63 64 %4:zpr = FMLA_ZPZZZ_S_UNDEF %3, %0, %1, %265 $z4 = COPY %466 RET_ReallyLR implicit $z467...68