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1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 52; RUN: llc -mtriple=aarch64-none-eabi -global-isel=0 -verify-machineinstrs %s -o - | FileCheck %s --check-prefixes=CHECK,CHECK-SD3; RUN: llc -mtriple=aarch64-none-eabi -global-isel=1 -verify-machineinstrs %s -o - | FileCheck %s --check-prefixes=CHECK,CHECK-GI4 5define i8 @si8_7(i8 %a, i8 %b) {6; CHECK-SD-LABEL: si8_7:7; CHECK-SD: // %bb.0: // %entry8; CHECK-SD-NEXT: sxtb w8, w09; CHECK-SD-NEXT: mov w9, #-109 // =0xffffff9310; CHECK-SD-NEXT: mul w8, w8, w911; CHECK-SD-NEXT: add w8, w0, w8, lsr #812; CHECK-SD-NEXT: sbfx w9, w8, #2, #613; CHECK-SD-NEXT: and w8, w8, #0x8014; CHECK-SD-NEXT: add w8, w9, w8, lsr #715; CHECK-SD-NEXT: sub w8, w8, w8, lsl #316; CHECK-SD-NEXT: add w0, w0, w817; CHECK-SD-NEXT: ret18;19; CHECK-GI-LABEL: si8_7:20; CHECK-GI: // %bb.0: // %entry21; CHECK-GI-NEXT: sxtb w8, w022; CHECK-GI-NEXT: mov w9, #-109 // =0xffffff9323; CHECK-GI-NEXT: mul w8, w8, w924; CHECK-GI-NEXT: sxth w8, w825; CHECK-GI-NEXT: add w8, w0, w8, asr #826; CHECK-GI-NEXT: sbfx w8, w8, #2, #627; CHECK-GI-NEXT: ubfx w9, w8, #7, #128; CHECK-GI-NEXT: add w8, w8, w929; CHECK-GI-NEXT: lsl w9, w8, #330; CHECK-GI-NEXT: sub w8, w9, w831; CHECK-GI-NEXT: sub w0, w0, w832; CHECK-GI-NEXT: ret33entry:34 %s = srem i8 %a, 735 ret i8 %s36}37 38define i8 @si8_100(i8 %a, i8 %b) {39; CHECK-SD-LABEL: si8_100:40; CHECK-SD: // %bb.0: // %entry41; CHECK-SD-NEXT: sxtb w8, w042; CHECK-SD-NEXT: mov w9, #41 // =0x2943; CHECK-SD-NEXT: mul w8, w8, w944; CHECK-SD-NEXT: asr w9, w8, #1245; CHECK-SD-NEXT: add w8, w9, w8, lsr #3146; CHECK-SD-NEXT: mov w9, #100 // =0x6447; CHECK-SD-NEXT: msub w0, w8, w9, w048; CHECK-SD-NEXT: ret49;50; CHECK-GI-LABEL: si8_100:51; CHECK-GI: // %bb.0: // %entry52; CHECK-GI-NEXT: sxtb w8, w053; CHECK-GI-NEXT: mov w9, #41 // =0x2954; CHECK-GI-NEXT: mul w8, w8, w955; CHECK-GI-NEXT: sbfx w8, w8, #8, #856; CHECK-GI-NEXT: asr w8, w8, #457; CHECK-GI-NEXT: ubfx w9, w8, #7, #158; CHECK-GI-NEXT: add w8, w8, w959; CHECK-GI-NEXT: mov w9, #100 // =0x6460; CHECK-GI-NEXT: msub w0, w8, w9, w061; CHECK-GI-NEXT: ret62entry:63 %s = srem i8 %a, 10064 ret i8 %s65}66 67define i8 @ui8_7(i8 %a, i8 %b) {68; CHECK-SD-LABEL: ui8_7:69; CHECK-SD: // %bb.0: // %entry70; CHECK-SD-NEXT: mov w8, #37 // =0x2571; CHECK-SD-NEXT: and w9, w0, #0xff72; CHECK-SD-NEXT: mul w8, w9, w873; CHECK-SD-NEXT: lsr w8, w8, #874; CHECK-SD-NEXT: sub w9, w0, w875; CHECK-SD-NEXT: and w9, w9, #0xfe76; CHECK-SD-NEXT: add w8, w8, w9, lsr #177; CHECK-SD-NEXT: lsr w8, w8, #278; CHECK-SD-NEXT: sub w8, w8, w8, lsl #379; CHECK-SD-NEXT: add w0, w0, w880; CHECK-SD-NEXT: ret81;82; CHECK-GI-LABEL: ui8_7:83; CHECK-GI: // %bb.0: // %entry84; CHECK-GI-NEXT: mov w8, #37 // =0x2585; CHECK-GI-NEXT: and w9, w0, #0xff86; CHECK-GI-NEXT: mul w8, w9, w887; CHECK-GI-NEXT: lsr w8, w8, #888; CHECK-GI-NEXT: sub w9, w0, w889; CHECK-GI-NEXT: ubfx w9, w9, #1, #790; CHECK-GI-NEXT: add w8, w9, w891; CHECK-GI-NEXT: lsr w8, w8, #292; CHECK-GI-NEXT: lsl w9, w8, #393; CHECK-GI-NEXT: sub w8, w9, w894; CHECK-GI-NEXT: sub w0, w0, w895; CHECK-GI-NEXT: ret96entry:97 %s = urem i8 %a, 798 ret i8 %s99}100 101define i8 @ui8_100(i8 %a, i8 %b) {102; CHECK-SD-LABEL: ui8_100:103; CHECK-SD: // %bb.0: // %entry104; CHECK-SD-NEXT: mov w8, #41 // =0x29105; CHECK-SD-NEXT: and w9, w0, #0xff106; CHECK-SD-NEXT: mul w8, w9, w8107; CHECK-SD-NEXT: mov w9, #100 // =0x64108; CHECK-SD-NEXT: lsr w8, w8, #12109; CHECK-SD-NEXT: msub w0, w8, w9, w0110; CHECK-SD-NEXT: ret111;112; CHECK-GI-LABEL: ui8_100:113; CHECK-GI: // %bb.0: // %entry114; CHECK-GI-NEXT: mov w8, #41 // =0x29115; CHECK-GI-NEXT: and w9, w0, #0xff116; CHECK-GI-NEXT: mul w8, w9, w8117; CHECK-GI-NEXT: mov w9, #100 // =0x64118; CHECK-GI-NEXT: lsr w8, w8, #8119; CHECK-GI-NEXT: lsr w8, w8, #4120; CHECK-GI-NEXT: msub w0, w8, w9, w0121; CHECK-GI-NEXT: ret122entry:123 %s = urem i8 %a, 100124 ret i8 %s125}126 127define i16 @si16_7(i16 %a, i16 %b) {128; CHECK-SD-LABEL: si16_7:129; CHECK-SD: // %bb.0: // %entry130; CHECK-SD-NEXT: sxth w8, w0131; CHECK-SD-NEXT: mov w9, #18725 // =0x4925132; CHECK-SD-NEXT: mul w8, w8, w9133; CHECK-SD-NEXT: asr w9, w8, #17134; CHECK-SD-NEXT: add w8, w9, w8, lsr #31135; CHECK-SD-NEXT: sub w8, w8, w8, lsl #3136; CHECK-SD-NEXT: add w0, w0, w8137; CHECK-SD-NEXT: ret138;139; CHECK-GI-LABEL: si16_7:140; CHECK-GI: // %bb.0: // %entry141; CHECK-GI-NEXT: sxth w8, w0142; CHECK-GI-NEXT: mov w9, #18725 // =0x4925143; CHECK-GI-NEXT: mul w8, w8, w9144; CHECK-GI-NEXT: asr w8, w8, #16145; CHECK-GI-NEXT: asr w8, w8, #1146; CHECK-GI-NEXT: ubfx w9, w8, #15, #1147; CHECK-GI-NEXT: add w8, w8, w9148; CHECK-GI-NEXT: lsl w9, w8, #3149; CHECK-GI-NEXT: sub w8, w9, w8150; CHECK-GI-NEXT: sub w0, w0, w8151; CHECK-GI-NEXT: ret152entry:153 %s = srem i16 %a, 7154 ret i16 %s155}156 157define i16 @si16_100(i16 %a, i16 %b) {158; CHECK-SD-LABEL: si16_100:159; CHECK-SD: // %bb.0: // %entry160; CHECK-SD-NEXT: sxth w8, w0161; CHECK-SD-NEXT: mov w9, #5243 // =0x147b162; CHECK-SD-NEXT: mul w8, w8, w9163; CHECK-SD-NEXT: asr w9, w8, #19164; CHECK-SD-NEXT: add w8, w9, w8, lsr #31165; CHECK-SD-NEXT: mov w9, #100 // =0x64166; CHECK-SD-NEXT: msub w0, w8, w9, w0167; CHECK-SD-NEXT: ret168;169; CHECK-GI-LABEL: si16_100:170; CHECK-GI: // %bb.0: // %entry171; CHECK-GI-NEXT: sxth w8, w0172; CHECK-GI-NEXT: mov w9, #5243 // =0x147b173; CHECK-GI-NEXT: mul w8, w8, w9174; CHECK-GI-NEXT: asr w8, w8, #16175; CHECK-GI-NEXT: asr w8, w8, #3176; CHECK-GI-NEXT: ubfx w9, w8, #15, #1177; CHECK-GI-NEXT: add w8, w8, w9178; CHECK-GI-NEXT: mov w9, #100 // =0x64179; CHECK-GI-NEXT: msub w0, w8, w9, w0180; CHECK-GI-NEXT: ret181entry:182 %s = srem i16 %a, 100183 ret i16 %s184}185 186define i16 @ui16_7(i16 %a, i16 %b) {187; CHECK-SD-LABEL: ui16_7:188; CHECK-SD: // %bb.0: // %entry189; CHECK-SD-NEXT: mov w8, #9363 // =0x2493190; CHECK-SD-NEXT: and w9, w0, #0xffff191; CHECK-SD-NEXT: mul w8, w9, w8192; CHECK-SD-NEXT: lsr w8, w8, #16193; CHECK-SD-NEXT: sub w9, w0, w8194; CHECK-SD-NEXT: and w9, w9, #0xfffe195; CHECK-SD-NEXT: add w8, w8, w9, lsr #1196; CHECK-SD-NEXT: lsr w8, w8, #2197; CHECK-SD-NEXT: sub w8, w8, w8, lsl #3198; CHECK-SD-NEXT: add w0, w0, w8199; CHECK-SD-NEXT: ret200;201; CHECK-GI-LABEL: ui16_7:202; CHECK-GI: // %bb.0: // %entry203; CHECK-GI-NEXT: mov w8, #9363 // =0x2493204; CHECK-GI-NEXT: and w9, w0, #0xffff205; CHECK-GI-NEXT: mul w8, w9, w8206; CHECK-GI-NEXT: lsr w8, w8, #16207; CHECK-GI-NEXT: sub w9, w0, w8208; CHECK-GI-NEXT: ubfx w9, w9, #1, #15209; CHECK-GI-NEXT: add w8, w9, w8210; CHECK-GI-NEXT: lsr w8, w8, #2211; CHECK-GI-NEXT: lsl w9, w8, #3212; CHECK-GI-NEXT: sub w8, w9, w8213; CHECK-GI-NEXT: sub w0, w0, w8214; CHECK-GI-NEXT: ret215entry:216 %s = urem i16 %a, 7217 ret i16 %s218}219 220define i16 @ui16_100(i16 %a, i16 %b) {221; CHECK-SD-LABEL: ui16_100:222; CHECK-SD: // %bb.0: // %entry223; CHECK-SD-NEXT: ubfx w8, w0, #2, #14224; CHECK-SD-NEXT: mov w9, #5243 // =0x147b225; CHECK-SD-NEXT: mul w8, w8, w9226; CHECK-SD-NEXT: mov w9, #100 // =0x64227; CHECK-SD-NEXT: lsr w8, w8, #17228; CHECK-SD-NEXT: msub w0, w8, w9, w0229; CHECK-SD-NEXT: ret230;231; CHECK-GI-LABEL: ui16_100:232; CHECK-GI: // %bb.0: // %entry233; CHECK-GI-NEXT: ubfx w8, w0, #2, #14234; CHECK-GI-NEXT: mov w9, #5243 // =0x147b235; CHECK-GI-NEXT: mul w8, w8, w9236; CHECK-GI-NEXT: mov w9, #100 // =0x64237; CHECK-GI-NEXT: lsr w8, w8, #16238; CHECK-GI-NEXT: lsr w8, w8, #1239; CHECK-GI-NEXT: msub w0, w8, w9, w0240; CHECK-GI-NEXT: ret241entry:242 %s = urem i16 %a, 100243 ret i16 %s244}245 246define i32 @si32_7(i32 %a, i32 %b) {247; CHECK-SD-LABEL: si32_7:248; CHECK-SD: // %bb.0: // %entry249; CHECK-SD-NEXT: mov w8, #9363 // =0x2493250; CHECK-SD-NEXT: // kill: def $w0 killed $w0 def $x0251; CHECK-SD-NEXT: movk w8, #37449, lsl #16252; CHECK-SD-NEXT: smull x8, w0, w8253; CHECK-SD-NEXT: add x8, x0, x8, lsr #32254; CHECK-SD-NEXT: asr w9, w8, #2255; CHECK-SD-NEXT: add w8, w9, w8, lsr #31256; CHECK-SD-NEXT: sub w8, w8, w8, lsl #3257; CHECK-SD-NEXT: add w0, w0, w8258; CHECK-SD-NEXT: ret259;260; CHECK-GI-LABEL: si32_7:261; CHECK-GI: // %bb.0: // %entry262; CHECK-GI-NEXT: mov w8, #9363 // =0x2493263; CHECK-GI-NEXT: // kill: def $w0 killed $w0 def $x0264; CHECK-GI-NEXT: movk w8, #37449, lsl #16265; CHECK-GI-NEXT: smull x8, w0, w8266; CHECK-GI-NEXT: add x8, x0, x8, asr #32267; CHECK-GI-NEXT: asr w8, w8, #2268; CHECK-GI-NEXT: add w8, w8, w8, lsr #31269; CHECK-GI-NEXT: lsl w9, w8, #3270; CHECK-GI-NEXT: sub w8, w9, w8271; CHECK-GI-NEXT: sub w0, w0, w8272; CHECK-GI-NEXT: ret273entry:274 %s = srem i32 %a, 7275 ret i32 %s276}277 278define i32 @si32_100(i32 %a, i32 %b) {279; CHECK-SD-LABEL: si32_100:280; CHECK-SD: // %bb.0: // %entry281; CHECK-SD-NEXT: mov w8, #34079 // =0x851f282; CHECK-SD-NEXT: mov w9, #100 // =0x64283; CHECK-SD-NEXT: movk w8, #20971, lsl #16284; CHECK-SD-NEXT: smull x8, w0, w8285; CHECK-SD-NEXT: asr x8, x8, #37286; CHECK-SD-NEXT: add w8, w8, w8, lsr #31287; CHECK-SD-NEXT: msub w0, w8, w9, w0288; CHECK-SD-NEXT: ret289;290; CHECK-GI-LABEL: si32_100:291; CHECK-GI: // %bb.0: // %entry292; CHECK-GI-NEXT: mov w8, #34079 // =0x851f293; CHECK-GI-NEXT: mov w9, #100 // =0x64294; CHECK-GI-NEXT: movk w8, #20971, lsl #16295; CHECK-GI-NEXT: smull x8, w0, w8296; CHECK-GI-NEXT: asr x8, x8, #32297; CHECK-GI-NEXT: asr w8, w8, #5298; CHECK-GI-NEXT: add w8, w8, w8, lsr #31299; CHECK-GI-NEXT: msub w0, w8, w9, w0300; CHECK-GI-NEXT: ret301entry:302 %s = srem i32 %a, 100303 ret i32 %s304}305 306define i32 @ui32_7(i32 %a, i32 %b) {307; CHECK-SD-LABEL: ui32_7:308; CHECK-SD: // %bb.0: // %entry309; CHECK-SD-NEXT: mov w8, #18725 // =0x4925310; CHECK-SD-NEXT: movk w8, #9362, lsl #16311; CHECK-SD-NEXT: umull x8, w0, w8312; CHECK-SD-NEXT: lsr x8, x8, #32313; CHECK-SD-NEXT: sub w9, w0, w8314; CHECK-SD-NEXT: add w8, w8, w9, lsr #1315; CHECK-SD-NEXT: lsr w8, w8, #2316; CHECK-SD-NEXT: sub w8, w8, w8, lsl #3317; CHECK-SD-NEXT: add w0, w0, w8318; CHECK-SD-NEXT: ret319;320; CHECK-GI-LABEL: ui32_7:321; CHECK-GI: // %bb.0: // %entry322; CHECK-GI-NEXT: mov w8, #18725 // =0x4925323; CHECK-GI-NEXT: movk w8, #9362, lsl #16324; CHECK-GI-NEXT: umull x8, w0, w8325; CHECK-GI-NEXT: lsr x8, x8, #32326; CHECK-GI-NEXT: sub w9, w0, w8327; CHECK-GI-NEXT: add w8, w8, w9, lsr #1328; CHECK-GI-NEXT: lsr w8, w8, #2329; CHECK-GI-NEXT: lsl w9, w8, #3330; CHECK-GI-NEXT: sub w8, w9, w8331; CHECK-GI-NEXT: sub w0, w0, w8332; CHECK-GI-NEXT: ret333entry:334 %s = urem i32 %a, 7335 ret i32 %s336}337 338define i32 @ui32_100(i32 %a, i32 %b) {339; CHECK-LABEL: ui32_100:340; CHECK: // %bb.0: // %entry341; CHECK-NEXT: mov w8, #34079 // =0x851f342; CHECK-NEXT: mov w9, #100 // =0x64343; CHECK-NEXT: movk w8, #20971, lsl #16344; CHECK-NEXT: umull x8, w0, w8345; CHECK-NEXT: lsr x8, x8, #37346; CHECK-NEXT: msub w0, w8, w9, w0347; CHECK-NEXT: ret348entry:349 %s = urem i32 %a, 100350 ret i32 %s351}352 353define i64 @si64_7(i64 %a, i64 %b) {354; CHECK-SD-LABEL: si64_7:355; CHECK-SD: // %bb.0: // %entry356; CHECK-SD-NEXT: mov x8, #18725 // =0x4925357; CHECK-SD-NEXT: movk x8, #9362, lsl #16358; CHECK-SD-NEXT: movk x8, #37449, lsl #32359; CHECK-SD-NEXT: movk x8, #18724, lsl #48360; CHECK-SD-NEXT: smulh x8, x0, x8361; CHECK-SD-NEXT: asr x9, x8, #1362; CHECK-SD-NEXT: add x8, x9, x8, lsr #63363; CHECK-SD-NEXT: sub x8, x8, x8, lsl #3364; CHECK-SD-NEXT: add x0, x0, x8365; CHECK-SD-NEXT: ret366;367; CHECK-GI-LABEL: si64_7:368; CHECK-GI: // %bb.0: // %entry369; CHECK-GI-NEXT: mov x8, #18725 // =0x4925370; CHECK-GI-NEXT: movk x8, #9362, lsl #16371; CHECK-GI-NEXT: movk x8, #37449, lsl #32372; CHECK-GI-NEXT: movk x8, #18724, lsl #48373; CHECK-GI-NEXT: smulh x8, x0, x8374; CHECK-GI-NEXT: asr x8, x8, #1375; CHECK-GI-NEXT: add x8, x8, x8, lsr #63376; CHECK-GI-NEXT: lsl x9, x8, #3377; CHECK-GI-NEXT: sub x8, x9, x8378; CHECK-GI-NEXT: sub x0, x0, x8379; CHECK-GI-NEXT: ret380entry:381 %s = srem i64 %a, 7382 ret i64 %s383}384 385define i64 @si64_100(i64 %a, i64 %b) {386; CHECK-SD-LABEL: si64_100:387; CHECK-SD: // %bb.0: // %entry388; CHECK-SD-NEXT: mov x8, #55051 // =0xd70b389; CHECK-SD-NEXT: movk x8, #28835, lsl #16390; CHECK-SD-NEXT: movk x8, #2621, lsl #32391; CHECK-SD-NEXT: movk x8, #41943, lsl #48392; CHECK-SD-NEXT: smulh x8, x0, x8393; CHECK-SD-NEXT: add x8, x8, x0394; CHECK-SD-NEXT: asr x9, x8, #6395; CHECK-SD-NEXT: add x8, x9, x8, lsr #63396; CHECK-SD-NEXT: mov w9, #100 // =0x64397; CHECK-SD-NEXT: msub x0, x8, x9, x0398; CHECK-SD-NEXT: ret399;400; CHECK-GI-LABEL: si64_100:401; CHECK-GI: // %bb.0: // %entry402; CHECK-GI-NEXT: mov x8, #55051 // =0xd70b403; CHECK-GI-NEXT: mov w9, #100 // =0x64404; CHECK-GI-NEXT: movk x8, #28835, lsl #16405; CHECK-GI-NEXT: movk x8, #2621, lsl #32406; CHECK-GI-NEXT: movk x8, #41943, lsl #48407; CHECK-GI-NEXT: smulh x8, x0, x8408; CHECK-GI-NEXT: add x8, x8, x0409; CHECK-GI-NEXT: asr x8, x8, #6410; CHECK-GI-NEXT: add x8, x8, x8, lsr #63411; CHECK-GI-NEXT: msub x0, x8, x9, x0412; CHECK-GI-NEXT: ret413entry:414 %s = srem i64 %a, 100415 ret i64 %s416}417 418define i64 @ui64_7(i64 %a, i64 %b) {419; CHECK-SD-LABEL: ui64_7:420; CHECK-SD: // %bb.0: // %entry421; CHECK-SD-NEXT: mov x8, #9363 // =0x2493422; CHECK-SD-NEXT: movk x8, #37449, lsl #16423; CHECK-SD-NEXT: movk x8, #18724, lsl #32424; CHECK-SD-NEXT: movk x8, #9362, lsl #48425; CHECK-SD-NEXT: umulh x8, x0, x8426; CHECK-SD-NEXT: sub x9, x0, x8427; CHECK-SD-NEXT: add x8, x8, x9, lsr #1428; CHECK-SD-NEXT: lsr x8, x8, #2429; CHECK-SD-NEXT: sub x8, x8, x8, lsl #3430; CHECK-SD-NEXT: add x0, x0, x8431; CHECK-SD-NEXT: ret432;433; CHECK-GI-LABEL: ui64_7:434; CHECK-GI: // %bb.0: // %entry435; CHECK-GI-NEXT: mov x8, #9363 // =0x2493436; CHECK-GI-NEXT: movk x8, #37449, lsl #16437; CHECK-GI-NEXT: movk x8, #18724, lsl #32438; CHECK-GI-NEXT: movk x8, #9362, lsl #48439; CHECK-GI-NEXT: umulh x8, x0, x8440; CHECK-GI-NEXT: sub x9, x0, x8441; CHECK-GI-NEXT: add x8, x8, x9, lsr #1442; CHECK-GI-NEXT: lsr x8, x8, #2443; CHECK-GI-NEXT: lsl x9, x8, #3444; CHECK-GI-NEXT: sub x8, x9, x8445; CHECK-GI-NEXT: sub x0, x0, x8446; CHECK-GI-NEXT: ret447entry:448 %s = urem i64 %a, 7449 ret i64 %s450}451 452define i64 @ui64_100(i64 %a, i64 %b) {453; CHECK-LABEL: ui64_100:454; CHECK: // %bb.0: // %entry455; CHECK-NEXT: mov x9, #62915 // =0xf5c3456; CHECK-NEXT: lsr x8, x0, #2457; CHECK-NEXT: movk x9, #23592, lsl #16458; CHECK-NEXT: movk x9, #49807, lsl #32459; CHECK-NEXT: movk x9, #10485, lsl #48460; CHECK-NEXT: umulh x8, x8, x9461; CHECK-NEXT: mov w9, #100 // =0x64462; CHECK-NEXT: lsr x8, x8, #2463; CHECK-NEXT: msub x0, x8, x9, x0464; CHECK-NEXT: ret465entry:466 %s = urem i64 %a, 100467 ret i64 %s468}469 470define i128 @si128_7(i128 %a, i128 %b) {471; CHECK-LABEL: si128_7:472; CHECK: // %bb.0: // %entry473; CHECK-NEXT: str x30, [sp, #-16]! // 8-byte Folded Spill474; CHECK-NEXT: .cfi_def_cfa_offset 16475; CHECK-NEXT: .cfi_offset w30, -16476; CHECK-NEXT: mov w2, #7 // =0x7477; CHECK-NEXT: mov x3, xzr478; CHECK-NEXT: bl __modti3479; CHECK-NEXT: ldr x30, [sp], #16 // 8-byte Folded Reload480; CHECK-NEXT: ret481entry:482 %s = srem i128 %a, 7483 ret i128 %s484}485 486define i128 @si128_100(i128 %a, i128 %b) {487; CHECK-LABEL: si128_100:488; CHECK: // %bb.0: // %entry489; CHECK-NEXT: str x30, [sp, #-16]! // 8-byte Folded Spill490; CHECK-NEXT: .cfi_def_cfa_offset 16491; CHECK-NEXT: .cfi_offset w30, -16492; CHECK-NEXT: mov w2, #100 // =0x64493; CHECK-NEXT: mov x3, xzr494; CHECK-NEXT: bl __modti3495; CHECK-NEXT: ldr x30, [sp], #16 // 8-byte Folded Reload496; CHECK-NEXT: ret497entry:498 %s = srem i128 %a, 100499 ret i128 %s500}501 502define i128 @ui128_7(i128 %a, i128 %b) {503; CHECK-SD-LABEL: ui128_7:504; CHECK-SD: // %bb.0: // %entry505; CHECK-SD-NEXT: str x30, [sp, #-16]! // 8-byte Folded Spill506; CHECK-SD-NEXT: .cfi_def_cfa_offset 16507; CHECK-SD-NEXT: .cfi_offset w30, -16508; CHECK-SD-NEXT: mov w2, #7 // =0x7509; CHECK-SD-NEXT: mov x3, xzr510; CHECK-SD-NEXT: bl __umodti3511; CHECK-SD-NEXT: ldr x30, [sp], #16 // 8-byte Folded Reload512; CHECK-SD-NEXT: ret513;514; CHECK-GI-LABEL: ui128_7:515; CHECK-GI: // %bb.0: // %entry516; CHECK-GI-NEXT: mov x8, #18725 // =0x4925517; CHECK-GI-NEXT: mov x10, #9362 // =0x2492518; CHECK-GI-NEXT: movk x8, #9362, lsl #16519; CHECK-GI-NEXT: movk x10, #37449, lsl #16520; CHECK-GI-NEXT: movk x8, #37449, lsl #32521; CHECK-GI-NEXT: movk x10, #18724, lsl #32522; CHECK-GI-NEXT: movk x8, #18724, lsl #48523; CHECK-GI-NEXT: movk x10, #9362, lsl #48524; CHECK-GI-NEXT: mul x9, x1, x8525; CHECK-GI-NEXT: mul x11, x0, x10526; CHECK-GI-NEXT: umulh x12, x0, x8527; CHECK-GI-NEXT: mul x13, x1, x10528; CHECK-GI-NEXT: adds x9, x9, x11529; CHECK-GI-NEXT: umulh x14, x1, x8530; CHECK-GI-NEXT: cset w11, hs531; CHECK-GI-NEXT: cmn x9, x12532; CHECK-GI-NEXT: and x9, x11, #0x1533; CHECK-GI-NEXT: sub x12, x0, x0534; CHECK-GI-NEXT: umulh x15, x0, x10535; CHECK-GI-NEXT: cset w11, hs536; CHECK-GI-NEXT: and x11, x11, #0x1537; CHECK-GI-NEXT: add x12, x13, x12538; CHECK-GI-NEXT: and x13, xzr, #0x1539; CHECK-GI-NEXT: umulh x8, xzr, x8540; CHECK-GI-NEXT: add x9, x9, x11541; CHECK-GI-NEXT: and x11, xzr, #0x1542; CHECK-GI-NEXT: adds x12, x12, x14543; CHECK-GI-NEXT: add x11, x11, x13544; CHECK-GI-NEXT: umulh x10, x1, x10545; CHECK-GI-NEXT: cset w13, hs546; CHECK-GI-NEXT: adds x12, x12, x15547; CHECK-GI-NEXT: and x13, x13, #0x1548; CHECK-GI-NEXT: umulh x14, x0, xzr549; CHECK-GI-NEXT: cset w15, hs550; CHECK-GI-NEXT: adds x9, x12, x9551; CHECK-GI-NEXT: add x11, x11, x13552; CHECK-GI-NEXT: and x12, x15, #0x1553; CHECK-GI-NEXT: cset w13, hs554; CHECK-GI-NEXT: add x11, x11, x12555; CHECK-GI-NEXT: and x12, x13, #0x1556; CHECK-GI-NEXT: add x8, x8, x10557; CHECK-GI-NEXT: add x10, x11, x12558; CHECK-GI-NEXT: add x8, x8, x14559; CHECK-GI-NEXT: add x8, x8, x10560; CHECK-GI-NEXT: subs x10, x0, x9561; CHECK-GI-NEXT: sbc x11, x1, x8562; CHECK-GI-NEXT: extr x10, x11, x10, #1563; CHECK-GI-NEXT: lsr x11, x11, #1564; CHECK-GI-NEXT: adds x9, x10, x9565; CHECK-GI-NEXT: mov w10, #7 // =0x7566; CHECK-GI-NEXT: adc x8, x11, x8567; CHECK-GI-NEXT: extr x9, x8, x9, #2568; CHECK-GI-NEXT: lsr x8, x8, #2569; CHECK-GI-NEXT: umulh x10, x9, x10570; CHECK-GI-NEXT: lsl x11, x9, #3571; CHECK-GI-NEXT: lsl x12, x8, #3572; CHECK-GI-NEXT: sub x9, x11, x9573; CHECK-GI-NEXT: sub x8, x12, x8574; CHECK-GI-NEXT: subs x0, x0, x9575; CHECK-GI-NEXT: add x8, x8, x10576; CHECK-GI-NEXT: sbc x1, x1, x8577; CHECK-GI-NEXT: ret578entry:579 %s = urem i128 %a, 7580 ret i128 %s581}582 583define i128 @ui128_100(i128 %a, i128 %b) {584; CHECK-SD-LABEL: ui128_100:585; CHECK-SD: // %bb.0: // %entry586; CHECK-SD-NEXT: str x30, [sp, #-16]! // 8-byte Folded Spill587; CHECK-SD-NEXT: .cfi_def_cfa_offset 16588; CHECK-SD-NEXT: .cfi_offset w30, -16589; CHECK-SD-NEXT: mov w2, #100 // =0x64590; CHECK-SD-NEXT: mov x3, xzr591; CHECK-SD-NEXT: bl __umodti3592; CHECK-SD-NEXT: ldr x30, [sp], #16 // 8-byte Folded Reload593; CHECK-SD-NEXT: ret594;595; CHECK-GI-LABEL: ui128_100:596; CHECK-GI: // %bb.0: // %entry597; CHECK-GI-NEXT: mov x8, #23593 // =0x5c29598; CHECK-GI-NEXT: mov x10, #62914 // =0xf5c2599; CHECK-GI-NEXT: movk x8, #49807, lsl #16600; CHECK-GI-NEXT: movk x10, #23592, lsl #16601; CHECK-GI-NEXT: movk x8, #10485, lsl #32602; CHECK-GI-NEXT: movk x10, #49807, lsl #32603; CHECK-GI-NEXT: movk x8, #36700, lsl #48604; CHECK-GI-NEXT: movk x10, #10485, lsl #48605; CHECK-GI-NEXT: mul x9, x1, x8606; CHECK-GI-NEXT: mul x11, x0, x10607; CHECK-GI-NEXT: umulh x12, x0, x8608; CHECK-GI-NEXT: mul x13, x1, x10609; CHECK-GI-NEXT: adds x9, x9, x11610; CHECK-GI-NEXT: umulh x14, x1, x8611; CHECK-GI-NEXT: cset w11, hs612; CHECK-GI-NEXT: cmn x9, x12613; CHECK-GI-NEXT: and x9, x11, #0x1614; CHECK-GI-NEXT: sub x12, x0, x0615; CHECK-GI-NEXT: umulh x15, x0, x10616; CHECK-GI-NEXT: cset w11, hs617; CHECK-GI-NEXT: and x11, x11, #0x1618; CHECK-GI-NEXT: add x12, x13, x12619; CHECK-GI-NEXT: and x13, xzr, #0x1620; CHECK-GI-NEXT: umulh x8, xzr, x8621; CHECK-GI-NEXT: add x9, x9, x11622; CHECK-GI-NEXT: and x11, xzr, #0x1623; CHECK-GI-NEXT: adds x12, x12, x14624; CHECK-GI-NEXT: add x11, x11, x13625; CHECK-GI-NEXT: umulh x10, x1, x10626; CHECK-GI-NEXT: cset w13, hs627; CHECK-GI-NEXT: adds x12, x12, x15628; CHECK-GI-NEXT: and x13, x13, #0x1629; CHECK-GI-NEXT: umulh x14, x0, xzr630; CHECK-GI-NEXT: cset w15, hs631; CHECK-GI-NEXT: adds x9, x12, x9632; CHECK-GI-NEXT: add x11, x11, x13633; CHECK-GI-NEXT: and x12, x15, #0x1634; CHECK-GI-NEXT: cset w13, hs635; CHECK-GI-NEXT: add x11, x11, x12636; CHECK-GI-NEXT: and x12, x13, #0x1637; CHECK-GI-NEXT: add x8, x8, x10638; CHECK-GI-NEXT: add x10, x11, x12639; CHECK-GI-NEXT: add x8, x8, x14640; CHECK-GI-NEXT: add x8, x8, x10641; CHECK-GI-NEXT: mov w10, #100 // =0x64642; CHECK-GI-NEXT: extr x9, x8, x9, #4643; CHECK-GI-NEXT: lsr x8, x8, #4644; CHECK-GI-NEXT: umulh x11, x9, x10645; CHECK-GI-NEXT: mul x9, x9, x10646; CHECK-GI-NEXT: madd x8, x8, x10, x11647; CHECK-GI-NEXT: subs x0, x0, x9648; CHECK-GI-NEXT: sbc x1, x1, x8649; CHECK-GI-NEXT: ret650entry:651 %s = urem i128 %a, 100652 ret i128 %s653}654 655define <2 x i8> @sv2i8_7(<2 x i8> %d, <2 x i8> %e) {656; CHECK-SD-LABEL: sv2i8_7:657; CHECK-SD: // %bb.0: // %entry658; CHECK-SD-NEXT: shl v1.2s, v0.2s, #24659; CHECK-SD-NEXT: mov w8, #9363 // =0x2493660; CHECK-SD-NEXT: movi v3.2s, #7661; CHECK-SD-NEXT: movk w8, #37449, lsl #16662; CHECK-SD-NEXT: dup v2.2s, w8663; CHECK-SD-NEXT: sshr v0.2s, v1.2s, #24664; CHECK-SD-NEXT: smull v2.2d, v0.2s, v2.2s665; CHECK-SD-NEXT: shrn v2.2s, v2.2d, #32666; CHECK-SD-NEXT: ssra v2.2s, v1.2s, #24667; CHECK-SD-NEXT: sshr v1.2s, v2.2s, #2668; CHECK-SD-NEXT: usra v1.2s, v2.2s, #31669; CHECK-SD-NEXT: mls v0.2s, v1.2s, v3.2s670; CHECK-SD-NEXT: ret671;672; CHECK-GI-LABEL: sv2i8_7:673; CHECK-GI: // %bb.0: // %entry674; CHECK-GI-NEXT: mov w8, #65427 // =0xff93675; CHECK-GI-NEXT: fmov s1, w8676; CHECK-GI-NEXT: mov v1.h[1], w8677; CHECK-GI-NEXT: shl v1.4h, v1.4h, #8678; CHECK-GI-NEXT: sshr v1.4h, v1.4h, #8679; CHECK-GI-NEXT: smov w8, v1.h[0]680; CHECK-GI-NEXT: smov w9, v1.h[1]681; CHECK-GI-NEXT: shl v1.2s, v0.2s, #24682; CHECK-GI-NEXT: sshr v1.2s, v1.2s, #24683; CHECK-GI-NEXT: fmov s2, w8684; CHECK-GI-NEXT: mov w8, #8 // =0x8685; CHECK-GI-NEXT: mov v2.s[1], w9686; CHECK-GI-NEXT: mul v1.2s, v1.2s, v2.2s687; CHECK-GI-NEXT: fmov s2, w8688; CHECK-GI-NEXT: mov v2.h[1], w8689; CHECK-GI-NEXT: mov w8, #2 // =0x2690; CHECK-GI-NEXT: uzp1 v1.4h, v1.4h, v0.4h691; CHECK-GI-NEXT: neg v2.4h, v2.4h692; CHECK-GI-NEXT: sshl v1.4h, v1.4h, v2.4h693; CHECK-GI-NEXT: fmov s2, w8694; CHECK-GI-NEXT: ushll v1.4s, v1.4h, #0695; CHECK-GI-NEXT: mov v2.b[1], w8696; CHECK-GI-NEXT: mov w8, #7 // =0x7697; CHECK-GI-NEXT: fmov s3, w8698; CHECK-GI-NEXT: add v1.2s, v1.2s, v0.2s699; CHECK-GI-NEXT: mov v3.b[1], w8700; CHECK-GI-NEXT: neg v2.8b, v2.8b701; CHECK-GI-NEXT: mov w9, v1.s[1]702; CHECK-GI-NEXT: mov v1.b[1], w9703; CHECK-GI-NEXT: sshl v1.8b, v1.8b, v2.8b704; CHECK-GI-NEXT: neg v2.8b, v3.8b705; CHECK-GI-NEXT: movi v3.2s, #7706; CHECK-GI-NEXT: ushl v2.8b, v1.8b, v2.8b707; CHECK-GI-NEXT: umov w8, v1.b[0]708; CHECK-GI-NEXT: umov w10, v1.b[1]709; CHECK-GI-NEXT: umov w9, v2.b[0]710; CHECK-GI-NEXT: umov w11, v2.b[1]711; CHECK-GI-NEXT: fmov s1, w8712; CHECK-GI-NEXT: fmov s2, w9713; CHECK-GI-NEXT: mov v1.s[1], w10714; CHECK-GI-NEXT: mov v2.s[1], w11715; CHECK-GI-NEXT: add v1.2s, v1.2s, v2.2s716; CHECK-GI-NEXT: mls v0.2s, v1.2s, v3.2s717; CHECK-GI-NEXT: ret718entry:719 %s = srem <2 x i8> %d, <i8 7, i8 7>720 ret <2 x i8> %s721}722 723define <2 x i8> @sv2i8_100(<2 x i8> %d, <2 x i8> %e) {724; CHECK-SD-LABEL: sv2i8_100:725; CHECK-SD: // %bb.0: // %entry726; CHECK-SD-NEXT: shl v0.2s, v0.2s, #24727; CHECK-SD-NEXT: mov w8, #34079 // =0x851f728; CHECK-SD-NEXT: movi v2.2s, #100729; CHECK-SD-NEXT: movk w8, #20971, lsl #16730; CHECK-SD-NEXT: dup v1.2s, w8731; CHECK-SD-NEXT: sshr v0.2s, v0.2s, #24732; CHECK-SD-NEXT: smull v1.2d, v0.2s, v1.2s733; CHECK-SD-NEXT: sshr v1.2d, v1.2d, #37734; CHECK-SD-NEXT: xtn v1.2s, v1.2d735; CHECK-SD-NEXT: usra v1.2s, v1.2s, #31736; CHECK-SD-NEXT: mls v0.2s, v1.2s, v2.2s737; CHECK-SD-NEXT: ret738;739; CHECK-GI-LABEL: sv2i8_100:740; CHECK-GI: // %bb.0: // %entry741; CHECK-GI-NEXT: mov w8, #41 // =0x29742; CHECK-GI-NEXT: fmov s1, w8743; CHECK-GI-NEXT: mov v1.h[1], w8744; CHECK-GI-NEXT: shl v1.4h, v1.4h, #8745; CHECK-GI-NEXT: sshr v1.4h, v1.4h, #8746; CHECK-GI-NEXT: smov w8, v1.h[0]747; CHECK-GI-NEXT: smov w9, v1.h[1]748; CHECK-GI-NEXT: shl v1.2s, v0.2s, #24749; CHECK-GI-NEXT: sshr v1.2s, v1.2s, #24750; CHECK-GI-NEXT: fmov s2, w8751; CHECK-GI-NEXT: mov w8, #8 // =0x8752; CHECK-GI-NEXT: mov v2.s[1], w9753; CHECK-GI-NEXT: mul v1.2s, v1.2s, v2.2s754; CHECK-GI-NEXT: fmov s2, w8755; CHECK-GI-NEXT: mov v2.h[1], w8756; CHECK-GI-NEXT: mov w8, #4 // =0x4757; CHECK-GI-NEXT: uzp1 v1.4h, v1.4h, v0.4h758; CHECK-GI-NEXT: fmov s3, w8759; CHECK-GI-NEXT: neg v2.4h, v2.4h760; CHECK-GI-NEXT: mov v3.b[1], w8761; CHECK-GI-NEXT: mov w8, #7 // =0x7762; CHECK-GI-NEXT: sshl v1.4h, v1.4h, v2.4h763; CHECK-GI-NEXT: fmov s2, w8764; CHECK-GI-NEXT: neg v3.8b, v3.8b765; CHECK-GI-NEXT: uzp1 v1.8b, v1.8b, v0.8b766; CHECK-GI-NEXT: mov v2.b[1], w8767; CHECK-GI-NEXT: sshl v1.8b, v1.8b, v3.8b768; CHECK-GI-NEXT: neg v2.8b, v2.8b769; CHECK-GI-NEXT: movi v3.2s, #100770; CHECK-GI-NEXT: ushl v2.8b, v1.8b, v2.8b771; CHECK-GI-NEXT: umov w8, v1.b[0]772; CHECK-GI-NEXT: umov w10, v1.b[1]773; CHECK-GI-NEXT: umov w9, v2.b[0]774; CHECK-GI-NEXT: umov w11, v2.b[1]775; CHECK-GI-NEXT: fmov s1, w8776; CHECK-GI-NEXT: fmov s2, w9777; CHECK-GI-NEXT: mov v1.s[1], w10778; CHECK-GI-NEXT: mov v2.s[1], w11779; CHECK-GI-NEXT: add v1.2s, v1.2s, v2.2s780; CHECK-GI-NEXT: mls v0.2s, v1.2s, v3.2s781; CHECK-GI-NEXT: ret782entry:783 %s = srem <2 x i8> %d, <i8 100, i8 100>784 ret <2 x i8> %s785}786 787define <3 x i8> @sv3i8_7(<3 x i8> %d, <3 x i8> %e) {788; CHECK-SD-LABEL: sv3i8_7:789; CHECK-SD: // %bb.0: // %entry790; CHECK-SD-NEXT: // kill: def $w2 killed $w2 def $x2791; CHECK-SD-NEXT: // kill: def $w1 killed $w1 def $x1792; CHECK-SD-NEXT: // kill: def $w0 killed $w0 def $x0793; CHECK-SD-NEXT: sxtb x8, w0794; CHECK-SD-NEXT: mov x9, #-56173 // =0xffffffffffff2493795; CHECK-SD-NEXT: sxtb x10, w1796; CHECK-SD-NEXT: sxtb x11, w2797; CHECK-SD-NEXT: movk x9, #37449, lsl #16798; CHECK-SD-NEXT: sxtb w12, w1799; CHECK-SD-NEXT: smull x8, w8, w9800; CHECK-SD-NEXT: sxtb w13, w0801; CHECK-SD-NEXT: smull x10, w10, w9802; CHECK-SD-NEXT: smull x9, w11, w9803; CHECK-SD-NEXT: sxtb w11, w2804; CHECK-SD-NEXT: add x8, x13, x8, lsr #32805; CHECK-SD-NEXT: add x10, x12, x10, lsr #32806; CHECK-SD-NEXT: add x9, x11, x9, lsr #32807; CHECK-SD-NEXT: asr w14, w8, #2808; CHECK-SD-NEXT: asr w15, w10, #2809; CHECK-SD-NEXT: asr w16, w9, #2810; CHECK-SD-NEXT: add w8, w14, w8, lsr #31811; CHECK-SD-NEXT: add w10, w15, w10, lsr #31812; CHECK-SD-NEXT: add w9, w16, w9, lsr #31813; CHECK-SD-NEXT: sub w8, w8, w8, lsl #3814; CHECK-SD-NEXT: sub w10, w10, w10, lsl #3815; CHECK-SD-NEXT: sub w9, w9, w9, lsl #3816; CHECK-SD-NEXT: add w0, w13, w8817; CHECK-SD-NEXT: add w1, w12, w10818; CHECK-SD-NEXT: add w2, w11, w9819; CHECK-SD-NEXT: ret820;821; CHECK-GI-LABEL: sv3i8_7:822; CHECK-GI: // %bb.0: // %entry823; CHECK-GI-NEXT: sxtb w8, w0824; CHECK-GI-NEXT: sxtb w11, w1825; CHECK-GI-NEXT: sxtb w13, w2826; CHECK-GI-NEXT: mov w9, #7 // =0x7827; CHECK-GI-NEXT: sdiv w10, w8, w9828; CHECK-GI-NEXT: sdiv w12, w11, w9829; CHECK-GI-NEXT: lsl w14, w10, #3830; CHECK-GI-NEXT: sub w10, w14, w10831; CHECK-GI-NEXT: sub w0, w8, w10832; CHECK-GI-NEXT: sdiv w9, w13, w9833; CHECK-GI-NEXT: lsl w15, w12, #3834; CHECK-GI-NEXT: sub w12, w15, w12835; CHECK-GI-NEXT: sub w1, w11, w12836; CHECK-GI-NEXT: lsl w16, w9, #3837; CHECK-GI-NEXT: sub w9, w16, w9838; CHECK-GI-NEXT: sub w2, w13, w9839; CHECK-GI-NEXT: ret840entry:841 %s = srem <3 x i8> %d, <i8 7, i8 7, i8 7>842 ret <3 x i8> %s843}844 845define <3 x i8> @sv3i8_100(<3 x i8> %d, <3 x i8> %e) {846; CHECK-SD-LABEL: sv3i8_100:847; CHECK-SD: // %bb.0: // %entry848; CHECK-SD-NEXT: // kill: def $w0 killed $w0 def $x0849; CHECK-SD-NEXT: sxtb x8, w0850; CHECK-SD-NEXT: mov w9, #34079 // =0x851f851; CHECK-SD-NEXT: // kill: def $w2 killed $w2 def $x2852; CHECK-SD-NEXT: // kill: def $w1 killed $w1 def $x1853; CHECK-SD-NEXT: sxtb x10, w1854; CHECK-SD-NEXT: movk w9, #20971, lsl #16855; CHECK-SD-NEXT: sxtb x11, w2856; CHECK-SD-NEXT: sxtb w12, w0857; CHECK-SD-NEXT: smull x8, w8, w9858; CHECK-SD-NEXT: smull x10, w10, w9859; CHECK-SD-NEXT: smull x9, w11, w9860; CHECK-SD-NEXT: mov w11, #100 // =0x64861; CHECK-SD-NEXT: asr x8, x8, #37862; CHECK-SD-NEXT: asr x10, x10, #37863; CHECK-SD-NEXT: asr x9, x9, #37864; CHECK-SD-NEXT: add w8, w8, w8, lsr #31865; CHECK-SD-NEXT: add w10, w10, w10, lsr #31866; CHECK-SD-NEXT: add w9, w9, w9, lsr #31867; CHECK-SD-NEXT: msub w0, w8, w11, w12868; CHECK-SD-NEXT: sxtb w8, w1869; CHECK-SD-NEXT: msub w1, w10, w11, w8870; CHECK-SD-NEXT: sxtb w8, w2871; CHECK-SD-NEXT: msub w2, w9, w11, w8872; CHECK-SD-NEXT: ret873;874; CHECK-GI-LABEL: sv3i8_100:875; CHECK-GI: // %bb.0: // %entry876; CHECK-GI-NEXT: sxtb w8, w0877; CHECK-GI-NEXT: sxtb w11, w1878; CHECK-GI-NEXT: sxtb w13, w2879; CHECK-GI-NEXT: mov w9, #100 // =0x64880; CHECK-GI-NEXT: sdiv w10, w8, w9881; CHECK-GI-NEXT: sdiv w12, w11, w9882; CHECK-GI-NEXT: msub w0, w10, w9, w8883; CHECK-GI-NEXT: sdiv w14, w13, w9884; CHECK-GI-NEXT: msub w1, w12, w9, w11885; CHECK-GI-NEXT: msub w2, w14, w9, w13886; CHECK-GI-NEXT: ret887entry:888 %s = srem <3 x i8> %d, <i8 100, i8 100, i8 100>889 ret <3 x i8> %s890}891 892define <4 x i8> @sv4i8_7(<4 x i8> %d, <4 x i8> %e) {893; CHECK-SD-LABEL: sv4i8_7:894; CHECK-SD: // %bb.0: // %entry895; CHECK-SD-NEXT: shl v0.4h, v0.4h, #8896; CHECK-SD-NEXT: mov x8, #-56173 // =0xffffffffffff2493897; CHECK-SD-NEXT: movk x8, #37449, lsl #16898; CHECK-SD-NEXT: sshr v0.4h, v0.4h, #8899; CHECK-SD-NEXT: smov x10, v0.h[0]900; CHECK-SD-NEXT: smov x9, v0.h[1]901; CHECK-SD-NEXT: smov w12, v0.h[0]902; CHECK-SD-NEXT: smov w11, v0.h[1]903; CHECK-SD-NEXT: smov x13, v0.h[2]904; CHECK-SD-NEXT: smov w14, v0.h[2]905; CHECK-SD-NEXT: smov x17, v0.h[3]906; CHECK-SD-NEXT: smull x10, w10, w8907; CHECK-SD-NEXT: smull x9, w9, w8908; CHECK-SD-NEXT: smull x13, w13, w8909; CHECK-SD-NEXT: add x10, x12, x10, lsr #32910; CHECK-SD-NEXT: smull x8, w17, w8911; CHECK-SD-NEXT: add x9, x11, x9, lsr #32912; CHECK-SD-NEXT: asr w16, w10, #2913; CHECK-SD-NEXT: add x13, x14, x13, lsr #32914; CHECK-SD-NEXT: asr w15, w9, #2915; CHECK-SD-NEXT: add w10, w16, w10, lsr #31916; CHECK-SD-NEXT: asr w16, w13, #2917; CHECK-SD-NEXT: add w9, w15, w9, lsr #31918; CHECK-SD-NEXT: smov w15, v0.h[3]919; CHECK-SD-NEXT: sub w10, w10, w10, lsl #3920; CHECK-SD-NEXT: sub w9, w9, w9, lsl #3921; CHECK-SD-NEXT: add w10, w12, w10922; CHECK-SD-NEXT: fmov s0, w10923; CHECK-SD-NEXT: add w9, w11, w9924; CHECK-SD-NEXT: add w10, w16, w13, lsr #31925; CHECK-SD-NEXT: add x8, x15, x8, lsr #32926; CHECK-SD-NEXT: mov v0.h[1], w9927; CHECK-SD-NEXT: sub w9, w10, w10, lsl #3928; CHECK-SD-NEXT: asr w10, w8, #2929; CHECK-SD-NEXT: add w9, w14, w9930; CHECK-SD-NEXT: add w8, w10, w8, lsr #31931; CHECK-SD-NEXT: mov v0.h[2], w9932; CHECK-SD-NEXT: sub w8, w8, w8, lsl #3933; CHECK-SD-NEXT: add w8, w15, w8934; CHECK-SD-NEXT: mov v0.h[3], w8935; CHECK-SD-NEXT: // kill: def $d0 killed $d0 killed $q0936; CHECK-SD-NEXT: ret937;938; CHECK-GI-LABEL: sv4i8_7:939; CHECK-GI: // %bb.0: // %entry940; CHECK-GI-NEXT: mov w8, #147 // =0x93941; CHECK-GI-NEXT: shl v2.4h, v0.4h, #8942; CHECK-GI-NEXT: mov w9, #7 // =0x7943; CHECK-GI-NEXT: fmov s1, w8944; CHECK-GI-NEXT: fmov s4, w9945; CHECK-GI-NEXT: sshr v2.4h, v2.4h, #8946; CHECK-GI-NEXT: mov v1.b[1], w8947; CHECK-GI-NEXT: mov v4.b[1], w9948; CHECK-GI-NEXT: mov v1.b[2], w8949; CHECK-GI-NEXT: mov v4.b[2], w9950; CHECK-GI-NEXT: mov v1.b[3], w8951; CHECK-GI-NEXT: mov w8, #2 // =0x2952; CHECK-GI-NEXT: mov v4.b[3], w9953; CHECK-GI-NEXT: fmov s3, w8954; CHECK-GI-NEXT: mov v3.b[1], w8955; CHECK-GI-NEXT: sshll v1.8h, v1.8b, #0956; CHECK-GI-NEXT: mul v1.4h, v2.4h, v1.4h957; CHECK-GI-NEXT: fmov d2, d0958; CHECK-GI-NEXT: mov v3.b[2], w8959; CHECK-GI-NEXT: ssra v2.4h, v1.4h, #8960; CHECK-GI-NEXT: mov v3.b[3], w8961; CHECK-GI-NEXT: uzp1 v1.8b, v2.8b, v0.8b962; CHECK-GI-NEXT: neg v2.8b, v3.8b963; CHECK-GI-NEXT: dup v3.4h, w9964; CHECK-GI-NEXT: sshl v1.8b, v1.8b, v2.8b965; CHECK-GI-NEXT: neg v2.8b, v4.8b966; CHECK-GI-NEXT: ushl v2.8b, v1.8b, v2.8b967; CHECK-GI-NEXT: ushll v1.8h, v1.8b, #0968; CHECK-GI-NEXT: ushll v2.8h, v2.8b, #0969; CHECK-GI-NEXT: add v1.4h, v1.4h, v2.4h970; CHECK-GI-NEXT: mls v0.4h, v1.4h, v3.4h971; CHECK-GI-NEXT: ret972entry:973 %s = srem <4 x i8> %d, <i8 7, i8 7, i8 7, i8 7>974 ret <4 x i8> %s975}976 977define <4 x i8> @sv4i8_100(<4 x i8> %d, <4 x i8> %e) {978; CHECK-SD-LABEL: sv4i8_100:979; CHECK-SD: // %bb.0: // %entry980; CHECK-SD-NEXT: shl v0.4h, v0.4h, #8981; CHECK-SD-NEXT: mov w8, #34079 // =0x851f982; CHECK-SD-NEXT: mov w14, #100 // =0x64983; CHECK-SD-NEXT: movk w8, #20971, lsl #16984; CHECK-SD-NEXT: sshr v1.4h, v0.4h, #8985; CHECK-SD-NEXT: smov x9, v1.h[0]986; CHECK-SD-NEXT: smov x10, v1.h[1]987; CHECK-SD-NEXT: smov x11, v1.h[2]988; CHECK-SD-NEXT: smov w12, v1.h[0]989; CHECK-SD-NEXT: smov x13, v1.h[3]990; CHECK-SD-NEXT: smov w15, v1.h[1]991; CHECK-SD-NEXT: smull x9, w9, w8992; CHECK-SD-NEXT: smull x10, w10, w8993; CHECK-SD-NEXT: smull x11, w11, w8994; CHECK-SD-NEXT: asr x9, x9, #37995; CHECK-SD-NEXT: smull x8, w13, w8996; CHECK-SD-NEXT: asr x10, x10, #37997; CHECK-SD-NEXT: add w9, w9, w9, lsr #31998; CHECK-SD-NEXT: asr x11, x11, #37999; CHECK-SD-NEXT: add w10, w10, w10, lsr #311000; CHECK-SD-NEXT: asr x8, x8, #371001; CHECK-SD-NEXT: msub w9, w9, w14, w121002; CHECK-SD-NEXT: msub w10, w10, w14, w151003; CHECK-SD-NEXT: add w8, w8, w8, lsr #311004; CHECK-SD-NEXT: fmov s0, w91005; CHECK-SD-NEXT: add w9, w11, w11, lsr #311006; CHECK-SD-NEXT: smov w11, v1.h[2]1007; CHECK-SD-NEXT: msub w9, w9, w14, w111008; CHECK-SD-NEXT: mov v0.h[1], w101009; CHECK-SD-NEXT: smov w10, v1.h[3]1010; CHECK-SD-NEXT: msub w8, w8, w14, w101011; CHECK-SD-NEXT: mov v0.h[2], w91012; CHECK-SD-NEXT: mov v0.h[3], w81013; CHECK-SD-NEXT: // kill: def $d0 killed $d0 killed $q01014; CHECK-SD-NEXT: ret1015;1016; CHECK-GI-LABEL: sv4i8_100:1017; CHECK-GI: // %bb.0: // %entry1018; CHECK-GI-NEXT: mov w8, #41 // =0x291019; CHECK-GI-NEXT: shl v2.4h, v0.4h, #81020; CHECK-GI-NEXT: mov w9, #7 // =0x71021; CHECK-GI-NEXT: fmov s1, w81022; CHECK-GI-NEXT: fmov s4, w91023; CHECK-GI-NEXT: sshr v2.4h, v2.4h, #81024; CHECK-GI-NEXT: mov v1.b[1], w81025; CHECK-GI-NEXT: mov v4.b[1], w91026; CHECK-GI-NEXT: mov v1.b[2], w81027; CHECK-GI-NEXT: mov v4.b[2], w91028; CHECK-GI-NEXT: mov v1.b[3], w81029; CHECK-GI-NEXT: mov w8, #4 // =0x41030; CHECK-GI-NEXT: mov v4.b[3], w91031; CHECK-GI-NEXT: fmov s3, w81032; CHECK-GI-NEXT: mov v3.b[1], w81033; CHECK-GI-NEXT: sshll v1.8h, v1.8b, #01034; CHECK-GI-NEXT: mul v1.4h, v2.4h, v1.4h1035; CHECK-GI-NEXT: mov v3.b[2], w81036; CHECK-GI-NEXT: sshr v1.4h, v1.4h, #81037; CHECK-GI-NEXT: mov v3.b[3], w81038; CHECK-GI-NEXT: mov w8, #100 // =0x641039; CHECK-GI-NEXT: uzp1 v1.8b, v1.8b, v0.8b1040; CHECK-GI-NEXT: neg v2.8b, v3.8b1041; CHECK-GI-NEXT: dup v3.4h, w81042; CHECK-GI-NEXT: sshl v1.8b, v1.8b, v2.8b1043; CHECK-GI-NEXT: neg v2.8b, v4.8b1044; CHECK-GI-NEXT: ushl v2.8b, v1.8b, v2.8b1045; CHECK-GI-NEXT: ushll v1.8h, v1.8b, #01046; CHECK-GI-NEXT: ushll v2.8h, v2.8b, #01047; CHECK-GI-NEXT: add v1.4h, v1.4h, v2.4h1048; CHECK-GI-NEXT: mls v0.4h, v1.4h, v3.4h1049; CHECK-GI-NEXT: ret1050entry:1051 %s = srem <4 x i8> %d, <i8 100, i8 100, i8 100, i8 100>1052 ret <4 x i8> %s1053}1054 1055define <8 x i8> @sv8i8_7(<8 x i8> %d, <8 x i8> %e) {1056; CHECK-SD-LABEL: sv8i8_7:1057; CHECK-SD: // %bb.0: // %entry1058; CHECK-SD-NEXT: movi v1.8b, #1471059; CHECK-SD-NEXT: movi v2.8b, #71060; CHECK-SD-NEXT: smull v1.8h, v0.8b, v1.8b1061; CHECK-SD-NEXT: shrn v1.8b, v1.8h, #81062; CHECK-SD-NEXT: add v1.8b, v1.8b, v0.8b1063; CHECK-SD-NEXT: sshr v1.8b, v1.8b, #21064; CHECK-SD-NEXT: usra v1.8b, v1.8b, #71065; CHECK-SD-NEXT: mls v0.8b, v1.8b, v2.8b1066; CHECK-SD-NEXT: ret1067;1068; CHECK-GI-LABEL: sv8i8_7:1069; CHECK-GI: // %bb.0: // %entry1070; CHECK-GI-NEXT: movi v1.8b, #1471071; CHECK-GI-NEXT: movi v3.8b, #71072; CHECK-GI-NEXT: smull v1.8h, v0.8b, v1.8b1073; CHECK-GI-NEXT: shrn v1.8b, v1.8h, #81074; CHECK-GI-NEXT: add v1.8b, v1.8b, v0.8b1075; CHECK-GI-NEXT: sshr v2.8b, v1.8b, #21076; CHECK-GI-NEXT: ushr v2.8b, v2.8b, #71077; CHECK-GI-NEXT: ssra v2.8b, v1.8b, #21078; CHECK-GI-NEXT: mls v0.8b, v2.8b, v3.8b1079; CHECK-GI-NEXT: ret1080entry:1081 %s = srem <8 x i8> %d, <i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7>1082 ret <8 x i8> %s1083}1084 1085define <8 x i8> @sv8i8_100(<8 x i8> %d, <8 x i8> %e) {1086; CHECK-SD-LABEL: sv8i8_100:1087; CHECK-SD: // %bb.0: // %entry1088; CHECK-SD-NEXT: movi v1.8b, #411089; CHECK-SD-NEXT: movi v2.8b, #1001090; CHECK-SD-NEXT: smull v1.8h, v0.8b, v1.8b1091; CHECK-SD-NEXT: shrn v1.8b, v1.8h, #81092; CHECK-SD-NEXT: sshr v1.8b, v1.8b, #41093; CHECK-SD-NEXT: usra v1.8b, v1.8b, #71094; CHECK-SD-NEXT: mls v0.8b, v1.8b, v2.8b1095; CHECK-SD-NEXT: ret1096;1097; CHECK-GI-LABEL: sv8i8_100:1098; CHECK-GI: // %bb.0: // %entry1099; CHECK-GI-NEXT: movi v1.8b, #411100; CHECK-GI-NEXT: movi v3.8b, #1001101; CHECK-GI-NEXT: smull v1.8h, v0.8b, v1.8b1102; CHECK-GI-NEXT: shrn v1.8b, v1.8h, #81103; CHECK-GI-NEXT: sshr v2.8b, v1.8b, #41104; CHECK-GI-NEXT: ushr v2.8b, v2.8b, #71105; CHECK-GI-NEXT: ssra v2.8b, v1.8b, #41106; CHECK-GI-NEXT: mls v0.8b, v2.8b, v3.8b1107; CHECK-GI-NEXT: ret1108entry:1109 %s = srem <8 x i8> %d, <i8 100, i8 100, i8 100, i8 100, i8 100, i8 100, i8 100, i8 100>1110 ret <8 x i8> %s1111}1112 1113define <16 x i8> @sv16i8_7(<16 x i8> %d, <16 x i8> %e) {1114; CHECK-SD-LABEL: sv16i8_7:1115; CHECK-SD: // %bb.0: // %entry1116; CHECK-SD-NEXT: movi v1.16b, #1471117; CHECK-SD-NEXT: smull2 v2.8h, v0.16b, v1.16b1118; CHECK-SD-NEXT: smull v1.8h, v0.8b, v1.8b1119; CHECK-SD-NEXT: uzp2 v1.16b, v1.16b, v2.16b1120; CHECK-SD-NEXT: movi v2.16b, #71121; CHECK-SD-NEXT: add v1.16b, v1.16b, v0.16b1122; CHECK-SD-NEXT: sshr v1.16b, v1.16b, #21123; CHECK-SD-NEXT: usra v1.16b, v1.16b, #71124; CHECK-SD-NEXT: mls v0.16b, v1.16b, v2.16b1125; CHECK-SD-NEXT: ret1126;1127; CHECK-GI-LABEL: sv16i8_7:1128; CHECK-GI: // %bb.0: // %entry1129; CHECK-GI-NEXT: movi v1.16b, #1471130; CHECK-GI-NEXT: movi v3.16b, #71131; CHECK-GI-NEXT: smull2 v2.8h, v0.16b, v1.16b1132; CHECK-GI-NEXT: smull v1.8h, v0.8b, v1.8b1133; CHECK-GI-NEXT: uzp2 v1.16b, v1.16b, v2.16b1134; CHECK-GI-NEXT: add v1.16b, v1.16b, v0.16b1135; CHECK-GI-NEXT: sshr v2.16b, v1.16b, #21136; CHECK-GI-NEXT: ushr v2.16b, v2.16b, #71137; CHECK-GI-NEXT: ssra v2.16b, v1.16b, #21138; CHECK-GI-NEXT: mls v0.16b, v2.16b, v3.16b1139; CHECK-GI-NEXT: ret1140entry:1141 %s = srem <16 x i8> %d, <i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7>1142 ret <16 x i8> %s1143}1144 1145define <16 x i8> @sv16i8_100(<16 x i8> %d, <16 x i8> %e) {1146; CHECK-SD-LABEL: sv16i8_100:1147; CHECK-SD: // %bb.0: // %entry1148; CHECK-SD-NEXT: movi v1.16b, #411149; CHECK-SD-NEXT: smull2 v2.8h, v0.16b, v1.16b1150; CHECK-SD-NEXT: smull v1.8h, v0.8b, v1.8b1151; CHECK-SD-NEXT: uzp2 v1.16b, v1.16b, v2.16b1152; CHECK-SD-NEXT: movi v2.16b, #1001153; CHECK-SD-NEXT: sshr v1.16b, v1.16b, #41154; CHECK-SD-NEXT: usra v1.16b, v1.16b, #71155; CHECK-SD-NEXT: mls v0.16b, v1.16b, v2.16b1156; CHECK-SD-NEXT: ret1157;1158; CHECK-GI-LABEL: sv16i8_100:1159; CHECK-GI: // %bb.0: // %entry1160; CHECK-GI-NEXT: movi v1.16b, #411161; CHECK-GI-NEXT: movi v3.16b, #1001162; CHECK-GI-NEXT: smull2 v2.8h, v0.16b, v1.16b1163; CHECK-GI-NEXT: smull v1.8h, v0.8b, v1.8b1164; CHECK-GI-NEXT: uzp2 v1.16b, v1.16b, v2.16b1165; CHECK-GI-NEXT: sshr v2.16b, v1.16b, #41166; CHECK-GI-NEXT: ushr v2.16b, v2.16b, #71167; CHECK-GI-NEXT: ssra v2.16b, v1.16b, #41168; CHECK-GI-NEXT: mls v0.16b, v2.16b, v3.16b1169; CHECK-GI-NEXT: ret1170entry:1171 %s = srem <16 x i8> %d, <i8 100, i8 100, i8 100, i8 100, i8 100, i8 100, i8 100, i8 100, i8 100, i8 100, i8 100, i8 100, i8 100, i8 100, i8 100, i8 100>1172 ret <16 x i8> %s1173}1174 1175define <2 x i8> @uv2i8_7(<2 x i8> %d, <2 x i8> %e) {1176; CHECK-SD-LABEL: uv2i8_7:1177; CHECK-SD: // %bb.0: // %entry1178; CHECK-SD-NEXT: movi d1, #0x0000ff000000ff1179; CHECK-SD-NEXT: mov w8, #18725 // =0x49251180; CHECK-SD-NEXT: movk w8, #9362, lsl #161181; CHECK-SD-NEXT: dup v2.2s, w81182; CHECK-SD-NEXT: and v0.8b, v0.8b, v1.8b1183; CHECK-SD-NEXT: umull v1.2d, v0.2s, v2.2s1184; CHECK-SD-NEXT: movi v2.2s, #71185; CHECK-SD-NEXT: shrn v1.2s, v1.2d, #321186; CHECK-SD-NEXT: mls v0.2s, v1.2s, v2.2s1187; CHECK-SD-NEXT: ret1188;1189; CHECK-GI-LABEL: uv2i8_7:1190; CHECK-GI: // %bb.0: // %entry1191; CHECK-GI-NEXT: movi d1, #0x0000ff000000ff1192; CHECK-GI-NEXT: movi v2.2s, #371193; CHECK-GI-NEXT: mov w8, #8 // =0x81194; CHECK-GI-NEXT: and v1.8b, v0.8b, v1.8b1195; CHECK-GI-NEXT: mul v1.2s, v1.2s, v2.2s1196; CHECK-GI-NEXT: fmov s2, w81197; CHECK-GI-NEXT: mov v2.h[1], w81198; CHECK-GI-NEXT: mov w8, #1 // =0x11199; CHECK-GI-NEXT: uzp1 v1.4h, v1.4h, v0.4h1200; CHECK-GI-NEXT: fmov s3, w81201; CHECK-GI-NEXT: neg v2.4h, v2.4h1202; CHECK-GI-NEXT: mov v3.b[1], w81203; CHECK-GI-NEXT: ushl v1.4h, v1.4h, v2.4h1204; CHECK-GI-NEXT: neg v3.8b, v3.8b1205; CHECK-GI-NEXT: ushll v1.4s, v1.4h, #01206; CHECK-GI-NEXT: sub v2.2s, v0.2s, v1.2s1207; CHECK-GI-NEXT: mov w9, v2.s[1]1208; CHECK-GI-NEXT: mov v2.b[1], w91209; CHECK-GI-NEXT: ushl v2.8b, v2.8b, v3.8b1210; CHECK-GI-NEXT: umov w8, v2.b[0]1211; CHECK-GI-NEXT: umov w9, v2.b[1]1212; CHECK-GI-NEXT: fmov s2, w81213; CHECK-GI-NEXT: mov w8, #2 // =0x21214; CHECK-GI-NEXT: mov v2.s[1], w91215; CHECK-GI-NEXT: add v1.2s, v2.2s, v1.2s1216; CHECK-GI-NEXT: fmov s2, w81217; CHECK-GI-NEXT: mov w9, v1.s[1]1218; CHECK-GI-NEXT: mov v2.b[1], w81219; CHECK-GI-NEXT: mov v1.b[1], w91220; CHECK-GI-NEXT: neg v2.8b, v2.8b1221; CHECK-GI-NEXT: ushl v1.8b, v1.8b, v2.8b1222; CHECK-GI-NEXT: movi v2.2s, #71223; CHECK-GI-NEXT: umov w8, v1.b[0]1224; CHECK-GI-NEXT: umov w9, v1.b[1]1225; CHECK-GI-NEXT: fmov s1, w81226; CHECK-GI-NEXT: mov v1.s[1], w91227; CHECK-GI-NEXT: mls v0.2s, v1.2s, v2.2s1228; CHECK-GI-NEXT: ret1229entry:1230 %s = urem <2 x i8> %d, <i8 7, i8 7>1231 ret <2 x i8> %s1232}1233 1234define <2 x i8> @uv2i8_100(<2 x i8> %d, <2 x i8> %e) {1235; CHECK-SD-LABEL: uv2i8_100:1236; CHECK-SD: // %bb.0: // %entry1237; CHECK-SD-NEXT: movi d1, #0x0000ff000000ff1238; CHECK-SD-NEXT: mov w8, #23593 // =0x5c291239; CHECK-SD-NEXT: movk w8, #655, lsl #161240; CHECK-SD-NEXT: dup v2.2s, w81241; CHECK-SD-NEXT: and v0.8b, v0.8b, v1.8b1242; CHECK-SD-NEXT: umull v1.2d, v0.2s, v2.2s1243; CHECK-SD-NEXT: movi v2.2s, #1001244; CHECK-SD-NEXT: shrn v1.2s, v1.2d, #321245; CHECK-SD-NEXT: mls v0.2s, v1.2s, v2.2s1246; CHECK-SD-NEXT: ret1247;1248; CHECK-GI-LABEL: uv2i8_100:1249; CHECK-GI: // %bb.0: // %entry1250; CHECK-GI-NEXT: movi d1, #0x0000ff000000ff1251; CHECK-GI-NEXT: movi v2.2s, #411252; CHECK-GI-NEXT: mov w8, #8 // =0x81253; CHECK-GI-NEXT: and v1.8b, v0.8b, v1.8b1254; CHECK-GI-NEXT: mul v1.2s, v1.2s, v2.2s1255; CHECK-GI-NEXT: fmov s2, w81256; CHECK-GI-NEXT: mov v2.h[1], w81257; CHECK-GI-NEXT: mov w8, #4 // =0x41258; CHECK-GI-NEXT: uzp1 v1.4h, v1.4h, v0.4h1259; CHECK-GI-NEXT: fmov s3, w81260; CHECK-GI-NEXT: neg v2.4h, v2.4h1261; CHECK-GI-NEXT: mov v3.b[1], w81262; CHECK-GI-NEXT: ushl v1.4h, v1.4h, v2.4h1263; CHECK-GI-NEXT: neg v2.8b, v3.8b1264; CHECK-GI-NEXT: uzp1 v1.8b, v1.8b, v0.8b1265; CHECK-GI-NEXT: ushl v1.8b, v1.8b, v2.8b1266; CHECK-GI-NEXT: movi v2.2s, #1001267; CHECK-GI-NEXT: umov w8, v1.b[0]1268; CHECK-GI-NEXT: umov w9, v1.b[1]1269; CHECK-GI-NEXT: fmov s1, w81270; CHECK-GI-NEXT: mov v1.s[1], w91271; CHECK-GI-NEXT: mls v0.2s, v1.2s, v2.2s1272; CHECK-GI-NEXT: ret1273entry:1274 %s = urem <2 x i8> %d, <i8 100, i8 100>1275 ret <2 x i8> %s1276}1277 1278define <3 x i8> @uv3i8_7(<3 x i8> %d, <3 x i8> %e) {1279; CHECK-SD-LABEL: uv3i8_7:1280; CHECK-SD: // %bb.0: // %entry1281; CHECK-SD-NEXT: mov w8, #18725 // =0x49251282; CHECK-SD-NEXT: and w9, w0, #0xff1283; CHECK-SD-NEXT: and w10, w1, #0xff1284; CHECK-SD-NEXT: movk w8, #9362, lsl #161285; CHECK-SD-NEXT: and w12, w2, #0xff1286; CHECK-SD-NEXT: umull x11, w9, w81287; CHECK-SD-NEXT: umull x13, w10, w81288; CHECK-SD-NEXT: umull x8, w12, w81289; CHECK-SD-NEXT: lsr x11, x11, #321290; CHECK-SD-NEXT: lsr x13, x13, #321291; CHECK-SD-NEXT: lsr x8, x8, #321292; CHECK-SD-NEXT: sub w11, w11, w11, lsl #31293; CHECK-SD-NEXT: sub w13, w13, w13, lsl #31294; CHECK-SD-NEXT: sub w8, w8, w8, lsl #31295; CHECK-SD-NEXT: add w0, w9, w111296; CHECK-SD-NEXT: add w1, w10, w131297; CHECK-SD-NEXT: add w2, w12, w81298; CHECK-SD-NEXT: ret1299;1300; CHECK-GI-LABEL: uv3i8_7:1301; CHECK-GI: // %bb.0: // %entry1302; CHECK-GI-NEXT: and w8, w0, #0xff1303; CHECK-GI-NEXT: mov w10, #37 // =0x251304; CHECK-GI-NEXT: and w9, w1, #0xff1305; CHECK-GI-NEXT: fmov s1, w81306; CHECK-GI-NEXT: mov w8, #8 // =0x81307; CHECK-GI-NEXT: fmov s2, w101308; CHECK-GI-NEXT: fmov s3, w81309; CHECK-GI-NEXT: fmov s0, w01310; CHECK-GI-NEXT: mov v1.h[1], w91311; CHECK-GI-NEXT: mov v2.h[1], w101312; CHECK-GI-NEXT: and w9, w2, #0xff1313; CHECK-GI-NEXT: mov v3.h[1], w81314; CHECK-GI-NEXT: mov v0.h[1], w11315; CHECK-GI-NEXT: mov v1.h[2], w91316; CHECK-GI-NEXT: mov v2.h[2], w101317; CHECK-GI-NEXT: mov v3.h[2], w81318; CHECK-GI-NEXT: mov w8, #1 // =0x11319; CHECK-GI-NEXT: mov v0.h[2], w21320; CHECK-GI-NEXT: mul v1.4h, v1.4h, v2.4h1321; CHECK-GI-NEXT: neg v2.4h, v3.4h1322; CHECK-GI-NEXT: fmov s3, w81323; CHECK-GI-NEXT: mov v3.b[1], w81324; CHECK-GI-NEXT: ushl v1.4h, v1.4h, v2.4h1325; CHECK-GI-NEXT: sub v2.4h, v0.4h, v1.4h1326; CHECK-GI-NEXT: mov v3.b[2], w81327; CHECK-GI-NEXT: uzp1 v2.8b, v2.8b, v0.8b1328; CHECK-GI-NEXT: neg v3.8b, v3.8b1329; CHECK-GI-NEXT: ushl v2.8b, v2.8b, v3.8b1330; CHECK-GI-NEXT: mov b3, v2.b[1]1331; CHECK-GI-NEXT: mov b4, v2.b[2]1332; CHECK-GI-NEXT: fmov w8, s31333; CHECK-GI-NEXT: fmov w9, s41334; CHECK-GI-NEXT: mov v2.h[1], w81335; CHECK-GI-NEXT: mov w8, #2 // =0x21336; CHECK-GI-NEXT: fmov s3, w81337; CHECK-GI-NEXT: mov v2.h[2], w91338; CHECK-GI-NEXT: mov v3.b[1], w81339; CHECK-GI-NEXT: add v1.4h, v2.4h, v1.4h1340; CHECK-GI-NEXT: mov v3.b[2], w81341; CHECK-GI-NEXT: mov w8, #7 // =0x71342; CHECK-GI-NEXT: uzp1 v1.8b, v1.8b, v0.8b1343; CHECK-GI-NEXT: neg v2.8b, v3.8b1344; CHECK-GI-NEXT: ushl v1.8b, v1.8b, v2.8b1345; CHECK-GI-NEXT: mov b2, v1.b[1]1346; CHECK-GI-NEXT: mov b3, v1.b[2]1347; CHECK-GI-NEXT: fmov w9, s21348; CHECK-GI-NEXT: fmov s2, w81349; CHECK-GI-NEXT: mov v1.h[1], w91350; CHECK-GI-NEXT: mov v2.h[1], w81351; CHECK-GI-NEXT: fmov w9, s31352; CHECK-GI-NEXT: mov v1.h[2], w91353; CHECK-GI-NEXT: mov v2.h[2], w81354; CHECK-GI-NEXT: mls v0.4h, v1.4h, v2.4h1355; CHECK-GI-NEXT: umov w0, v0.h[0]1356; CHECK-GI-NEXT: umov w1, v0.h[1]1357; CHECK-GI-NEXT: umov w2, v0.h[2]1358; CHECK-GI-NEXT: ret1359entry:1360 %s = urem <3 x i8> %d, <i8 7, i8 7, i8 7>1361 ret <3 x i8> %s1362}1363 1364define <3 x i8> @uv3i8_100(<3 x i8> %d, <3 x i8> %e) {1365; CHECK-SD-LABEL: uv3i8_100:1366; CHECK-SD: // %bb.0: // %entry1367; CHECK-SD-NEXT: mov w8, #23593 // =0x5c291368; CHECK-SD-NEXT: and w9, w0, #0xff1369; CHECK-SD-NEXT: and w10, w1, #0xff1370; CHECK-SD-NEXT: movk w8, #655, lsl #161371; CHECK-SD-NEXT: and w12, w2, #0xff1372; CHECK-SD-NEXT: mov w14, #100 // =0x641373; CHECK-SD-NEXT: umull x11, w9, w81374; CHECK-SD-NEXT: umull x13, w10, w81375; CHECK-SD-NEXT: umull x8, w12, w81376; CHECK-SD-NEXT: lsr x11, x11, #321377; CHECK-SD-NEXT: lsr x13, x13, #321378; CHECK-SD-NEXT: lsr x8, x8, #321379; CHECK-SD-NEXT: msub w0, w11, w14, w91380; CHECK-SD-NEXT: msub w1, w13, w14, w101381; CHECK-SD-NEXT: msub w2, w8, w14, w121382; CHECK-SD-NEXT: ret1383;1384; CHECK-GI-LABEL: uv3i8_100:1385; CHECK-GI: // %bb.0: // %entry1386; CHECK-GI-NEXT: and w8, w0, #0xff1387; CHECK-GI-NEXT: mov w10, #41 // =0x291388; CHECK-GI-NEXT: and w9, w1, #0xff1389; CHECK-GI-NEXT: fmov s0, w81390; CHECK-GI-NEXT: mov w8, #8 // =0x81391; CHECK-GI-NEXT: fmov s1, w101392; CHECK-GI-NEXT: fmov s2, w81393; CHECK-GI-NEXT: mov v0.h[1], w91394; CHECK-GI-NEXT: mov v1.h[1], w101395; CHECK-GI-NEXT: and w9, w2, #0xff1396; CHECK-GI-NEXT: mov v2.h[1], w81397; CHECK-GI-NEXT: mov v0.h[2], w91398; CHECK-GI-NEXT: mov v1.h[2], w101399; CHECK-GI-NEXT: mov v2.h[2], w81400; CHECK-GI-NEXT: mov w8, #4 // =0x41401; CHECK-GI-NEXT: fmov s3, w81402; CHECK-GI-NEXT: mul v0.4h, v0.4h, v1.4h1403; CHECK-GI-NEXT: mov v3.b[1], w81404; CHECK-GI-NEXT: neg v1.4h, v2.4h1405; CHECK-GI-NEXT: ushl v0.4h, v0.4h, v1.4h1406; CHECK-GI-NEXT: mov v3.b[2], w81407; CHECK-GI-NEXT: mov w8, #100 // =0x641408; CHECK-GI-NEXT: uzp1 v0.8b, v0.8b, v0.8b1409; CHECK-GI-NEXT: neg v1.8b, v3.8b1410; CHECK-GI-NEXT: fmov s3, w01411; CHECK-GI-NEXT: ushl v0.8b, v0.8b, v1.8b1412; CHECK-GI-NEXT: mov v3.h[1], w11413; CHECK-GI-NEXT: mov b1, v0.b[1]1414; CHECK-GI-NEXT: mov b2, v0.b[2]1415; CHECK-GI-NEXT: mov v3.h[2], w21416; CHECK-GI-NEXT: fmov w9, s11417; CHECK-GI-NEXT: fmov s1, w81418; CHECK-GI-NEXT: mov v0.h[1], w91419; CHECK-GI-NEXT: mov v1.h[1], w81420; CHECK-GI-NEXT: fmov w9, s21421; CHECK-GI-NEXT: mov v0.h[2], w91422; CHECK-GI-NEXT: mov v1.h[2], w81423; CHECK-GI-NEXT: mls v3.4h, v0.4h, v1.4h1424; CHECK-GI-NEXT: umov w0, v3.h[0]1425; CHECK-GI-NEXT: umov w1, v3.h[1]1426; CHECK-GI-NEXT: umov w2, v3.h[2]1427; CHECK-GI-NEXT: ret1428entry:1429 %s = urem <3 x i8> %d, <i8 100, i8 100, i8 100>1430 ret <3 x i8> %s1431}1432 1433define <4 x i8> @uv4i8_7(<4 x i8> %d, <4 x i8> %e) {1434; CHECK-SD-LABEL: uv4i8_7:1435; CHECK-SD: // %bb.0: // %entry1436; CHECK-SD-NEXT: // kill: def $d0 killed $d0 def $q01437; CHECK-SD-NEXT: mov w8, #18725 // =0x49251438; CHECK-SD-NEXT: bic v0.4h, #255, lsl #81439; CHECK-SD-NEXT: movk w8, #9362, lsl #161440; CHECK-SD-NEXT: umov w9, v0.h[0]1441; CHECK-SD-NEXT: umov w10, v0.h[1]1442; CHECK-SD-NEXT: umov w13, v0.h[2]1443; CHECK-SD-NEXT: umov w15, v0.h[3]1444; CHECK-SD-NEXT: umull x11, w9, w81445; CHECK-SD-NEXT: umull x12, w10, w81446; CHECK-SD-NEXT: umull x14, w13, w81447; CHECK-SD-NEXT: lsr x11, x11, #321448; CHECK-SD-NEXT: umull x8, w15, w81449; CHECK-SD-NEXT: lsr x12, x12, #321450; CHECK-SD-NEXT: sub w11, w11, w11, lsl #31451; CHECK-SD-NEXT: sub w12, w12, w12, lsl #31452; CHECK-SD-NEXT: lsr x8, x8, #321453; CHECK-SD-NEXT: add w9, w9, w111454; CHECK-SD-NEXT: fmov s0, w91455; CHECK-SD-NEXT: add w10, w10, w121456; CHECK-SD-NEXT: lsr x9, x14, #321457; CHECK-SD-NEXT: sub w8, w8, w8, lsl #31458; CHECK-SD-NEXT: sub w9, w9, w9, lsl #31459; CHECK-SD-NEXT: mov v0.h[1], w101460; CHECK-SD-NEXT: add w8, w15, w81461; CHECK-SD-NEXT: add w9, w13, w91462; CHECK-SD-NEXT: mov v0.h[2], w91463; CHECK-SD-NEXT: mov v0.h[3], w81464; CHECK-SD-NEXT: // kill: def $d0 killed $d0 killed $q01465; CHECK-SD-NEXT: ret1466;1467; CHECK-GI-LABEL: uv4i8_7:1468; CHECK-GI: // %bb.0: // %entry1469; CHECK-GI-NEXT: mov w8, #37 // =0x251470; CHECK-GI-NEXT: movi d2, #0xff00ff00ff00ff1471; CHECK-GI-NEXT: fmov s1, w81472; CHECK-GI-NEXT: mov v1.b[1], w81473; CHECK-GI-NEXT: and v2.8b, v0.8b, v2.8b1474; CHECK-GI-NEXT: mov v1.b[2], w81475; CHECK-GI-NEXT: mov v1.b[3], w81476; CHECK-GI-NEXT: mov w8, #1 // =0x11477; CHECK-GI-NEXT: fmov s3, w81478; CHECK-GI-NEXT: ushll v1.8h, v1.8b, #01479; CHECK-GI-NEXT: mov v3.b[1], w81480; CHECK-GI-NEXT: mul v1.4h, v2.4h, v1.4h1481; CHECK-GI-NEXT: mov v3.b[2], w81482; CHECK-GI-NEXT: ushr v2.4h, v1.4h, #81483; CHECK-GI-NEXT: mov v3.b[3], w81484; CHECK-GI-NEXT: mov w8, #2 // =0x21485; CHECK-GI-NEXT: fmov s4, w81486; CHECK-GI-NEXT: sub v2.4h, v0.4h, v2.4h1487; CHECK-GI-NEXT: neg v3.8b, v3.8b1488; CHECK-GI-NEXT: mov v4.b[1], w81489; CHECK-GI-NEXT: uzp1 v2.8b, v2.8b, v0.8b1490; CHECK-GI-NEXT: mov v4.b[2], w81491; CHECK-GI-NEXT: ushl v2.8b, v2.8b, v3.8b1492; CHECK-GI-NEXT: ushll v2.8h, v2.8b, #01493; CHECK-GI-NEXT: mov v4.b[3], w81494; CHECK-GI-NEXT: mov w8, #7 // =0x71495; CHECK-GI-NEXT: usra v2.4h, v1.4h, #81496; CHECK-GI-NEXT: uzp1 v1.8b, v2.8b, v0.8b1497; CHECK-GI-NEXT: neg v2.8b, v4.8b1498; CHECK-GI-NEXT: ushl v1.8b, v1.8b, v2.8b1499; CHECK-GI-NEXT: dup v2.4h, w81500; CHECK-GI-NEXT: ushll v1.8h, v1.8b, #01501; CHECK-GI-NEXT: mls v0.4h, v1.4h, v2.4h1502; CHECK-GI-NEXT: ret1503entry:1504 %s = urem <4 x i8> %d, <i8 7, i8 7, i8 7, i8 7>1505 ret <4 x i8> %s1506}1507 1508define <4 x i8> @uv4i8_100(<4 x i8> %d, <4 x i8> %e) {1509; CHECK-SD-LABEL: uv4i8_100:1510; CHECK-SD: // %bb.0: // %entry1511; CHECK-SD-NEXT: // kill: def $d0 killed $d0 def $q01512; CHECK-SD-NEXT: mov w8, #23593 // =0x5c291513; CHECK-SD-NEXT: mov w14, #100 // =0x641514; CHECK-SD-NEXT: bic v0.4h, #255, lsl #81515; CHECK-SD-NEXT: movk w8, #655, lsl #161516; CHECK-SD-NEXT: umov w9, v0.h[0]1517; CHECK-SD-NEXT: umov w10, v0.h[1]1518; CHECK-SD-NEXT: umov w12, v0.h[2]1519; CHECK-SD-NEXT: umov w15, v0.h[3]1520; CHECK-SD-NEXT: umull x11, w9, w81521; CHECK-SD-NEXT: umull x13, w10, w81522; CHECK-SD-NEXT: lsr x11, x11, #321523; CHECK-SD-NEXT: lsr x13, x13, #321524; CHECK-SD-NEXT: msub w9, w11, w14, w91525; CHECK-SD-NEXT: umull x11, w12, w81526; CHECK-SD-NEXT: msub w10, w13, w14, w101527; CHECK-SD-NEXT: fmov s0, w91528; CHECK-SD-NEXT: umull x8, w15, w81529; CHECK-SD-NEXT: lsr x9, x11, #321530; CHECK-SD-NEXT: mov v0.h[1], w101531; CHECK-SD-NEXT: msub w9, w9, w14, w121532; CHECK-SD-NEXT: lsr x8, x8, #321533; CHECK-SD-NEXT: msub w8, w8, w14, w151534; CHECK-SD-NEXT: mov v0.h[2], w91535; CHECK-SD-NEXT: mov v0.h[3], w81536; CHECK-SD-NEXT: // kill: def $d0 killed $d0 killed $q01537; CHECK-SD-NEXT: ret1538;1539; CHECK-GI-LABEL: uv4i8_100:1540; CHECK-GI: // %bb.0: // %entry1541; CHECK-GI-NEXT: mov w8, #41 // =0x291542; CHECK-GI-NEXT: movi d2, #0xff00ff00ff00ff1543; CHECK-GI-NEXT: fmov s1, w81544; CHECK-GI-NEXT: mov v1.b[1], w81545; CHECK-GI-NEXT: and v2.8b, v0.8b, v2.8b1546; CHECK-GI-NEXT: mov v1.b[2], w81547; CHECK-GI-NEXT: mov v1.b[3], w81548; CHECK-GI-NEXT: mov w8, #4 // =0x41549; CHECK-GI-NEXT: fmov s3, w81550; CHECK-GI-NEXT: mov v3.b[1], w81551; CHECK-GI-NEXT: ushll v1.8h, v1.8b, #01552; CHECK-GI-NEXT: mul v1.4h, v2.4h, v1.4h1553; CHECK-GI-NEXT: mov v3.b[2], w81554; CHECK-GI-NEXT: ushr v1.4h, v1.4h, #81555; CHECK-GI-NEXT: mov v3.b[3], w81556; CHECK-GI-NEXT: mov w8, #100 // =0x641557; CHECK-GI-NEXT: uzp1 v1.8b, v1.8b, v0.8b1558; CHECK-GI-NEXT: neg v2.8b, v3.8b1559; CHECK-GI-NEXT: ushl v1.8b, v1.8b, v2.8b1560; CHECK-GI-NEXT: dup v2.4h, w81561; CHECK-GI-NEXT: ushll v1.8h, v1.8b, #01562; CHECK-GI-NEXT: mls v0.4h, v1.4h, v2.4h1563; CHECK-GI-NEXT: ret1564entry:1565 %s = urem <4 x i8> %d, <i8 100, i8 100, i8 100, i8 100>1566 ret <4 x i8> %s1567}1568 1569define <8 x i8> @uv8i8_7(<8 x i8> %d, <8 x i8> %e) {1570; CHECK-SD-LABEL: uv8i8_7:1571; CHECK-SD: // %bb.0: // %entry1572; CHECK-SD-NEXT: movi v1.8b, #371573; CHECK-SD-NEXT: umull v1.8h, v0.8b, v1.8b1574; CHECK-SD-NEXT: shrn v1.8b, v1.8h, #81575; CHECK-SD-NEXT: sub v2.8b, v0.8b, v1.8b1576; CHECK-SD-NEXT: ushll v2.8h, v2.8b, #01577; CHECK-SD-NEXT: shrn v2.8b, v2.8h, #11578; CHECK-SD-NEXT: add v1.8b, v2.8b, v1.8b1579; CHECK-SD-NEXT: movi v2.8b, #71580; CHECK-SD-NEXT: ushr v1.8b, v1.8b, #21581; CHECK-SD-NEXT: mls v0.8b, v1.8b, v2.8b1582; CHECK-SD-NEXT: ret1583;1584; CHECK-GI-LABEL: uv8i8_7:1585; CHECK-GI: // %bb.0: // %entry1586; CHECK-GI-NEXT: movi v1.8b, #371587; CHECK-GI-NEXT: umull v1.8h, v0.8b, v1.8b1588; CHECK-GI-NEXT: shrn v1.8b, v1.8h, #81589; CHECK-GI-NEXT: sub v2.8b, v0.8b, v1.8b1590; CHECK-GI-NEXT: usra v1.8b, v2.8b, #11591; CHECK-GI-NEXT: movi v2.8b, #71592; CHECK-GI-NEXT: ushr v1.8b, v1.8b, #21593; CHECK-GI-NEXT: mls v0.8b, v1.8b, v2.8b1594; CHECK-GI-NEXT: ret1595entry:1596 %s = urem <8 x i8> %d, <i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7>1597 ret <8 x i8> %s1598}1599 1600define <8 x i8> @uv8i8_100(<8 x i8> %d, <8 x i8> %e) {1601; CHECK-SD-LABEL: uv8i8_100:1602; CHECK-SD: // %bb.0: // %entry1603; CHECK-SD-NEXT: movi v1.8b, #411604; CHECK-SD-NEXT: movi v2.8b, #1001605; CHECK-SD-NEXT: umull v1.8h, v0.8b, v1.8b1606; CHECK-SD-NEXT: shrn v1.8b, v1.8h, #81607; CHECK-SD-NEXT: ushr v1.8b, v1.8b, #41608; CHECK-SD-NEXT: mls v0.8b, v1.8b, v2.8b1609; CHECK-SD-NEXT: ret1610;1611; CHECK-GI-LABEL: uv8i8_100:1612; CHECK-GI: // %bb.0: // %entry1613; CHECK-GI-NEXT: movi v1.8b, #411614; CHECK-GI-NEXT: movi v2.8b, #1001615; CHECK-GI-NEXT: umull v1.8h, v0.8b, v1.8b1616; CHECK-GI-NEXT: ushr v1.8h, v1.8h, #121617; CHECK-GI-NEXT: xtn v1.8b, v1.8h1618; CHECK-GI-NEXT: mls v0.8b, v1.8b, v2.8b1619; CHECK-GI-NEXT: ret1620entry:1621 %s = urem <8 x i8> %d, <i8 100, i8 100, i8 100, i8 100, i8 100, i8 100, i8 100, i8 100>1622 ret <8 x i8> %s1623}1624 1625define <16 x i8> @uv16i8_7(<16 x i8> %d, <16 x i8> %e) {1626; CHECK-LABEL: uv16i8_7:1627; CHECK: // %bb.0: // %entry1628; CHECK-NEXT: movi v1.16b, #371629; CHECK-NEXT: umull2 v2.8h, v0.16b, v1.16b1630; CHECK-NEXT: umull v1.8h, v0.8b, v1.8b1631; CHECK-NEXT: uzp2 v1.16b, v1.16b, v2.16b1632; CHECK-NEXT: sub v2.16b, v0.16b, v1.16b1633; CHECK-NEXT: usra v1.16b, v2.16b, #11634; CHECK-NEXT: movi v2.16b, #71635; CHECK-NEXT: ushr v1.16b, v1.16b, #21636; CHECK-NEXT: mls v0.16b, v1.16b, v2.16b1637; CHECK-NEXT: ret1638entry:1639 %s = urem <16 x i8> %d, <i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7>1640 ret <16 x i8> %s1641}1642 1643define <16 x i8> @uv16i8_100(<16 x i8> %d, <16 x i8> %e) {1644; CHECK-LABEL: uv16i8_100:1645; CHECK: // %bb.0: // %entry1646; CHECK-NEXT: movi v1.16b, #411647; CHECK-NEXT: umull2 v2.8h, v0.16b, v1.16b1648; CHECK-NEXT: umull v1.8h, v0.8b, v1.8b1649; CHECK-NEXT: uzp2 v1.16b, v1.16b, v2.16b1650; CHECK-NEXT: movi v2.16b, #1001651; CHECK-NEXT: ushr v1.16b, v1.16b, #41652; CHECK-NEXT: mls v0.16b, v1.16b, v2.16b1653; CHECK-NEXT: ret1654entry:1655 %s = urem <16 x i8> %d, <i8 100, i8 100, i8 100, i8 100, i8 100, i8 100, i8 100, i8 100, i8 100, i8 100, i8 100, i8 100, i8 100, i8 100, i8 100, i8 100>1656 ret <16 x i8> %s1657}1658 1659define <2 x i16> @sv2i16_7(<2 x i16> %d, <2 x i16> %e) {1660; CHECK-SD-LABEL: sv2i16_7:1661; CHECK-SD: // %bb.0: // %entry1662; CHECK-SD-NEXT: shl v1.2s, v0.2s, #161663; CHECK-SD-NEXT: mov w8, #9363 // =0x24931664; CHECK-SD-NEXT: movi v3.2s, #71665; CHECK-SD-NEXT: movk w8, #37449, lsl #161666; CHECK-SD-NEXT: dup v2.2s, w81667; CHECK-SD-NEXT: sshr v0.2s, v1.2s, #161668; CHECK-SD-NEXT: smull v2.2d, v0.2s, v2.2s1669; CHECK-SD-NEXT: shrn v2.2s, v2.2d, #321670; CHECK-SD-NEXT: ssra v2.2s, v1.2s, #161671; CHECK-SD-NEXT: sshr v1.2s, v2.2s, #21672; CHECK-SD-NEXT: usra v1.2s, v2.2s, #311673; CHECK-SD-NEXT: mls v0.2s, v1.2s, v3.2s1674; CHECK-SD-NEXT: ret1675;1676; CHECK-GI-LABEL: sv2i16_7:1677; CHECK-GI: // %bb.0: // %entry1678; CHECK-GI-NEXT: mov w8, #18725 // =0x49251679; CHECK-GI-NEXT: shl v2.2s, v0.2s, #161680; CHECK-GI-NEXT: fmov s1, w81681; CHECK-GI-NEXT: sshr v2.2s, v2.2s, #161682; CHECK-GI-NEXT: mov v1.h[1], w81683; CHECK-GI-NEXT: mov w8, #1 // =0x11684; CHECK-GI-NEXT: sshll v1.4s, v1.4h, #01685; CHECK-GI-NEXT: mul v1.2s, v2.2s, v1.2s1686; CHECK-GI-NEXT: fmov s2, w81687; CHECK-GI-NEXT: mov v2.h[1], w81688; CHECK-GI-NEXT: mov w8, #15 // =0xf1689; CHECK-GI-NEXT: sshr v1.2s, v1.2s, #161690; CHECK-GI-NEXT: fmov s3, w81691; CHECK-GI-NEXT: uzp1 v1.4h, v1.4h, v0.4h1692; CHECK-GI-NEXT: mov v3.h[1], w81693; CHECK-GI-NEXT: neg v2.4h, v2.4h1694; CHECK-GI-NEXT: mov w8, #7 // =0x71695; CHECK-GI-NEXT: sshl v1.4h, v1.4h, v2.4h1696; CHECK-GI-NEXT: neg v2.4h, v3.4h1697; CHECK-GI-NEXT: dup v3.2s, w81698; CHECK-GI-NEXT: ushl v2.4h, v1.4h, v2.4h1699; CHECK-GI-NEXT: ushll v1.4s, v1.4h, #01700; CHECK-GI-NEXT: ushll v2.4s, v2.4h, #01701; CHECK-GI-NEXT: add v1.2s, v1.2s, v2.2s1702; CHECK-GI-NEXT: mls v0.2s, v1.2s, v3.2s1703; CHECK-GI-NEXT: ret1704entry:1705 %s = srem <2 x i16> %d, <i16 7, i16 7>1706 ret <2 x i16> %s1707}1708 1709define <2 x i16> @sv2i16_100(<2 x i16> %d, <2 x i16> %e) {1710; CHECK-SD-LABEL: sv2i16_100:1711; CHECK-SD: // %bb.0: // %entry1712; CHECK-SD-NEXT: shl v0.2s, v0.2s, #161713; CHECK-SD-NEXT: mov w8, #34079 // =0x851f1714; CHECK-SD-NEXT: movi v2.2s, #1001715; CHECK-SD-NEXT: movk w8, #20971, lsl #161716; CHECK-SD-NEXT: dup v1.2s, w81717; CHECK-SD-NEXT: sshr v0.2s, v0.2s, #161718; CHECK-SD-NEXT: smull v1.2d, v0.2s, v1.2s1719; CHECK-SD-NEXT: sshr v1.2d, v1.2d, #371720; CHECK-SD-NEXT: xtn v1.2s, v1.2d1721; CHECK-SD-NEXT: usra v1.2s, v1.2s, #311722; CHECK-SD-NEXT: mls v0.2s, v1.2s, v2.2s1723; CHECK-SD-NEXT: ret1724;1725; CHECK-GI-LABEL: sv2i16_100:1726; CHECK-GI: // %bb.0: // %entry1727; CHECK-GI-NEXT: mov w8, #5243 // =0x147b1728; CHECK-GI-NEXT: shl v2.2s, v0.2s, #161729; CHECK-GI-NEXT: fmov s1, w81730; CHECK-GI-NEXT: sshr v2.2s, v2.2s, #161731; CHECK-GI-NEXT: mov v1.h[1], w81732; CHECK-GI-NEXT: mov w8, #3 // =0x31733; CHECK-GI-NEXT: sshll v1.4s, v1.4h, #01734; CHECK-GI-NEXT: mul v1.2s, v2.2s, v1.2s1735; CHECK-GI-NEXT: fmov s2, w81736; CHECK-GI-NEXT: mov v2.h[1], w81737; CHECK-GI-NEXT: mov w8, #15 // =0xf1738; CHECK-GI-NEXT: sshr v1.2s, v1.2s, #161739; CHECK-GI-NEXT: fmov s3, w81740; CHECK-GI-NEXT: uzp1 v1.4h, v1.4h, v0.4h1741; CHECK-GI-NEXT: mov v3.h[1], w81742; CHECK-GI-NEXT: neg v2.4h, v2.4h1743; CHECK-GI-NEXT: mov w8, #100 // =0x641744; CHECK-GI-NEXT: sshl v1.4h, v1.4h, v2.4h1745; CHECK-GI-NEXT: neg v2.4h, v3.4h1746; CHECK-GI-NEXT: dup v3.2s, w81747; CHECK-GI-NEXT: ushl v2.4h, v1.4h, v2.4h1748; CHECK-GI-NEXT: ushll v1.4s, v1.4h, #01749; CHECK-GI-NEXT: ushll v2.4s, v2.4h, #01750; CHECK-GI-NEXT: add v1.2s, v1.2s, v2.2s1751; CHECK-GI-NEXT: mls v0.2s, v1.2s, v3.2s1752; CHECK-GI-NEXT: ret1753entry:1754 %s = srem <2 x i16> %d, <i16 100, i16 100>1755 ret <2 x i16> %s1756}1757 1758define <3 x i16> @sv3i16_7(<3 x i16> %d, <3 x i16> %e) {1759; CHECK-SD-LABEL: sv3i16_7:1760; CHECK-SD: // %bb.0: // %entry1761; CHECK-SD-NEXT: // kill: def $d0 killed $d0 def $q01762; CHECK-SD-NEXT: smov x9, v0.h[0]1763; CHECK-SD-NEXT: mov x8, #-56173 // =0xffffffffffff24931764; CHECK-SD-NEXT: smov x10, v0.h[1]1765; CHECK-SD-NEXT: movk x8, #37449, lsl #161766; CHECK-SD-NEXT: smov w11, v0.h[0]1767; CHECK-SD-NEXT: smov x13, v0.h[2]1768; CHECK-SD-NEXT: smov w12, v0.h[1]1769; CHECK-SD-NEXT: smov w14, v0.h[2]1770; CHECK-SD-NEXT: smull x9, w9, w81771; CHECK-SD-NEXT: smull x10, w10, w81772; CHECK-SD-NEXT: smull x8, w13, w81773; CHECK-SD-NEXT: add x9, x11, x9, lsr #321774; CHECK-SD-NEXT: add x10, x12, x10, lsr #321775; CHECK-SD-NEXT: asr w13, w9, #21776; CHECK-SD-NEXT: add x8, x14, x8, lsr #321777; CHECK-SD-NEXT: asr w15, w10, #21778; CHECK-SD-NEXT: add w9, w13, w9, lsr #311779; CHECK-SD-NEXT: asr w13, w8, #21780; CHECK-SD-NEXT: add w10, w15, w10, lsr #311781; CHECK-SD-NEXT: sub w9, w9, w9, lsl #31782; CHECK-SD-NEXT: add w8, w13, w8, lsr #311783; CHECK-SD-NEXT: sub w10, w10, w10, lsl #31784; CHECK-SD-NEXT: add w9, w11, w91785; CHECK-SD-NEXT: sub w8, w8, w8, lsl #31786; CHECK-SD-NEXT: fmov s0, w91787; CHECK-SD-NEXT: add w10, w12, w101788; CHECK-SD-NEXT: add w8, w14, w81789; CHECK-SD-NEXT: mov v0.h[1], w101790; CHECK-SD-NEXT: mov v0.h[2], w81791; CHECK-SD-NEXT: // kill: def $d0 killed $d0 killed $q01792; CHECK-SD-NEXT: ret1793;1794; CHECK-GI-LABEL: sv3i16_7:1795; CHECK-GI: // %bb.0: // %entry1796; CHECK-GI-NEXT: // kill: def $d0 killed $d0 def $q01797; CHECK-GI-NEXT: smov w9, v0.h[0]1798; CHECK-GI-NEXT: mov w8, #7 // =0x71799; CHECK-GI-NEXT: smov w11, v0.h[1]1800; CHECK-GI-NEXT: smov w13, v0.h[2]1801; CHECK-GI-NEXT: sdiv w10, w9, w81802; CHECK-GI-NEXT: sdiv w12, w11, w81803; CHECK-GI-NEXT: lsl w14, w10, #31804; CHECK-GI-NEXT: sub w10, w14, w101805; CHECK-GI-NEXT: sub w9, w9, w101806; CHECK-GI-NEXT: fmov s0, w91807; CHECK-GI-NEXT: sdiv w8, w13, w81808; CHECK-GI-NEXT: lsl w15, w12, #31809; CHECK-GI-NEXT: sub w10, w15, w121810; CHECK-GI-NEXT: sub w10, w11, w101811; CHECK-GI-NEXT: mov v0.h[1], w101812; CHECK-GI-NEXT: lsl w9, w8, #31813; CHECK-GI-NEXT: sub w8, w9, w81814; CHECK-GI-NEXT: sub w8, w13, w81815; CHECK-GI-NEXT: mov v0.h[2], w81816; CHECK-GI-NEXT: // kill: def $d0 killed $d0 killed $q01817; CHECK-GI-NEXT: ret1818entry:1819 %s = srem <3 x i16> %d, <i16 7, i16 7, i16 7>1820 ret <3 x i16> %s1821}1822 1823define <3 x i16> @sv3i16_100(<3 x i16> %d, <3 x i16> %e) {1824; CHECK-SD-LABEL: sv3i16_100:1825; CHECK-SD: // %bb.0: // %entry1826; CHECK-SD-NEXT: // kill: def $d0 killed $d0 def $q01827; CHECK-SD-NEXT: smov x9, v0.h[0]1828; CHECK-SD-NEXT: mov w8, #34079 // =0x851f1829; CHECK-SD-NEXT: smov x10, v0.h[1]1830; CHECK-SD-NEXT: movk w8, #20971, lsl #161831; CHECK-SD-NEXT: smov x11, v0.h[2]1832; CHECK-SD-NEXT: mov w12, #100 // =0x641833; CHECK-SD-NEXT: smov w13, v0.h[1]1834; CHECK-SD-NEXT: smull x9, w9, w81835; CHECK-SD-NEXT: smull x10, w10, w81836; CHECK-SD-NEXT: smull x8, w11, w81837; CHECK-SD-NEXT: smov w11, v0.h[0]1838; CHECK-SD-NEXT: asr x9, x9, #371839; CHECK-SD-NEXT: asr x10, x10, #371840; CHECK-SD-NEXT: add w9, w9, w9, lsr #311841; CHECK-SD-NEXT: asr x8, x8, #371842; CHECK-SD-NEXT: add w10, w10, w10, lsr #311843; CHECK-SD-NEXT: msub w9, w9, w12, w111844; CHECK-SD-NEXT: smov w11, v0.h[2]1845; CHECK-SD-NEXT: add w8, w8, w8, lsr #311846; CHECK-SD-NEXT: msub w10, w10, w12, w131847; CHECK-SD-NEXT: msub w8, w8, w12, w111848; CHECK-SD-NEXT: fmov s0, w91849; CHECK-SD-NEXT: mov v0.h[1], w101850; CHECK-SD-NEXT: mov v0.h[2], w81851; CHECK-SD-NEXT: // kill: def $d0 killed $d0 killed $q01852; CHECK-SD-NEXT: ret1853;1854; CHECK-GI-LABEL: sv3i16_100:1855; CHECK-GI: // %bb.0: // %entry1856; CHECK-GI-NEXT: // kill: def $d0 killed $d0 def $q01857; CHECK-GI-NEXT: smov w9, v0.h[0]1858; CHECK-GI-NEXT: mov w8, #100 // =0x641859; CHECK-GI-NEXT: smov w11, v0.h[1]1860; CHECK-GI-NEXT: smov w13, v0.h[2]1861; CHECK-GI-NEXT: sdiv w10, w9, w81862; CHECK-GI-NEXT: sdiv w12, w11, w81863; CHECK-GI-NEXT: msub w9, w10, w8, w91864; CHECK-GI-NEXT: fmov s0, w91865; CHECK-GI-NEXT: sdiv w14, w13, w81866; CHECK-GI-NEXT: msub w10, w12, w8, w111867; CHECK-GI-NEXT: mov v0.h[1], w101868; CHECK-GI-NEXT: msub w8, w14, w8, w131869; CHECK-GI-NEXT: mov v0.h[2], w81870; CHECK-GI-NEXT: // kill: def $d0 killed $d0 killed $q01871; CHECK-GI-NEXT: ret1872entry:1873 %s = srem <3 x i16> %d, <i16 100, i16 100, i16 100>1874 ret <3 x i16> %s1875}1876 1877define <4 x i16> @sv4i16_7(<4 x i16> %d, <4 x i16> %e) {1878; CHECK-SD-LABEL: sv4i16_7:1879; CHECK-SD: // %bb.0: // %entry1880; CHECK-SD-NEXT: mov w8, #18725 // =0x49251881; CHECK-SD-NEXT: movi v2.4h, #71882; CHECK-SD-NEXT: dup v1.4h, w81883; CHECK-SD-NEXT: smull v1.4s, v0.4h, v1.4h1884; CHECK-SD-NEXT: sshr v1.4s, v1.4s, #171885; CHECK-SD-NEXT: xtn v1.4h, v1.4s1886; CHECK-SD-NEXT: usra v1.4h, v1.4h, #151887; CHECK-SD-NEXT: mls v0.4h, v1.4h, v2.4h1888; CHECK-SD-NEXT: ret1889;1890; CHECK-GI-LABEL: sv4i16_7:1891; CHECK-GI: // %bb.0: // %entry1892; CHECK-GI-NEXT: adrp x8, .LCPI44_01893; CHECK-GI-NEXT: movi v3.4h, #71894; CHECK-GI-NEXT: ldr d1, [x8, :lo12:.LCPI44_0]1895; CHECK-GI-NEXT: smull v1.4s, v0.4h, v1.4h1896; CHECK-GI-NEXT: shrn v1.4h, v1.4s, #161897; CHECK-GI-NEXT: sshr v2.4h, v1.4h, #11898; CHECK-GI-NEXT: ushr v2.4h, v2.4h, #151899; CHECK-GI-NEXT: ssra v2.4h, v1.4h, #11900; CHECK-GI-NEXT: mls v0.4h, v2.4h, v3.4h1901; CHECK-GI-NEXT: ret1902entry:1903 %s = srem <4 x i16> %d, <i16 7, i16 7, i16 7, i16 7>1904 ret <4 x i16> %s1905}1906 1907define <4 x i16> @sv4i16_100(<4 x i16> %d, <4 x i16> %e) {1908; CHECK-SD-LABEL: sv4i16_100:1909; CHECK-SD: // %bb.0: // %entry1910; CHECK-SD-NEXT: mov w8, #5243 // =0x147b1911; CHECK-SD-NEXT: movi v2.4h, #1001912; CHECK-SD-NEXT: dup v1.4h, w81913; CHECK-SD-NEXT: smull v1.4s, v0.4h, v1.4h1914; CHECK-SD-NEXT: sshr v1.4s, v1.4s, #191915; CHECK-SD-NEXT: xtn v1.4h, v1.4s1916; CHECK-SD-NEXT: usra v1.4h, v1.4h, #151917; CHECK-SD-NEXT: mls v0.4h, v1.4h, v2.4h1918; CHECK-SD-NEXT: ret1919;1920; CHECK-GI-LABEL: sv4i16_100:1921; CHECK-GI: // %bb.0: // %entry1922; CHECK-GI-NEXT: adrp x8, .LCPI45_01923; CHECK-GI-NEXT: movi v3.4h, #1001924; CHECK-GI-NEXT: ldr d1, [x8, :lo12:.LCPI45_0]1925; CHECK-GI-NEXT: smull v1.4s, v0.4h, v1.4h1926; CHECK-GI-NEXT: shrn v1.4h, v1.4s, #161927; CHECK-GI-NEXT: sshr v2.4h, v1.4h, #31928; CHECK-GI-NEXT: ushr v2.4h, v2.4h, #151929; CHECK-GI-NEXT: ssra v2.4h, v1.4h, #31930; CHECK-GI-NEXT: mls v0.4h, v2.4h, v3.4h1931; CHECK-GI-NEXT: ret1932entry:1933 %s = srem <4 x i16> %d, <i16 100, i16 100, i16 100, i16 100>1934 ret <4 x i16> %s1935}1936 1937define <8 x i16> @sv8i16_7(<8 x i16> %d, <8 x i16> %e) {1938; CHECK-SD-LABEL: sv8i16_7:1939; CHECK-SD: // %bb.0: // %entry1940; CHECK-SD-NEXT: mov w8, #18725 // =0x49251941; CHECK-SD-NEXT: dup v1.8h, w81942; CHECK-SD-NEXT: smull2 v2.4s, v0.8h, v1.8h1943; CHECK-SD-NEXT: smull v1.4s, v0.4h, v1.4h1944; CHECK-SD-NEXT: uzp2 v1.8h, v1.8h, v2.8h1945; CHECK-SD-NEXT: movi v2.8h, #71946; CHECK-SD-NEXT: sshr v1.8h, v1.8h, #11947; CHECK-SD-NEXT: usra v1.8h, v1.8h, #151948; CHECK-SD-NEXT: mls v0.8h, v1.8h, v2.8h1949; CHECK-SD-NEXT: ret1950;1951; CHECK-GI-LABEL: sv8i16_7:1952; CHECK-GI: // %bb.0: // %entry1953; CHECK-GI-NEXT: adrp x8, .LCPI46_01954; CHECK-GI-NEXT: movi v3.8h, #71955; CHECK-GI-NEXT: ldr q1, [x8, :lo12:.LCPI46_0]1956; CHECK-GI-NEXT: smull2 v2.4s, v0.8h, v1.8h1957; CHECK-GI-NEXT: smull v1.4s, v0.4h, v1.4h1958; CHECK-GI-NEXT: uzp2 v1.8h, v1.8h, v2.8h1959; CHECK-GI-NEXT: sshr v2.8h, v1.8h, #11960; CHECK-GI-NEXT: ushr v2.8h, v2.8h, #151961; CHECK-GI-NEXT: ssra v2.8h, v1.8h, #11962; CHECK-GI-NEXT: mls v0.8h, v2.8h, v3.8h1963; CHECK-GI-NEXT: ret1964entry:1965 %s = srem <8 x i16> %d, <i16 7, i16 7, i16 7, i16 7, i16 7, i16 7, i16 7, i16 7>1966 ret <8 x i16> %s1967}1968 1969define <8 x i16> @sv8i16_100(<8 x i16> %d, <8 x i16> %e) {1970; CHECK-SD-LABEL: sv8i16_100:1971; CHECK-SD: // %bb.0: // %entry1972; CHECK-SD-NEXT: mov w8, #5243 // =0x147b1973; CHECK-SD-NEXT: dup v1.8h, w81974; CHECK-SD-NEXT: smull2 v2.4s, v0.8h, v1.8h1975; CHECK-SD-NEXT: smull v1.4s, v0.4h, v1.4h1976; CHECK-SD-NEXT: uzp2 v1.8h, v1.8h, v2.8h1977; CHECK-SD-NEXT: movi v2.8h, #1001978; CHECK-SD-NEXT: sshr v1.8h, v1.8h, #31979; CHECK-SD-NEXT: usra v1.8h, v1.8h, #151980; CHECK-SD-NEXT: mls v0.8h, v1.8h, v2.8h1981; CHECK-SD-NEXT: ret1982;1983; CHECK-GI-LABEL: sv8i16_100:1984; CHECK-GI: // %bb.0: // %entry1985; CHECK-GI-NEXT: adrp x8, .LCPI47_01986; CHECK-GI-NEXT: movi v3.8h, #1001987; CHECK-GI-NEXT: ldr q1, [x8, :lo12:.LCPI47_0]1988; CHECK-GI-NEXT: smull2 v2.4s, v0.8h, v1.8h1989; CHECK-GI-NEXT: smull v1.4s, v0.4h, v1.4h1990; CHECK-GI-NEXT: uzp2 v1.8h, v1.8h, v2.8h1991; CHECK-GI-NEXT: sshr v2.8h, v1.8h, #31992; CHECK-GI-NEXT: ushr v2.8h, v2.8h, #151993; CHECK-GI-NEXT: ssra v2.8h, v1.8h, #31994; CHECK-GI-NEXT: mls v0.8h, v2.8h, v3.8h1995; CHECK-GI-NEXT: ret1996entry:1997 %s = srem <8 x i16> %d, <i16 100, i16 100, i16 100, i16 100, i16 100, i16 100, i16 100, i16 100>1998 ret <8 x i16> %s1999}2000 2001define <2 x i16> @uv2i16_7(<2 x i16> %d, <2 x i16> %e) {2002; CHECK-SD-LABEL: uv2i16_7:2003; CHECK-SD: // %bb.0: // %entry2004; CHECK-SD-NEXT: movi d1, #0x00ffff0000ffff2005; CHECK-SD-NEXT: mov w8, #18725 // =0x49252006; CHECK-SD-NEXT: movk w8, #9362, lsl #162007; CHECK-SD-NEXT: dup v2.2s, w82008; CHECK-SD-NEXT: and v0.8b, v0.8b, v1.8b2009; CHECK-SD-NEXT: umull v1.2d, v0.2s, v2.2s2010; CHECK-SD-NEXT: movi v2.2s, #72011; CHECK-SD-NEXT: shrn v1.2s, v1.2d, #322012; CHECK-SD-NEXT: mls v0.2s, v1.2s, v2.2s2013; CHECK-SD-NEXT: ret2014;2015; CHECK-GI-LABEL: uv2i16_7:2016; CHECK-GI: // %bb.0: // %entry2017; CHECK-GI-NEXT: mov w8, #9363 // =0x24932018; CHECK-GI-NEXT: movi d2, #0x00ffff0000ffff2019; CHECK-GI-NEXT: fmov s1, w82020; CHECK-GI-NEXT: mov v1.h[1], w82021; CHECK-GI-NEXT: and v2.8b, v0.8b, v2.8b2022; CHECK-GI-NEXT: mov w8, #1 // =0x12023; CHECK-GI-NEXT: fmov s3, w82024; CHECK-GI-NEXT: ushll v1.4s, v1.4h, #02025; CHECK-GI-NEXT: mov v3.h[1], w82026; CHECK-GI-NEXT: mov w8, #2 // =0x22027; CHECK-GI-NEXT: mul v1.2s, v2.2s, v1.2s2028; CHECK-GI-NEXT: neg v3.4h, v3.4h2029; CHECK-GI-NEXT: ushr v2.2s, v1.2s, #162030; CHECK-GI-NEXT: sub v2.2s, v0.2s, v2.2s2031; CHECK-GI-NEXT: uzp1 v2.4h, v2.4h, v0.4h2032; CHECK-GI-NEXT: ushl v2.4h, v2.4h, v3.4h2033; CHECK-GI-NEXT: fmov s3, w82034; CHECK-GI-NEXT: ushll v2.4s, v2.4h, #02035; CHECK-GI-NEXT: mov v3.h[1], w82036; CHECK-GI-NEXT: mov w8, #7 // =0x72037; CHECK-GI-NEXT: usra v2.2s, v1.2s, #162038; CHECK-GI-NEXT: uzp1 v1.4h, v2.4h, v0.4h2039; CHECK-GI-NEXT: neg v2.4h, v3.4h2040; CHECK-GI-NEXT: ushl v1.4h, v1.4h, v2.4h2041; CHECK-GI-NEXT: dup v2.2s, w82042; CHECK-GI-NEXT: ushll v1.4s, v1.4h, #02043; CHECK-GI-NEXT: mls v0.2s, v1.2s, v2.2s2044; CHECK-GI-NEXT: ret2045entry:2046 %s = urem <2 x i16> %d, <i16 7, i16 7>2047 ret <2 x i16> %s2048}2049 2050define <2 x i16> @uv2i16_100(<2 x i16> %d, <2 x i16> %e) {2051; CHECK-SD-LABEL: uv2i16_100:2052; CHECK-SD: // %bb.0: // %entry2053; CHECK-SD-NEXT: movi d1, #0x00ffff0000ffff2054; CHECK-SD-NEXT: mov w8, #23593 // =0x5c292055; CHECK-SD-NEXT: movk w8, #655, lsl #162056; CHECK-SD-NEXT: dup v2.2s, w82057; CHECK-SD-NEXT: and v0.8b, v0.8b, v1.8b2058; CHECK-SD-NEXT: umull v1.2d, v0.2s, v2.2s2059; CHECK-SD-NEXT: movi v2.2s, #1002060; CHECK-SD-NEXT: shrn v1.2s, v1.2d, #322061; CHECK-SD-NEXT: mls v0.2s, v1.2s, v2.2s2062; CHECK-SD-NEXT: ret2063;2064; CHECK-GI-LABEL: uv2i16_100:2065; CHECK-GI: // %bb.0: // %entry2066; CHECK-GI-NEXT: mov w8, #2 // =0x22067; CHECK-GI-NEXT: uzp1 v2.4h, v0.4h, v0.4h2068; CHECK-GI-NEXT: fmov s1, w82069; CHECK-GI-NEXT: mov v1.h[1], w82070; CHECK-GI-NEXT: mov w8, #5243 // =0x147b2071; CHECK-GI-NEXT: fmov s3, w82072; CHECK-GI-NEXT: neg v1.4h, v1.4h2073; CHECK-GI-NEXT: mov v3.h[1], w82074; CHECK-GI-NEXT: mov w8, #1 // =0x12075; CHECK-GI-NEXT: ushl v1.4h, v2.4h, v1.4h2076; CHECK-GI-NEXT: ushll v2.4s, v3.4h, #02077; CHECK-GI-NEXT: ushll v1.4s, v1.4h, #02078; CHECK-GI-NEXT: mul v1.2s, v1.2s, v2.2s2079; CHECK-GI-NEXT: fmov s2, w82080; CHECK-GI-NEXT: mov v2.h[1], w82081; CHECK-GI-NEXT: mov w8, #100 // =0x642082; CHECK-GI-NEXT: ushr v1.2s, v1.2s, #162083; CHECK-GI-NEXT: uzp1 v1.4h, v1.4h, v0.4h2084; CHECK-GI-NEXT: neg v2.4h, v2.4h2085; CHECK-GI-NEXT: ushl v1.4h, v1.4h, v2.4h2086; CHECK-GI-NEXT: dup v2.2s, w82087; CHECK-GI-NEXT: ushll v1.4s, v1.4h, #02088; CHECK-GI-NEXT: mls v0.2s, v1.2s, v2.2s2089; CHECK-GI-NEXT: ret2090entry:2091 %s = urem <2 x i16> %d, <i16 100, i16 100>2092 ret <2 x i16> %s2093}2094 2095define <3 x i16> @uv3i16_7(<3 x i16> %d, <3 x i16> %e) {2096; CHECK-SD-LABEL: uv3i16_7:2097; CHECK-SD: // %bb.0: // %entry2098; CHECK-SD-NEXT: // kill: def $d0 killed $d0 def $q02099; CHECK-SD-NEXT: umov w9, v0.h[0]2100; CHECK-SD-NEXT: mov w8, #18725 // =0x49252101; CHECK-SD-NEXT: umov w10, v0.h[1]2102; CHECK-SD-NEXT: movk w8, #9362, lsl #162103; CHECK-SD-NEXT: umov w12, v0.h[2]2104; CHECK-SD-NEXT: umull x11, w9, w82105; CHECK-SD-NEXT: umull x13, w10, w82106; CHECK-SD-NEXT: umull x8, w12, w82107; CHECK-SD-NEXT: lsr x11, x11, #322108; CHECK-SD-NEXT: lsr x13, x13, #322109; CHECK-SD-NEXT: sub w11, w11, w11, lsl #32110; CHECK-SD-NEXT: lsr x8, x8, #322111; CHECK-SD-NEXT: sub w13, w13, w13, lsl #32112; CHECK-SD-NEXT: add w9, w9, w112113; CHECK-SD-NEXT: sub w8, w8, w8, lsl #32114; CHECK-SD-NEXT: fmov s0, w92115; CHECK-SD-NEXT: add w10, w10, w132116; CHECK-SD-NEXT: add w8, w12, w82117; CHECK-SD-NEXT: mov v0.h[1], w102118; CHECK-SD-NEXT: mov v0.h[2], w82119; CHECK-SD-NEXT: // kill: def $d0 killed $d0 killed $q02120; CHECK-SD-NEXT: ret2121;2122; CHECK-GI-LABEL: uv3i16_7:2123; CHECK-GI: // %bb.0: // %entry2124; CHECK-GI-NEXT: // kill: def $d0 killed $d0 def $q02125; CHECK-GI-NEXT: umov w9, v0.h[0]2126; CHECK-GI-NEXT: mov w8, #9363 // =0x24932127; CHECK-GI-NEXT: umov w10, v0.h[1]2128; CHECK-GI-NEXT: fmov s2, w82129; CHECK-GI-NEXT: umov w11, v0.h[2]2130; CHECK-GI-NEXT: fmov s1, w92131; CHECK-GI-NEXT: mov w9, #16 // =0x102132; CHECK-GI-NEXT: mov v2.s[1], w82133; CHECK-GI-NEXT: fmov s3, w92134; CHECK-GI-NEXT: mov v1.s[1], w102135; CHECK-GI-NEXT: mov v3.s[1], w92136; CHECK-GI-NEXT: mov v2.s[2], w82137; CHECK-GI-NEXT: mov w8, #1 // =0x12138; CHECK-GI-NEXT: mov v1.s[2], w112139; CHECK-GI-NEXT: mov v3.s[2], w92140; CHECK-GI-NEXT: mov w9, #2 // =0x22141; CHECK-GI-NEXT: mul v1.4s, v1.4s, v2.4s2142; CHECK-GI-NEXT: neg v2.4s, v3.4s2143; CHECK-GI-NEXT: fmov s3, w82144; CHECK-GI-NEXT: mov v3.h[1], w82145; CHECK-GI-NEXT: ushl v1.4s, v1.4s, v2.4s2146; CHECK-GI-NEXT: fmov s2, w92147; CHECK-GI-NEXT: xtn v1.4h, v1.4s2148; CHECK-GI-NEXT: mov v2.h[1], w92149; CHECK-GI-NEXT: mov v3.h[2], w82150; CHECK-GI-NEXT: mov w8, #7 // =0x72151; CHECK-GI-NEXT: sub v4.4h, v0.4h, v1.4h2152; CHECK-GI-NEXT: mov v2.h[2], w92153; CHECK-GI-NEXT: neg v3.4h, v3.4h2154; CHECK-GI-NEXT: ushl v3.4h, v4.4h, v3.4h2155; CHECK-GI-NEXT: fmov s4, w82156; CHECK-GI-NEXT: neg v2.4h, v2.4h2157; CHECK-GI-NEXT: mov v4.h[1], w82158; CHECK-GI-NEXT: add v1.4h, v3.4h, v1.4h2159; CHECK-GI-NEXT: ushl v1.4h, v1.4h, v2.4h2160; CHECK-GI-NEXT: mov v4.h[2], w82161; CHECK-GI-NEXT: mls v0.4h, v1.4h, v4.4h2162; CHECK-GI-NEXT: // kill: def $d0 killed $d0 killed $q02163; CHECK-GI-NEXT: ret2164entry:2165 %s = urem <3 x i16> %d, <i16 7, i16 7, i16 7>2166 ret <3 x i16> %s2167}2168 2169define <3 x i16> @uv3i16_100(<3 x i16> %d, <3 x i16> %e) {2170; CHECK-SD-LABEL: uv3i16_100:2171; CHECK-SD: // %bb.0: // %entry2172; CHECK-SD-NEXT: // kill: def $d0 killed $d0 def $q02173; CHECK-SD-NEXT: umov w9, v0.h[0]2174; CHECK-SD-NEXT: mov w8, #23593 // =0x5c292175; CHECK-SD-NEXT: umov w10, v0.h[1]2176; CHECK-SD-NEXT: movk w8, #655, lsl #162177; CHECK-SD-NEXT: umov w12, v0.h[2]2178; CHECK-SD-NEXT: mov w14, #100 // =0x642179; CHECK-SD-NEXT: umull x11, w9, w82180; CHECK-SD-NEXT: umull x13, w10, w82181; CHECK-SD-NEXT: umull x8, w12, w82182; CHECK-SD-NEXT: lsr x11, x11, #322183; CHECK-SD-NEXT: msub w9, w11, w14, w92184; CHECK-SD-NEXT: lsr x11, x13, #322185; CHECK-SD-NEXT: lsr x8, x8, #322186; CHECK-SD-NEXT: msub w10, w11, w14, w102187; CHECK-SD-NEXT: fmov s0, w92188; CHECK-SD-NEXT: msub w8, w8, w14, w122189; CHECK-SD-NEXT: mov v0.h[1], w102190; CHECK-SD-NEXT: mov v0.h[2], w82191; CHECK-SD-NEXT: // kill: def $d0 killed $d0 killed $q02192; CHECK-SD-NEXT: ret2193;2194; CHECK-GI-LABEL: uv3i16_100:2195; CHECK-GI: // %bb.0: // %entry2196; CHECK-GI-NEXT: mov w8, #2 // =0x22197; CHECK-GI-NEXT: mov w11, #5243 // =0x147b2198; CHECK-GI-NEXT: fmov s1, w82199; CHECK-GI-NEXT: fmov s2, w112200; CHECK-GI-NEXT: mov v1.h[1], w82201; CHECK-GI-NEXT: mov v2.s[1], w112202; CHECK-GI-NEXT: mov v1.h[2], w82203; CHECK-GI-NEXT: mov v2.s[2], w112204; CHECK-GI-NEXT: neg v1.4h, v1.4h2205; CHECK-GI-NEXT: ushl v1.4h, v0.4h, v1.4h2206; CHECK-GI-NEXT: umov w8, v1.h[0]2207; CHECK-GI-NEXT: umov w9, v1.h[1]2208; CHECK-GI-NEXT: umov w10, v1.h[2]2209; CHECK-GI-NEXT: fmov s1, w82210; CHECK-GI-NEXT: mov w8, #16 // =0x102211; CHECK-GI-NEXT: fmov s3, w82212; CHECK-GI-NEXT: mov v1.s[1], w92213; CHECK-GI-NEXT: mov w9, #100 // =0x642214; CHECK-GI-NEXT: mov v3.s[1], w82215; CHECK-GI-NEXT: mov v1.s[2], w102216; CHECK-GI-NEXT: mov v3.s[2], w82217; CHECK-GI-NEXT: mov w8, #1 // =0x12218; CHECK-GI-NEXT: fmov s4, w82219; CHECK-GI-NEXT: mul v1.4s, v1.4s, v2.4s2220; CHECK-GI-NEXT: mov v4.h[1], w82221; CHECK-GI-NEXT: neg v2.4s, v3.4s2222; CHECK-GI-NEXT: ushl v1.4s, v1.4s, v2.4s2223; CHECK-GI-NEXT: fmov s2, w92224; CHECK-GI-NEXT: mov v4.h[2], w82225; CHECK-GI-NEXT: mov v2.h[1], w92226; CHECK-GI-NEXT: xtn v1.4h, v1.4s2227; CHECK-GI-NEXT: neg v3.4h, v4.4h2228; CHECK-GI-NEXT: mov v2.h[2], w92229; CHECK-GI-NEXT: ushl v1.4h, v1.4h, v3.4h2230; CHECK-GI-NEXT: mls v0.4h, v1.4h, v2.4h2231; CHECK-GI-NEXT: ret2232entry:2233 %s = urem <3 x i16> %d, <i16 100, i16 100, i16 100>2234 ret <3 x i16> %s2235}2236 2237define <4 x i16> @uv4i16_7(<4 x i16> %d, <4 x i16> %e) {2238; CHECK-SD-LABEL: uv4i16_7:2239; CHECK-SD: // %bb.0: // %entry2240; CHECK-SD-NEXT: mov w8, #9363 // =0x24932241; CHECK-SD-NEXT: dup v1.4h, w82242; CHECK-SD-NEXT: umull v1.4s, v0.4h, v1.4h2243; CHECK-SD-NEXT: shrn v1.4h, v1.4s, #162244; CHECK-SD-NEXT: sub v2.4h, v0.4h, v1.4h2245; CHECK-SD-NEXT: ushll v2.4s, v2.4h, #02246; CHECK-SD-NEXT: shrn v2.4h, v2.4s, #12247; CHECK-SD-NEXT: add v1.4h, v2.4h, v1.4h2248; CHECK-SD-NEXT: movi v2.4h, #72249; CHECK-SD-NEXT: ushr v1.4h, v1.4h, #22250; CHECK-SD-NEXT: mls v0.4h, v1.4h, v2.4h2251; CHECK-SD-NEXT: ret2252;2253; CHECK-GI-LABEL: uv4i16_7:2254; CHECK-GI: // %bb.0: // %entry2255; CHECK-GI-NEXT: adrp x8, .LCPI52_02256; CHECK-GI-NEXT: ldr d1, [x8, :lo12:.LCPI52_0]2257; CHECK-GI-NEXT: umull v1.4s, v0.4h, v1.4h2258; CHECK-GI-NEXT: shrn v1.4h, v1.4s, #162259; CHECK-GI-NEXT: sub v2.4h, v0.4h, v1.4h2260; CHECK-GI-NEXT: usra v1.4h, v2.4h, #12261; CHECK-GI-NEXT: movi v2.4h, #72262; CHECK-GI-NEXT: ushr v1.4h, v1.4h, #22263; CHECK-GI-NEXT: mls v0.4h, v1.4h, v2.4h2264; CHECK-GI-NEXT: ret2265entry:2266 %s = urem <4 x i16> %d, <i16 7, i16 7, i16 7, i16 7>2267 ret <4 x i16> %s2268}2269 2270define <4 x i16> @uv4i16_100(<4 x i16> %d, <4 x i16> %e) {2271; CHECK-SD-LABEL: uv4i16_100:2272; CHECK-SD: // %bb.0: // %entry2273; CHECK-SD-NEXT: mov w8, #5243 // =0x147b2274; CHECK-SD-NEXT: ushr v2.4h, v0.4h, #22275; CHECK-SD-NEXT: dup v1.4h, w82276; CHECK-SD-NEXT: umull v1.4s, v2.4h, v1.4h2277; CHECK-SD-NEXT: movi v2.4h, #1002278; CHECK-SD-NEXT: ushr v1.4s, v1.4s, #172279; CHECK-SD-NEXT: xtn v1.4h, v1.4s2280; CHECK-SD-NEXT: mls v0.4h, v1.4h, v2.4h2281; CHECK-SD-NEXT: ret2282;2283; CHECK-GI-LABEL: uv4i16_100:2284; CHECK-GI: // %bb.0: // %entry2285; CHECK-GI-NEXT: adrp x8, .LCPI53_02286; CHECK-GI-NEXT: ushr v1.4h, v0.4h, #22287; CHECK-GI-NEXT: ldr d2, [x8, :lo12:.LCPI53_0]2288; CHECK-GI-NEXT: umull v1.4s, v1.4h, v2.4h2289; CHECK-GI-NEXT: movi v2.4h, #1002290; CHECK-GI-NEXT: ushr v1.4s, v1.4s, #172291; CHECK-GI-NEXT: xtn v1.4h, v1.4s2292; CHECK-GI-NEXT: mls v0.4h, v1.4h, v2.4h2293; CHECK-GI-NEXT: ret2294entry:2295 %s = urem <4 x i16> %d, <i16 100, i16 100, i16 100, i16 100>2296 ret <4 x i16> %s2297}2298 2299define <8 x i16> @uv8i16_7(<8 x i16> %d, <8 x i16> %e) {2300; CHECK-SD-LABEL: uv8i16_7:2301; CHECK-SD: // %bb.0: // %entry2302; CHECK-SD-NEXT: mov w8, #9363 // =0x24932303; CHECK-SD-NEXT: dup v1.8h, w82304; CHECK-SD-NEXT: umull2 v2.4s, v0.8h, v1.8h2305; CHECK-SD-NEXT: umull v1.4s, v0.4h, v1.4h2306; CHECK-SD-NEXT: uzp2 v1.8h, v1.8h, v2.8h2307; CHECK-SD-NEXT: sub v2.8h, v0.8h, v1.8h2308; CHECK-SD-NEXT: usra v1.8h, v2.8h, #12309; CHECK-SD-NEXT: movi v2.8h, #72310; CHECK-SD-NEXT: ushr v1.8h, v1.8h, #22311; CHECK-SD-NEXT: mls v0.8h, v1.8h, v2.8h2312; CHECK-SD-NEXT: ret2313;2314; CHECK-GI-LABEL: uv8i16_7:2315; CHECK-GI: // %bb.0: // %entry2316; CHECK-GI-NEXT: adrp x8, .LCPI54_02317; CHECK-GI-NEXT: ldr q1, [x8, :lo12:.LCPI54_0]2318; CHECK-GI-NEXT: umull2 v2.4s, v0.8h, v1.8h2319; CHECK-GI-NEXT: umull v1.4s, v0.4h, v1.4h2320; CHECK-GI-NEXT: uzp2 v1.8h, v1.8h, v2.8h2321; CHECK-GI-NEXT: sub v2.8h, v0.8h, v1.8h2322; CHECK-GI-NEXT: usra v1.8h, v2.8h, #12323; CHECK-GI-NEXT: movi v2.8h, #72324; CHECK-GI-NEXT: ushr v1.8h, v1.8h, #22325; CHECK-GI-NEXT: mls v0.8h, v1.8h, v2.8h2326; CHECK-GI-NEXT: ret2327entry:2328 %s = urem <8 x i16> %d, <i16 7, i16 7, i16 7, i16 7, i16 7, i16 7, i16 7, i16 7>2329 ret <8 x i16> %s2330}2331 2332define <8 x i16> @uv8i16_100(<8 x i16> %d, <8 x i16> %e) {2333; CHECK-SD-LABEL: uv8i16_100:2334; CHECK-SD: // %bb.0: // %entry2335; CHECK-SD-NEXT: mov w8, #5243 // =0x147b2336; CHECK-SD-NEXT: ushr v2.8h, v0.8h, #22337; CHECK-SD-NEXT: dup v1.8h, w82338; CHECK-SD-NEXT: umull2 v3.4s, v2.8h, v1.8h2339; CHECK-SD-NEXT: umull v1.4s, v2.4h, v1.4h2340; CHECK-SD-NEXT: movi v2.8h, #1002341; CHECK-SD-NEXT: uzp2 v1.8h, v1.8h, v3.8h2342; CHECK-SD-NEXT: ushr v1.8h, v1.8h, #12343; CHECK-SD-NEXT: mls v0.8h, v1.8h, v2.8h2344; CHECK-SD-NEXT: ret2345;2346; CHECK-GI-LABEL: uv8i16_100:2347; CHECK-GI: // %bb.0: // %entry2348; CHECK-GI-NEXT: adrp x8, .LCPI55_02349; CHECK-GI-NEXT: ushr v1.8h, v0.8h, #22350; CHECK-GI-NEXT: ldr q2, [x8, :lo12:.LCPI55_0]2351; CHECK-GI-NEXT: umull2 v3.4s, v1.8h, v2.8h2352; CHECK-GI-NEXT: umull v1.4s, v1.4h, v2.4h2353; CHECK-GI-NEXT: movi v2.8h, #1002354; CHECK-GI-NEXT: uzp2 v1.8h, v1.8h, v3.8h2355; CHECK-GI-NEXT: ushr v1.8h, v1.8h, #12356; CHECK-GI-NEXT: mls v0.8h, v1.8h, v2.8h2357; CHECK-GI-NEXT: ret2358entry:2359 %s = urem <8 x i16> %d, <i16 100, i16 100, i16 100, i16 100, i16 100, i16 100, i16 100, i16 100>2360 ret <8 x i16> %s2361}2362 2363define <2 x i32> @sv2i32_7(<2 x i32> %d, <2 x i32> %e) {2364; CHECK-SD-LABEL: sv2i32_7:2365; CHECK-SD: // %bb.0: // %entry2366; CHECK-SD-NEXT: mov w8, #9363 // =0x24932367; CHECK-SD-NEXT: movi v3.2s, #72368; CHECK-SD-NEXT: movk w8, #37449, lsl #162369; CHECK-SD-NEXT: dup v1.2s, w82370; CHECK-SD-NEXT: smull v1.2d, v0.2s, v1.2s2371; CHECK-SD-NEXT: shrn v1.2s, v1.2d, #322372; CHECK-SD-NEXT: add v1.2s, v1.2s, v0.2s2373; CHECK-SD-NEXT: sshr v2.2s, v1.2s, #22374; CHECK-SD-NEXT: usra v2.2s, v1.2s, #312375; CHECK-SD-NEXT: mls v0.2s, v2.2s, v3.2s2376; CHECK-SD-NEXT: ret2377;2378; CHECK-GI-LABEL: sv2i32_7:2379; CHECK-GI: // %bb.0: // %entry2380; CHECK-GI-NEXT: adrp x8, .LCPI56_02381; CHECK-GI-NEXT: movi v3.2s, #72382; CHECK-GI-NEXT: ldr d1, [x8, :lo12:.LCPI56_0]2383; CHECK-GI-NEXT: smull v1.2d, v0.2s, v1.2s2384; CHECK-GI-NEXT: shrn v1.2s, v1.2d, #322385; CHECK-GI-NEXT: add v1.2s, v1.2s, v0.2s2386; CHECK-GI-NEXT: sshr v2.2s, v1.2s, #22387; CHECK-GI-NEXT: ushr v2.2s, v2.2s, #312388; CHECK-GI-NEXT: ssra v2.2s, v1.2s, #22389; CHECK-GI-NEXT: mls v0.2s, v2.2s, v3.2s2390; CHECK-GI-NEXT: ret2391entry:2392 %s = srem <2 x i32> %d, <i32 7, i32 7>2393 ret <2 x i32> %s2394}2395 2396define <2 x i32> @sv2i32_100(<2 x i32> %d, <2 x i32> %e) {2397; CHECK-SD-LABEL: sv2i32_100:2398; CHECK-SD: // %bb.0: // %entry2399; CHECK-SD-NEXT: mov w8, #34079 // =0x851f2400; CHECK-SD-NEXT: movi v2.2s, #1002401; CHECK-SD-NEXT: movk w8, #20971, lsl #162402; CHECK-SD-NEXT: dup v1.2s, w82403; CHECK-SD-NEXT: smull v1.2d, v0.2s, v1.2s2404; CHECK-SD-NEXT: sshr v1.2d, v1.2d, #372405; CHECK-SD-NEXT: xtn v1.2s, v1.2d2406; CHECK-SD-NEXT: usra v1.2s, v1.2s, #312407; CHECK-SD-NEXT: mls v0.2s, v1.2s, v2.2s2408; CHECK-SD-NEXT: ret2409;2410; CHECK-GI-LABEL: sv2i32_100:2411; CHECK-GI: // %bb.0: // %entry2412; CHECK-GI-NEXT: adrp x8, .LCPI57_02413; CHECK-GI-NEXT: movi v3.2s, #1002414; CHECK-GI-NEXT: ldr d1, [x8, :lo12:.LCPI57_0]2415; CHECK-GI-NEXT: smull v1.2d, v0.2s, v1.2s2416; CHECK-GI-NEXT: shrn v1.2s, v1.2d, #322417; CHECK-GI-NEXT: sshr v2.2s, v1.2s, #52418; CHECK-GI-NEXT: ushr v2.2s, v2.2s, #312419; CHECK-GI-NEXT: ssra v2.2s, v1.2s, #52420; CHECK-GI-NEXT: mls v0.2s, v2.2s, v3.2s2421; CHECK-GI-NEXT: ret2422entry:2423 %s = srem <2 x i32> %d, <i32 100, i32 100>2424 ret <2 x i32> %s2425}2426 2427define <3 x i32> @sv3i32_7(<3 x i32> %d, <3 x i32> %e) {2428; CHECK-SD-LABEL: sv3i32_7:2429; CHECK-SD: // %bb.0: // %entry2430; CHECK-SD-NEXT: mov w8, #9363 // =0x24932431; CHECK-SD-NEXT: mov w9, v0.s[2]2432; CHECK-SD-NEXT: movi v3.2s, #72433; CHECK-SD-NEXT: movk w8, #37449, lsl #162434; CHECK-SD-NEXT: dup v1.2s, w82435; CHECK-SD-NEXT: smull x8, w9, w82436; CHECK-SD-NEXT: smull v1.2d, v0.2s, v1.2s2437; CHECK-SD-NEXT: add x8, x9, x8, lsr #322438; CHECK-SD-NEXT: asr w10, w8, #22439; CHECK-SD-NEXT: shrn v1.2s, v1.2d, #322440; CHECK-SD-NEXT: add w8, w10, w8, lsr #312441; CHECK-SD-NEXT: add v1.2s, v1.2s, v0.2s2442; CHECK-SD-NEXT: sub w8, w8, w8, lsl #32443; CHECK-SD-NEXT: add w8, w9, w82444; CHECK-SD-NEXT: sshr v2.2s, v1.2s, #22445; CHECK-SD-NEXT: usra v2.2s, v1.2s, #312446; CHECK-SD-NEXT: mls v0.2s, v2.2s, v3.2s2447; CHECK-SD-NEXT: mov v0.s[2], w82448; CHECK-SD-NEXT: ret2449;2450; CHECK-GI-LABEL: sv3i32_7:2451; CHECK-GI: // %bb.0: // %entry2452; CHECK-GI-NEXT: mov s1, v0.s[1]2453; CHECK-GI-NEXT: fmov w9, s02454; CHECK-GI-NEXT: mov w8, #7 // =0x72455; CHECK-GI-NEXT: mov s0, v0.s[2]2456; CHECK-GI-NEXT: sdiv w10, w9, w82457; CHECK-GI-NEXT: fmov w11, s12458; CHECK-GI-NEXT: fmov w13, s02459; CHECK-GI-NEXT: sdiv w12, w11, w82460; CHECK-GI-NEXT: lsl w14, w10, #32461; CHECK-GI-NEXT: sub w10, w14, w102462; CHECK-GI-NEXT: sub w9, w9, w102463; CHECK-GI-NEXT: fmov s0, w92464; CHECK-GI-NEXT: sdiv w8, w13, w82465; CHECK-GI-NEXT: lsl w15, w12, #32466; CHECK-GI-NEXT: sub w10, w15, w122467; CHECK-GI-NEXT: sub w10, w11, w102468; CHECK-GI-NEXT: mov v0.s[1], w102469; CHECK-GI-NEXT: lsl w9, w8, #32470; CHECK-GI-NEXT: sub w8, w9, w82471; CHECK-GI-NEXT: sub w8, w13, w82472; CHECK-GI-NEXT: mov v0.s[2], w82473; CHECK-GI-NEXT: ret2474entry:2475 %s = srem <3 x i32> %d, <i32 7, i32 7, i32 7>2476 ret <3 x i32> %s2477}2478 2479define <3 x i32> @sv3i32_100(<3 x i32> %d, <3 x i32> %e) {2480; CHECK-SD-LABEL: sv3i32_100:2481; CHECK-SD: // %bb.0: // %entry2482; CHECK-SD-NEXT: mov w8, #34079 // =0x851f2483; CHECK-SD-NEXT: mov w9, v0.s[2]2484; CHECK-SD-NEXT: movi v2.2s, #1002485; CHECK-SD-NEXT: movk w8, #20971, lsl #162486; CHECK-SD-NEXT: mov w10, #100 // =0x642487; CHECK-SD-NEXT: dup v1.2s, w82488; CHECK-SD-NEXT: smull x8, w9, w82489; CHECK-SD-NEXT: smull v1.2d, v0.2s, v1.2s2490; CHECK-SD-NEXT: asr x8, x8, #372491; CHECK-SD-NEXT: add w8, w8, w8, lsr #312492; CHECK-SD-NEXT: sshr v1.2d, v1.2d, #372493; CHECK-SD-NEXT: msub w8, w8, w10, w92494; CHECK-SD-NEXT: xtn v1.2s, v1.2d2495; CHECK-SD-NEXT: usra v1.2s, v1.2s, #312496; CHECK-SD-NEXT: mls v0.2s, v1.2s, v2.2s2497; CHECK-SD-NEXT: mov v0.s[2], w82498; CHECK-SD-NEXT: ret2499;2500; CHECK-GI-LABEL: sv3i32_100:2501; CHECK-GI: // %bb.0: // %entry2502; CHECK-GI-NEXT: mov s1, v0.s[1]2503; CHECK-GI-NEXT: fmov w9, s02504; CHECK-GI-NEXT: mov w8, #100 // =0x642505; CHECK-GI-NEXT: mov s0, v0.s[2]2506; CHECK-GI-NEXT: sdiv w10, w9, w82507; CHECK-GI-NEXT: fmov w11, s12508; CHECK-GI-NEXT: fmov w13, s02509; CHECK-GI-NEXT: sdiv w12, w11, w82510; CHECK-GI-NEXT: msub w9, w10, w8, w92511; CHECK-GI-NEXT: fmov s0, w92512; CHECK-GI-NEXT: sdiv w14, w13, w82513; CHECK-GI-NEXT: msub w10, w12, w8, w112514; CHECK-GI-NEXT: mov v0.s[1], w102515; CHECK-GI-NEXT: msub w8, w14, w8, w132516; CHECK-GI-NEXT: mov v0.s[2], w82517; CHECK-GI-NEXT: ret2518entry:2519 %s = srem <3 x i32> %d, <i32 100, i32 100, i32 100>2520 ret <3 x i32> %s2521}2522 2523define <4 x i32> @sv4i32_7(<4 x i32> %d, <4 x i32> %e) {2524; CHECK-SD-LABEL: sv4i32_7:2525; CHECK-SD: // %bb.0: // %entry2526; CHECK-SD-NEXT: mov w8, #9363 // =0x24932527; CHECK-SD-NEXT: movi v3.4s, #72528; CHECK-SD-NEXT: movk w8, #37449, lsl #162529; CHECK-SD-NEXT: dup v1.4s, w82530; CHECK-SD-NEXT: smull2 v2.2d, v0.4s, v1.4s2531; CHECK-SD-NEXT: smull v1.2d, v0.2s, v1.2s2532; CHECK-SD-NEXT: uzp2 v1.4s, v1.4s, v2.4s2533; CHECK-SD-NEXT: add v1.4s, v1.4s, v0.4s2534; CHECK-SD-NEXT: sshr v2.4s, v1.4s, #22535; CHECK-SD-NEXT: usra v2.4s, v1.4s, #312536; CHECK-SD-NEXT: mls v0.4s, v2.4s, v3.4s2537; CHECK-SD-NEXT: ret2538;2539; CHECK-GI-LABEL: sv4i32_7:2540; CHECK-GI: // %bb.0: // %entry2541; CHECK-GI-NEXT: adrp x8, .LCPI60_02542; CHECK-GI-NEXT: movi v3.4s, #72543; CHECK-GI-NEXT: ldr q1, [x8, :lo12:.LCPI60_0]2544; CHECK-GI-NEXT: smull2 v2.2d, v0.4s, v1.4s2545; CHECK-GI-NEXT: smull v1.2d, v0.2s, v1.2s2546; CHECK-GI-NEXT: uzp2 v1.4s, v1.4s, v2.4s2547; CHECK-GI-NEXT: add v1.4s, v1.4s, v0.4s2548; CHECK-GI-NEXT: sshr v2.4s, v1.4s, #22549; CHECK-GI-NEXT: ushr v2.4s, v2.4s, #312550; CHECK-GI-NEXT: ssra v2.4s, v1.4s, #22551; CHECK-GI-NEXT: mls v0.4s, v2.4s, v3.4s2552; CHECK-GI-NEXT: ret2553entry:2554 %s = srem <4 x i32> %d, <i32 7, i32 7, i32 7, i32 7>2555 ret <4 x i32> %s2556}2557 2558define <4 x i32> @sv4i32_100(<4 x i32> %d, <4 x i32> %e) {2559; CHECK-SD-LABEL: sv4i32_100:2560; CHECK-SD: // %bb.0: // %entry2561; CHECK-SD-NEXT: mov w8, #34079 // =0x851f2562; CHECK-SD-NEXT: movi v3.4s, #1002563; CHECK-SD-NEXT: movk w8, #20971, lsl #162564; CHECK-SD-NEXT: dup v1.4s, w82565; CHECK-SD-NEXT: smull2 v2.2d, v0.4s, v1.4s2566; CHECK-SD-NEXT: smull v1.2d, v0.2s, v1.2s2567; CHECK-SD-NEXT: uzp2 v1.4s, v1.4s, v2.4s2568; CHECK-SD-NEXT: sshr v2.4s, v1.4s, #52569; CHECK-SD-NEXT: usra v2.4s, v1.4s, #312570; CHECK-SD-NEXT: mls v0.4s, v2.4s, v3.4s2571; CHECK-SD-NEXT: ret2572;2573; CHECK-GI-LABEL: sv4i32_100:2574; CHECK-GI: // %bb.0: // %entry2575; CHECK-GI-NEXT: adrp x8, .LCPI61_02576; CHECK-GI-NEXT: movi v3.4s, #1002577; CHECK-GI-NEXT: ldr q1, [x8, :lo12:.LCPI61_0]2578; CHECK-GI-NEXT: smull2 v2.2d, v0.4s, v1.4s2579; CHECK-GI-NEXT: smull v1.2d, v0.2s, v1.2s2580; CHECK-GI-NEXT: uzp2 v1.4s, v1.4s, v2.4s2581; CHECK-GI-NEXT: sshr v2.4s, v1.4s, #52582; CHECK-GI-NEXT: ushr v2.4s, v2.4s, #312583; CHECK-GI-NEXT: ssra v2.4s, v1.4s, #52584; CHECK-GI-NEXT: mls v0.4s, v2.4s, v3.4s2585; CHECK-GI-NEXT: ret2586entry:2587 %s = srem <4 x i32> %d, <i32 100, i32 100, i32 100, i32 100>2588 ret <4 x i32> %s2589}2590 2591define <2 x i32> @uv2i32_7(<2 x i32> %d, <2 x i32> %e) {2592; CHECK-SD-LABEL: uv2i32_7:2593; CHECK-SD: // %bb.0: // %entry2594; CHECK-SD-NEXT: mov w8, #18725 // =0x49252595; CHECK-SD-NEXT: movk w8, #9362, lsl #162596; CHECK-SD-NEXT: dup v1.2s, w82597; CHECK-SD-NEXT: umull v1.2d, v0.2s, v1.2s2598; CHECK-SD-NEXT: shrn v1.2s, v1.2d, #322599; CHECK-SD-NEXT: sub v2.2s, v0.2s, v1.2s2600; CHECK-SD-NEXT: ushll v2.2d, v2.2s, #02601; CHECK-SD-NEXT: shrn v2.2s, v2.2d, #12602; CHECK-SD-NEXT: add v1.2s, v2.2s, v1.2s2603; CHECK-SD-NEXT: movi v2.2s, #72604; CHECK-SD-NEXT: ushr v1.2s, v1.2s, #22605; CHECK-SD-NEXT: mls v0.2s, v1.2s, v2.2s2606; CHECK-SD-NEXT: ret2607;2608; CHECK-GI-LABEL: uv2i32_7:2609; CHECK-GI: // %bb.0: // %entry2610; CHECK-GI-NEXT: adrp x8, .LCPI62_02611; CHECK-GI-NEXT: ldr d1, [x8, :lo12:.LCPI62_0]2612; CHECK-GI-NEXT: umull v1.2d, v0.2s, v1.2s2613; CHECK-GI-NEXT: shrn v1.2s, v1.2d, #322614; CHECK-GI-NEXT: sub v2.2s, v0.2s, v1.2s2615; CHECK-GI-NEXT: usra v1.2s, v2.2s, #12616; CHECK-GI-NEXT: movi v2.2s, #72617; CHECK-GI-NEXT: ushr v1.2s, v1.2s, #22618; CHECK-GI-NEXT: mls v0.2s, v1.2s, v2.2s2619; CHECK-GI-NEXT: ret2620entry:2621 %s = urem <2 x i32> %d, <i32 7, i32 7>2622 ret <2 x i32> %s2623}2624 2625define <2 x i32> @uv2i32_100(<2 x i32> %d, <2 x i32> %e) {2626; CHECK-SD-LABEL: uv2i32_100:2627; CHECK-SD: // %bb.0: // %entry2628; CHECK-SD-NEXT: mov w8, #34079 // =0x851f2629; CHECK-SD-NEXT: movi v2.2s, #1002630; CHECK-SD-NEXT: movk w8, #20971, lsl #162631; CHECK-SD-NEXT: dup v1.2s, w82632; CHECK-SD-NEXT: umull v1.2d, v0.2s, v1.2s2633; CHECK-SD-NEXT: ushr v1.2d, v1.2d, #372634; CHECK-SD-NEXT: xtn v1.2s, v1.2d2635; CHECK-SD-NEXT: mls v0.2s, v1.2s, v2.2s2636; CHECK-SD-NEXT: ret2637;2638; CHECK-GI-LABEL: uv2i32_100:2639; CHECK-GI: // %bb.0: // %entry2640; CHECK-GI-NEXT: adrp x8, .LCPI63_02641; CHECK-GI-NEXT: movi v2.2s, #1002642; CHECK-GI-NEXT: ldr d1, [x8, :lo12:.LCPI63_0]2643; CHECK-GI-NEXT: umull v1.2d, v0.2s, v1.2s2644; CHECK-GI-NEXT: ushr v1.2d, v1.2d, #372645; CHECK-GI-NEXT: xtn v1.2s, v1.2d2646; CHECK-GI-NEXT: mls v0.2s, v1.2s, v2.2s2647; CHECK-GI-NEXT: ret2648entry:2649 %s = urem <2 x i32> %d, <i32 100, i32 100>2650 ret <2 x i32> %s2651}2652 2653define <3 x i32> @uv3i32_7(<3 x i32> %d, <3 x i32> %e) {2654; CHECK-SD-LABEL: uv3i32_7:2655; CHECK-SD: // %bb.0: // %entry2656; CHECK-SD-NEXT: mov w8, #18725 // =0x49252657; CHECK-SD-NEXT: mov w9, v0.s[2]2658; CHECK-SD-NEXT: movk w8, #9362, lsl #162659; CHECK-SD-NEXT: dup v1.2s, w82660; CHECK-SD-NEXT: umull x8, w9, w82661; CHECK-SD-NEXT: umull v1.2d, v0.2s, v1.2s2662; CHECK-SD-NEXT: lsr x8, x8, #322663; CHECK-SD-NEXT: sub w10, w9, w82664; CHECK-SD-NEXT: shrn v1.2s, v1.2d, #322665; CHECK-SD-NEXT: add w8, w8, w10, lsr #12666; CHECK-SD-NEXT: lsr w8, w8, #22667; CHECK-SD-NEXT: sub v2.2s, v0.2s, v1.2s2668; CHECK-SD-NEXT: sub w8, w8, w8, lsl #32669; CHECK-SD-NEXT: ushll v2.2d, v2.2s, #02670; CHECK-SD-NEXT: add w8, w9, w82671; CHECK-SD-NEXT: shrn v2.2s, v2.2d, #12672; CHECK-SD-NEXT: add v1.2s, v2.2s, v1.2s2673; CHECK-SD-NEXT: movi v2.2s, #72674; CHECK-SD-NEXT: ushr v1.2s, v1.2s, #22675; CHECK-SD-NEXT: mls v0.2s, v1.2s, v2.2s2676; CHECK-SD-NEXT: mov v0.s[2], w82677; CHECK-SD-NEXT: ret2678;2679; CHECK-GI-LABEL: uv3i32_7:2680; CHECK-GI: // %bb.0: // %entry2681; CHECK-GI-NEXT: mov v1.s[0], v0.s[0]2682; CHECK-GI-NEXT: adrp x8, .LCPI64_02683; CHECK-GI-NEXT: mov w9, #18725 // =0x49252684; CHECK-GI-NEXT: ldr d2, [x8, :lo12:.LCPI64_0]2685; CHECK-GI-NEXT: mov w8, v0.s[2]2686; CHECK-GI-NEXT: movk w9, #9362, lsl #162687; CHECK-GI-NEXT: mov w10, #1 // =0x12688; CHECK-GI-NEXT: mov v1.s[1], v0.s[1]2689; CHECK-GI-NEXT: umull x8, w8, w92690; CHECK-GI-NEXT: umull v1.2d, v1.2s, v2.2s2691; CHECK-GI-NEXT: lsr x8, x8, #322692; CHECK-GI-NEXT: ushr v1.2d, v1.2d, #322693; CHECK-GI-NEXT: mov d2, v1.d[1]2694; CHECK-GI-NEXT: fmov x9, d12695; CHECK-GI-NEXT: fmov s1, w92696; CHECK-GI-NEXT: mov w9, #2 // =0x22697; CHECK-GI-NEXT: fmov x11, d22698; CHECK-GI-NEXT: fmov s2, w102699; CHECK-GI-NEXT: fmov s3, w92700; CHECK-GI-NEXT: mov v1.s[1], w112701; CHECK-GI-NEXT: mov v2.s[1], w102702; CHECK-GI-NEXT: mov v3.s[1], w92703; CHECK-GI-NEXT: mov v1.s[2], w82704; CHECK-GI-NEXT: mov v2.s[2], w102705; CHECK-GI-NEXT: mov w8, #7 // =0x72706; CHECK-GI-NEXT: mov v3.s[2], w92707; CHECK-GI-NEXT: sub v4.4s, v0.4s, v1.4s2708; CHECK-GI-NEXT: neg v2.4s, v2.4s2709; CHECK-GI-NEXT: ushl v2.4s, v4.4s, v2.4s2710; CHECK-GI-NEXT: fmov s4, w82711; CHECK-GI-NEXT: mov v4.s[1], w82712; CHECK-GI-NEXT: add v1.4s, v2.4s, v1.4s2713; CHECK-GI-NEXT: neg v2.4s, v3.4s2714; CHECK-GI-NEXT: ushl v1.4s, v1.4s, v2.4s2715; CHECK-GI-NEXT: mov v4.s[2], w82716; CHECK-GI-NEXT: mls v0.4s, v1.4s, v4.4s2717; CHECK-GI-NEXT: ret2718entry:2719 %s = urem <3 x i32> %d, <i32 7, i32 7, i32 7>2720 ret <3 x i32> %s2721}2722 2723define <3 x i32> @uv3i32_100(<3 x i32> %d, <3 x i32> %e) {2724; CHECK-SD-LABEL: uv3i32_100:2725; CHECK-SD: // %bb.0: // %entry2726; CHECK-SD-NEXT: mov w8, #34079 // =0x851f2727; CHECK-SD-NEXT: mov w9, v0.s[2]2728; CHECK-SD-NEXT: movi v2.2s, #1002729; CHECK-SD-NEXT: movk w8, #20971, lsl #162730; CHECK-SD-NEXT: mov w10, #100 // =0x642731; CHECK-SD-NEXT: dup v1.2s, w82732; CHECK-SD-NEXT: umull x8, w9, w82733; CHECK-SD-NEXT: umull v1.2d, v0.2s, v1.2s2734; CHECK-SD-NEXT: lsr x8, x8, #372735; CHECK-SD-NEXT: msub w8, w8, w10, w92736; CHECK-SD-NEXT: ushr v1.2d, v1.2d, #372737; CHECK-SD-NEXT: xtn v1.2s, v1.2d2738; CHECK-SD-NEXT: mls v0.2s, v1.2s, v2.2s2739; CHECK-SD-NEXT: mov v0.s[2], w82740; CHECK-SD-NEXT: ret2741;2742; CHECK-GI-LABEL: uv3i32_100:2743; CHECK-GI: // %bb.0: // %entry2744; CHECK-GI-NEXT: mov v1.s[0], v0.s[0]2745; CHECK-GI-NEXT: adrp x8, .LCPI65_02746; CHECK-GI-NEXT: mov w9, v0.s[2]2747; CHECK-GI-NEXT: ldr d2, [x8, :lo12:.LCPI65_0]2748; CHECK-GI-NEXT: mov w8, #5 // =0x52749; CHECK-GI-NEXT: mov w10, #34079 // =0x851f2750; CHECK-GI-NEXT: fmov s3, w82751; CHECK-GI-NEXT: movk w10, #20971, lsl #162752; CHECK-GI-NEXT: mov v1.s[1], v0.s[1]2753; CHECK-GI-NEXT: umull x9, w9, w102754; CHECK-GI-NEXT: mov v3.s[1], w82755; CHECK-GI-NEXT: umull v1.2d, v1.2s, v2.2s2756; CHECK-GI-NEXT: mov v3.s[2], w82757; CHECK-GI-NEXT: lsr x8, x9, #322758; CHECK-GI-NEXT: ushr v1.2d, v1.2d, #322759; CHECK-GI-NEXT: neg v3.4s, v3.4s2760; CHECK-GI-NEXT: mov d2, v1.d[1]2761; CHECK-GI-NEXT: fmov x11, d12762; CHECK-GI-NEXT: fmov s1, w112763; CHECK-GI-NEXT: fmov x10, d22764; CHECK-GI-NEXT: mov v1.s[1], w102765; CHECK-GI-NEXT: mov w10, #100 // =0x642766; CHECK-GI-NEXT: fmov s2, w102767; CHECK-GI-NEXT: mov v2.s[1], w102768; CHECK-GI-NEXT: mov v1.s[2], w82769; CHECK-GI-NEXT: mov v2.s[2], w102770; CHECK-GI-NEXT: ushl v1.4s, v1.4s, v3.4s2771; CHECK-GI-NEXT: mls v0.4s, v1.4s, v2.4s2772; CHECK-GI-NEXT: ret2773entry:2774 %s = urem <3 x i32> %d, <i32 100, i32 100, i32 100>2775 ret <3 x i32> %s2776}2777 2778define <4 x i32> @uv4i32_7(<4 x i32> %d, <4 x i32> %e) {2779; CHECK-SD-LABEL: uv4i32_7:2780; CHECK-SD: // %bb.0: // %entry2781; CHECK-SD-NEXT: mov w8, #18725 // =0x49252782; CHECK-SD-NEXT: movk w8, #9362, lsl #162783; CHECK-SD-NEXT: dup v1.4s, w82784; CHECK-SD-NEXT: umull2 v2.2d, v0.4s, v1.4s2785; CHECK-SD-NEXT: umull v1.2d, v0.2s, v1.2s2786; CHECK-SD-NEXT: uzp2 v1.4s, v1.4s, v2.4s2787; CHECK-SD-NEXT: sub v2.4s, v0.4s, v1.4s2788; CHECK-SD-NEXT: usra v1.4s, v2.4s, #12789; CHECK-SD-NEXT: movi v2.4s, #72790; CHECK-SD-NEXT: ushr v1.4s, v1.4s, #22791; CHECK-SD-NEXT: mls v0.4s, v1.4s, v2.4s2792; CHECK-SD-NEXT: ret2793;2794; CHECK-GI-LABEL: uv4i32_7:2795; CHECK-GI: // %bb.0: // %entry2796; CHECK-GI-NEXT: adrp x8, .LCPI66_02797; CHECK-GI-NEXT: ldr q1, [x8, :lo12:.LCPI66_0]2798; CHECK-GI-NEXT: umull2 v2.2d, v0.4s, v1.4s2799; CHECK-GI-NEXT: umull v1.2d, v0.2s, v1.2s2800; CHECK-GI-NEXT: uzp2 v1.4s, v1.4s, v2.4s2801; CHECK-GI-NEXT: sub v2.4s, v0.4s, v1.4s2802; CHECK-GI-NEXT: usra v1.4s, v2.4s, #12803; CHECK-GI-NEXT: movi v2.4s, #72804; CHECK-GI-NEXT: ushr v1.4s, v1.4s, #22805; CHECK-GI-NEXT: mls v0.4s, v1.4s, v2.4s2806; CHECK-GI-NEXT: ret2807entry:2808 %s = urem <4 x i32> %d, <i32 7, i32 7, i32 7, i32 7>2809 ret <4 x i32> %s2810}2811 2812define <4 x i32> @uv4i32_100(<4 x i32> %d, <4 x i32> %e) {2813; CHECK-SD-LABEL: uv4i32_100:2814; CHECK-SD: // %bb.0: // %entry2815; CHECK-SD-NEXT: mov w8, #34079 // =0x851f2816; CHECK-SD-NEXT: movk w8, #20971, lsl #162817; CHECK-SD-NEXT: dup v1.4s, w82818; CHECK-SD-NEXT: umull2 v2.2d, v0.4s, v1.4s2819; CHECK-SD-NEXT: umull v1.2d, v0.2s, v1.2s2820; CHECK-SD-NEXT: uzp2 v1.4s, v1.4s, v2.4s2821; CHECK-SD-NEXT: movi v2.4s, #1002822; CHECK-SD-NEXT: ushr v1.4s, v1.4s, #52823; CHECK-SD-NEXT: mls v0.4s, v1.4s, v2.4s2824; CHECK-SD-NEXT: ret2825;2826; CHECK-GI-LABEL: uv4i32_100:2827; CHECK-GI: // %bb.0: // %entry2828; CHECK-GI-NEXT: adrp x8, .LCPI67_02829; CHECK-GI-NEXT: ldr q1, [x8, :lo12:.LCPI67_0]2830; CHECK-GI-NEXT: umull2 v2.2d, v0.4s, v1.4s2831; CHECK-GI-NEXT: umull v1.2d, v0.2s, v1.2s2832; CHECK-GI-NEXT: uzp2 v1.4s, v1.4s, v2.4s2833; CHECK-GI-NEXT: movi v2.4s, #1002834; CHECK-GI-NEXT: ushr v1.4s, v1.4s, #52835; CHECK-GI-NEXT: mls v0.4s, v1.4s, v2.4s2836; CHECK-GI-NEXT: ret2837entry:2838 %s = urem <4 x i32> %d, <i32 100, i32 100, i32 100, i32 100>2839 ret <4 x i32> %s2840}2841 2842define <2 x i64> @sv2i64_7(<2 x i64> %d, <2 x i64> %e) {2843; CHECK-SD-LABEL: sv2i64_7:2844; CHECK-SD: // %bb.0: // %entry2845; CHECK-SD-NEXT: mov x8, #18725 // =0x49252846; CHECK-SD-NEXT: fmov x10, d02847; CHECK-SD-NEXT: mov x9, v0.d[1]2848; CHECK-SD-NEXT: movk x8, #9362, lsl #162849; CHECK-SD-NEXT: movk x8, #37449, lsl #322850; CHECK-SD-NEXT: movk x8, #18724, lsl #482851; CHECK-SD-NEXT: smulh x11, x10, x82852; CHECK-SD-NEXT: smulh x8, x9, x82853; CHECK-SD-NEXT: asr x12, x11, #12854; CHECK-SD-NEXT: add x11, x12, x11, lsr #632855; CHECK-SD-NEXT: asr x13, x8, #12856; CHECK-SD-NEXT: sub x11, x11, x11, lsl #32857; CHECK-SD-NEXT: add x8, x13, x8, lsr #632858; CHECK-SD-NEXT: add x10, x10, x112859; CHECK-SD-NEXT: sub x8, x8, x8, lsl #32860; CHECK-SD-NEXT: fmov d0, x102861; CHECK-SD-NEXT: add x8, x9, x82862; CHECK-SD-NEXT: mov v0.d[1], x82863; CHECK-SD-NEXT: ret2864;2865; CHECK-GI-LABEL: sv2i64_7:2866; CHECK-GI: // %bb.0: // %entry2867; CHECK-GI-NEXT: fmov x9, d02868; CHECK-GI-NEXT: mov w8, #7 // =0x72869; CHECK-GI-NEXT: mov x10, v0.d[1]2870; CHECK-GI-NEXT: sdiv x9, x9, x82871; CHECK-GI-NEXT: sdiv x8, x10, x82872; CHECK-GI-NEXT: fmov d1, x92873; CHECK-GI-NEXT: mov v1.d[1], x82874; CHECK-GI-NEXT: adrp x8, .LCPI68_02875; CHECK-GI-NEXT: ldr q2, [x8, :lo12:.LCPI68_0]2876; CHECK-GI-NEXT: fmov x11, d22877; CHECK-GI-NEXT: mov x9, v2.d[1]2878; CHECK-GI-NEXT: fmov x10, d12879; CHECK-GI-NEXT: mov x8, v1.d[1]2880; CHECK-GI-NEXT: mul x10, x10, x112881; CHECK-GI-NEXT: mul x8, x8, x92882; CHECK-GI-NEXT: fmov d1, x102883; CHECK-GI-NEXT: mov v1.d[1], x82884; CHECK-GI-NEXT: sub v0.2d, v0.2d, v1.2d2885; CHECK-GI-NEXT: ret2886entry:2887 %s = srem <2 x i64> %d, <i64 7, i64 7>2888 ret <2 x i64> %s2889}2890 2891define <2 x i64> @sv2i64_100(<2 x i64> %d, <2 x i64> %e) {2892; CHECK-SD-LABEL: sv2i64_100:2893; CHECK-SD: // %bb.0: // %entry2894; CHECK-SD-NEXT: mov x8, #55051 // =0xd70b2895; CHECK-SD-NEXT: fmov x10, d02896; CHECK-SD-NEXT: mov x9, v0.d[1]2897; CHECK-SD-NEXT: movk x8, #28835, lsl #162898; CHECK-SD-NEXT: movk x8, #2621, lsl #322899; CHECK-SD-NEXT: movk x8, #41943, lsl #482900; CHECK-SD-NEXT: smulh x11, x10, x82901; CHECK-SD-NEXT: smulh x8, x9, x82902; CHECK-SD-NEXT: add x11, x11, x102903; CHECK-SD-NEXT: asr x12, x11, #62904; CHECK-SD-NEXT: add x8, x8, x92905; CHECK-SD-NEXT: add x11, x12, x11, lsr #632906; CHECK-SD-NEXT: asr x13, x8, #62907; CHECK-SD-NEXT: mov w12, #100 // =0x642908; CHECK-SD-NEXT: msub x10, x11, x12, x102909; CHECK-SD-NEXT: add x8, x13, x8, lsr #632910; CHECK-SD-NEXT: msub x8, x8, x12, x92911; CHECK-SD-NEXT: fmov d0, x102912; CHECK-SD-NEXT: mov v0.d[1], x82913; CHECK-SD-NEXT: ret2914;2915; CHECK-GI-LABEL: sv2i64_100:2916; CHECK-GI: // %bb.0: // %entry2917; CHECK-GI-NEXT: fmov x9, d02918; CHECK-GI-NEXT: mov w8, #100 // =0x642919; CHECK-GI-NEXT: mov x10, v0.d[1]2920; CHECK-GI-NEXT: sdiv x9, x9, x82921; CHECK-GI-NEXT: sdiv x8, x10, x82922; CHECK-GI-NEXT: fmov d1, x92923; CHECK-GI-NEXT: mov v1.d[1], x82924; CHECK-GI-NEXT: adrp x8, .LCPI69_02925; CHECK-GI-NEXT: ldr q2, [x8, :lo12:.LCPI69_0]2926; CHECK-GI-NEXT: fmov x11, d22927; CHECK-GI-NEXT: mov x9, v2.d[1]2928; CHECK-GI-NEXT: fmov x10, d12929; CHECK-GI-NEXT: mov x8, v1.d[1]2930; CHECK-GI-NEXT: mul x10, x10, x112931; CHECK-GI-NEXT: mul x8, x8, x92932; CHECK-GI-NEXT: fmov d1, x102933; CHECK-GI-NEXT: mov v1.d[1], x82934; CHECK-GI-NEXT: sub v0.2d, v0.2d, v1.2d2935; CHECK-GI-NEXT: ret2936entry:2937 %s = srem <2 x i64> %d, <i64 100, i64 100>2938 ret <2 x i64> %s2939}2940 2941define <2 x i64> @uv2i64_7(<2 x i64> %d, <2 x i64> %e) {2942; CHECK-SD-LABEL: uv2i64_7:2943; CHECK-SD: // %bb.0: // %entry2944; CHECK-SD-NEXT: mov x8, #9363 // =0x24932945; CHECK-SD-NEXT: fmov x10, d02946; CHECK-SD-NEXT: mov x9, v0.d[1]2947; CHECK-SD-NEXT: movk x8, #37449, lsl #162948; CHECK-SD-NEXT: movk x8, #18724, lsl #322949; CHECK-SD-NEXT: movk x8, #9362, lsl #482950; CHECK-SD-NEXT: umulh x11, x10, x82951; CHECK-SD-NEXT: umulh x8, x9, x82952; CHECK-SD-NEXT: sub x12, x10, x112953; CHECK-SD-NEXT: add x11, x11, x12, lsr #12954; CHECK-SD-NEXT: sub x12, x9, x82955; CHECK-SD-NEXT: lsr x11, x11, #22956; CHECK-SD-NEXT: add x8, x8, x12, lsr #12957; CHECK-SD-NEXT: sub x11, x11, x11, lsl #32958; CHECK-SD-NEXT: lsr x8, x8, #22959; CHECK-SD-NEXT: add x10, x10, x112960; CHECK-SD-NEXT: sub x8, x8, x8, lsl #32961; CHECK-SD-NEXT: fmov d0, x102962; CHECK-SD-NEXT: add x8, x9, x82963; CHECK-SD-NEXT: mov v0.d[1], x82964; CHECK-SD-NEXT: ret2965;2966; CHECK-GI-LABEL: uv2i64_7:2967; CHECK-GI: // %bb.0: // %entry2968; CHECK-GI-NEXT: mov x8, #9363 // =0x24932969; CHECK-GI-NEXT: fmov x10, d02970; CHECK-GI-NEXT: mov x9, v0.d[1]2971; CHECK-GI-NEXT: movk x8, #37449, lsl #162972; CHECK-GI-NEXT: movk x8, #18724, lsl #322973; CHECK-GI-NEXT: movk x8, #9362, lsl #482974; CHECK-GI-NEXT: umulh x10, x10, x82975; CHECK-GI-NEXT: umulh x8, x9, x82976; CHECK-GI-NEXT: fmov d1, x102977; CHECK-GI-NEXT: mov v1.d[1], x82978; CHECK-GI-NEXT: adrp x8, .LCPI70_02979; CHECK-GI-NEXT: sub v2.2d, v0.2d, v1.2d2980; CHECK-GI-NEXT: usra v1.2d, v2.2d, #12981; CHECK-GI-NEXT: ldr q2, [x8, :lo12:.LCPI70_0]2982; CHECK-GI-NEXT: fmov x11, d22983; CHECK-GI-NEXT: mov x9, v2.d[1]2984; CHECK-GI-NEXT: ushr v1.2d, v1.2d, #22985; CHECK-GI-NEXT: fmov x10, d12986; CHECK-GI-NEXT: mov x8, v1.d[1]2987; CHECK-GI-NEXT: mul x10, x10, x112988; CHECK-GI-NEXT: mul x8, x8, x92989; CHECK-GI-NEXT: fmov d1, x102990; CHECK-GI-NEXT: mov v1.d[1], x82991; CHECK-GI-NEXT: sub v0.2d, v0.2d, v1.2d2992; CHECK-GI-NEXT: ret2993entry:2994 %s = urem <2 x i64> %d, <i64 7, i64 7>2995 ret <2 x i64> %s2996}2997 2998define <2 x i64> @uv2i64_100(<2 x i64> %d, <2 x i64> %e) {2999; CHECK-SD-LABEL: uv2i64_100:3000; CHECK-SD: // %bb.0: // %entry3001; CHECK-SD-NEXT: fmov x10, d03002; CHECK-SD-NEXT: mov x8, #62915 // =0xf5c33003; CHECK-SD-NEXT: mov x9, v0.d[1]3004; CHECK-SD-NEXT: movk x8, #23592, lsl #163005; CHECK-SD-NEXT: movk x8, #49807, lsl #323006; CHECK-SD-NEXT: lsr x11, x10, #23007; CHECK-SD-NEXT: movk x8, #10485, lsl #483008; CHECK-SD-NEXT: lsr x12, x9, #23009; CHECK-SD-NEXT: umulh x11, x11, x83010; CHECK-SD-NEXT: umulh x8, x12, x83011; CHECK-SD-NEXT: mov w12, #100 // =0x643012; CHECK-SD-NEXT: lsr x11, x11, #23013; CHECK-SD-NEXT: msub x10, x11, x12, x103014; CHECK-SD-NEXT: lsr x8, x8, #23015; CHECK-SD-NEXT: msub x8, x8, x12, x93016; CHECK-SD-NEXT: fmov d0, x103017; CHECK-SD-NEXT: mov v0.d[1], x83018; CHECK-SD-NEXT: ret3019;3020; CHECK-GI-LABEL: uv2i64_100:3021; CHECK-GI: // %bb.0: // %entry3022; CHECK-GI-NEXT: ushr v1.2d, v0.2d, #23023; CHECK-GI-NEXT: mov x8, #62915 // =0xf5c33024; CHECK-GI-NEXT: movk x8, #23592, lsl #163025; CHECK-GI-NEXT: movk x8, #49807, lsl #323026; CHECK-GI-NEXT: fmov x10, d13027; CHECK-GI-NEXT: movk x8, #10485, lsl #483028; CHECK-GI-NEXT: mov x9, v1.d[1]3029; CHECK-GI-NEXT: umulh x10, x10, x83030; CHECK-GI-NEXT: umulh x8, x9, x83031; CHECK-GI-NEXT: fmov d1, x103032; CHECK-GI-NEXT: mov v1.d[1], x83033; CHECK-GI-NEXT: adrp x8, .LCPI71_03034; CHECK-GI-NEXT: ldr q2, [x8, :lo12:.LCPI71_0]3035; CHECK-GI-NEXT: fmov x11, d23036; CHECK-GI-NEXT: mov x9, v2.d[1]3037; CHECK-GI-NEXT: ushr v1.2d, v1.2d, #23038; CHECK-GI-NEXT: fmov x10, d13039; CHECK-GI-NEXT: mov x8, v1.d[1]3040; CHECK-GI-NEXT: mul x10, x10, x113041; CHECK-GI-NEXT: mul x8, x8, x93042; CHECK-GI-NEXT: fmov d1, x103043; CHECK-GI-NEXT: mov v1.d[1], x83044; CHECK-GI-NEXT: sub v0.2d, v0.2d, v1.2d3045; CHECK-GI-NEXT: ret3046entry:3047 %s = urem <2 x i64> %d, <i64 100, i64 100>3048 ret <2 x i64> %s3049}3050 3051define <2 x i128> @sv2i128_7(<2 x i128> %d, <2 x i128> %e) {3052; CHECK-SD-LABEL: sv2i128_7:3053; CHECK-SD: // %bb.0: // %entry3054; CHECK-SD-NEXT: str x30, [sp, #-48]! // 8-byte Folded Spill3055; CHECK-SD-NEXT: stp x22, x21, [sp, #16] // 16-byte Folded Spill3056; CHECK-SD-NEXT: stp x20, x19, [sp, #32] // 16-byte Folded Spill3057; CHECK-SD-NEXT: .cfi_def_cfa_offset 483058; CHECK-SD-NEXT: .cfi_offset w19, -83059; CHECK-SD-NEXT: .cfi_offset w20, -163060; CHECK-SD-NEXT: .cfi_offset w21, -243061; CHECK-SD-NEXT: .cfi_offset w22, -323062; CHECK-SD-NEXT: .cfi_offset w30, -483063; CHECK-SD-NEXT: mov x19, x33064; CHECK-SD-NEXT: mov x20, x23065; CHECK-SD-NEXT: mov w2, #7 // =0x73066; CHECK-SD-NEXT: mov x3, xzr3067; CHECK-SD-NEXT: bl __modti33068; CHECK-SD-NEXT: mov x21, x03069; CHECK-SD-NEXT: mov x22, x13070; CHECK-SD-NEXT: mov x0, x203071; CHECK-SD-NEXT: mov x1, x193072; CHECK-SD-NEXT: mov w2, #7 // =0x73073; CHECK-SD-NEXT: mov x3, xzr3074; CHECK-SD-NEXT: bl __modti33075; CHECK-SD-NEXT: mov x2, x03076; CHECK-SD-NEXT: mov x3, x13077; CHECK-SD-NEXT: mov x0, x213078; CHECK-SD-NEXT: mov x1, x223079; CHECK-SD-NEXT: ldp x20, x19, [sp, #32] // 16-byte Folded Reload3080; CHECK-SD-NEXT: ldp x22, x21, [sp, #16] // 16-byte Folded Reload3081; CHECK-SD-NEXT: ldr x30, [sp], #48 // 8-byte Folded Reload3082; CHECK-SD-NEXT: ret3083;3084; CHECK-GI-LABEL: sv2i128_7:3085; CHECK-GI: // %bb.0: // %entry3086; CHECK-GI-NEXT: str x30, [sp, #-48]! // 8-byte Folded Spill3087; CHECK-GI-NEXT: stp x22, x21, [sp, #16] // 16-byte Folded Spill3088; CHECK-GI-NEXT: stp x20, x19, [sp, #32] // 16-byte Folded Spill3089; CHECK-GI-NEXT: .cfi_def_cfa_offset 483090; CHECK-GI-NEXT: .cfi_offset w19, -83091; CHECK-GI-NEXT: .cfi_offset w20, -163092; CHECK-GI-NEXT: .cfi_offset w21, -243093; CHECK-GI-NEXT: .cfi_offset w22, -323094; CHECK-GI-NEXT: .cfi_offset w30, -483095; CHECK-GI-NEXT: mov x19, x23096; CHECK-GI-NEXT: mov x20, x33097; CHECK-GI-NEXT: mov w2, #7 // =0x73098; CHECK-GI-NEXT: mov x3, xzr3099; CHECK-GI-NEXT: bl __modti33100; CHECK-GI-NEXT: mov x21, x03101; CHECK-GI-NEXT: mov x22, x13102; CHECK-GI-NEXT: mov x0, x193103; CHECK-GI-NEXT: mov x1, x203104; CHECK-GI-NEXT: mov w2, #7 // =0x73105; CHECK-GI-NEXT: mov x3, xzr3106; CHECK-GI-NEXT: bl __modti33107; CHECK-GI-NEXT: mov x2, x03108; CHECK-GI-NEXT: mov x3, x13109; CHECK-GI-NEXT: mov x0, x213110; CHECK-GI-NEXT: mov x1, x223111; CHECK-GI-NEXT: ldp x20, x19, [sp, #32] // 16-byte Folded Reload3112; CHECK-GI-NEXT: ldp x22, x21, [sp, #16] // 16-byte Folded Reload3113; CHECK-GI-NEXT: ldr x30, [sp], #48 // 8-byte Folded Reload3114; CHECK-GI-NEXT: ret3115entry:3116 %s = srem <2 x i128> %d, <i128 7, i128 7>3117 ret <2 x i128> %s3118}3119 3120define <2 x i128> @sv2i128_100(<2 x i128> %d, <2 x i128> %e) {3121; CHECK-SD-LABEL: sv2i128_100:3122; CHECK-SD: // %bb.0: // %entry3123; CHECK-SD-NEXT: str x30, [sp, #-48]! // 8-byte Folded Spill3124; CHECK-SD-NEXT: stp x22, x21, [sp, #16] // 16-byte Folded Spill3125; CHECK-SD-NEXT: stp x20, x19, [sp, #32] // 16-byte Folded Spill3126; CHECK-SD-NEXT: .cfi_def_cfa_offset 483127; CHECK-SD-NEXT: .cfi_offset w19, -83128; CHECK-SD-NEXT: .cfi_offset w20, -163129; CHECK-SD-NEXT: .cfi_offset w21, -243130; CHECK-SD-NEXT: .cfi_offset w22, -323131; CHECK-SD-NEXT: .cfi_offset w30, -483132; CHECK-SD-NEXT: mov x19, x33133; CHECK-SD-NEXT: mov x20, x23134; CHECK-SD-NEXT: mov w2, #100 // =0x643135; CHECK-SD-NEXT: mov x3, xzr3136; CHECK-SD-NEXT: bl __modti33137; CHECK-SD-NEXT: mov x21, x03138; CHECK-SD-NEXT: mov x22, x13139; CHECK-SD-NEXT: mov x0, x203140; CHECK-SD-NEXT: mov x1, x193141; CHECK-SD-NEXT: mov w2, #100 // =0x643142; CHECK-SD-NEXT: mov x3, xzr3143; CHECK-SD-NEXT: bl __modti33144; CHECK-SD-NEXT: mov x2, x03145; CHECK-SD-NEXT: mov x3, x13146; CHECK-SD-NEXT: mov x0, x213147; CHECK-SD-NEXT: mov x1, x223148; CHECK-SD-NEXT: ldp x20, x19, [sp, #32] // 16-byte Folded Reload3149; CHECK-SD-NEXT: ldp x22, x21, [sp, #16] // 16-byte Folded Reload3150; CHECK-SD-NEXT: ldr x30, [sp], #48 // 8-byte Folded Reload3151; CHECK-SD-NEXT: ret3152;3153; CHECK-GI-LABEL: sv2i128_100:3154; CHECK-GI: // %bb.0: // %entry3155; CHECK-GI-NEXT: str x30, [sp, #-48]! // 8-byte Folded Spill3156; CHECK-GI-NEXT: stp x22, x21, [sp, #16] // 16-byte Folded Spill3157; CHECK-GI-NEXT: stp x20, x19, [sp, #32] // 16-byte Folded Spill3158; CHECK-GI-NEXT: .cfi_def_cfa_offset 483159; CHECK-GI-NEXT: .cfi_offset w19, -83160; CHECK-GI-NEXT: .cfi_offset w20, -163161; CHECK-GI-NEXT: .cfi_offset w21, -243162; CHECK-GI-NEXT: .cfi_offset w22, -323163; CHECK-GI-NEXT: .cfi_offset w30, -483164; CHECK-GI-NEXT: mov x19, x23165; CHECK-GI-NEXT: mov x20, x33166; CHECK-GI-NEXT: mov w2, #100 // =0x643167; CHECK-GI-NEXT: mov x3, xzr3168; CHECK-GI-NEXT: bl __modti33169; CHECK-GI-NEXT: mov x21, x03170; CHECK-GI-NEXT: mov x22, x13171; CHECK-GI-NEXT: mov x0, x193172; CHECK-GI-NEXT: mov x1, x203173; CHECK-GI-NEXT: mov w2, #100 // =0x643174; CHECK-GI-NEXT: mov x3, xzr3175; CHECK-GI-NEXT: bl __modti33176; CHECK-GI-NEXT: mov x2, x03177; CHECK-GI-NEXT: mov x3, x13178; CHECK-GI-NEXT: mov x0, x213179; CHECK-GI-NEXT: mov x1, x223180; CHECK-GI-NEXT: ldp x20, x19, [sp, #32] // 16-byte Folded Reload3181; CHECK-GI-NEXT: ldp x22, x21, [sp, #16] // 16-byte Folded Reload3182; CHECK-GI-NEXT: ldr x30, [sp], #48 // 8-byte Folded Reload3183; CHECK-GI-NEXT: ret3184entry:3185 %s = srem <2 x i128> %d, <i128 100, i128 100>3186 ret <2 x i128> %s3187}3188 3189define <2 x i128> @uv2i128_7(<2 x i128> %d, <2 x i128> %e) {3190; CHECK-SD-LABEL: uv2i128_7:3191; CHECK-SD: // %bb.0: // %entry3192; CHECK-SD-NEXT: str x30, [sp, #-48]! // 8-byte Folded Spill3193; CHECK-SD-NEXT: stp x22, x21, [sp, #16] // 16-byte Folded Spill3194; CHECK-SD-NEXT: stp x20, x19, [sp, #32] // 16-byte Folded Spill3195; CHECK-SD-NEXT: .cfi_def_cfa_offset 483196; CHECK-SD-NEXT: .cfi_offset w19, -83197; CHECK-SD-NEXT: .cfi_offset w20, -163198; CHECK-SD-NEXT: .cfi_offset w21, -243199; CHECK-SD-NEXT: .cfi_offset w22, -323200; CHECK-SD-NEXT: .cfi_offset w30, -483201; CHECK-SD-NEXT: mov x19, x33202; CHECK-SD-NEXT: mov x20, x23203; CHECK-SD-NEXT: mov w2, #7 // =0x73204; CHECK-SD-NEXT: mov x3, xzr3205; CHECK-SD-NEXT: bl __umodti33206; CHECK-SD-NEXT: mov x21, x03207; CHECK-SD-NEXT: mov x22, x13208; CHECK-SD-NEXT: mov x0, x203209; CHECK-SD-NEXT: mov x1, x193210; CHECK-SD-NEXT: mov w2, #7 // =0x73211; CHECK-SD-NEXT: mov x3, xzr3212; CHECK-SD-NEXT: bl __umodti33213; CHECK-SD-NEXT: mov x2, x03214; CHECK-SD-NEXT: mov x3, x13215; CHECK-SD-NEXT: mov x0, x213216; CHECK-SD-NEXT: mov x1, x223217; CHECK-SD-NEXT: ldp x20, x19, [sp, #32] // 16-byte Folded Reload3218; CHECK-SD-NEXT: ldp x22, x21, [sp, #16] // 16-byte Folded Reload3219; CHECK-SD-NEXT: ldr x30, [sp], #48 // 8-byte Folded Reload3220; CHECK-SD-NEXT: ret3221;3222; CHECK-GI-LABEL: uv2i128_7:3223; CHECK-GI: // %bb.0: // %entry3224; CHECK-GI-NEXT: mov x10, #18725 // =0x49253225; CHECK-GI-NEXT: mov x8, #9362 // =0x24923226; CHECK-GI-NEXT: sub x4, x0, x03227; CHECK-GI-NEXT: movk x10, #9362, lsl #163228; CHECK-GI-NEXT: movk x8, #37449, lsl #163229; CHECK-GI-NEXT: umulh x18, x0, xzr3230; CHECK-GI-NEXT: movk x10, #37449, lsl #323231; CHECK-GI-NEXT: movk x8, #18724, lsl #323232; CHECK-GI-NEXT: movk x10, #18724, lsl #483233; CHECK-GI-NEXT: movk x8, #9362, lsl #483234; CHECK-GI-NEXT: mul x11, x1, x103235; CHECK-GI-NEXT: mul x12, x0, x83236; CHECK-GI-NEXT: umulh x13, x0, x103237; CHECK-GI-NEXT: mul x14, x1, x83238; CHECK-GI-NEXT: adds x11, x11, x123239; CHECK-GI-NEXT: umulh x15, x1, x103240; CHECK-GI-NEXT: cset w12, hs3241; CHECK-GI-NEXT: cmn x11, x133242; CHECK-GI-NEXT: and x11, x12, #0x13243; CHECK-GI-NEXT: umulh x16, x0, x83244; CHECK-GI-NEXT: cset w12, hs3245; CHECK-GI-NEXT: add x14, x14, x43246; CHECK-GI-NEXT: and x12, x12, #0x13247; CHECK-GI-NEXT: and x4, xzr, #0x13248; CHECK-GI-NEXT: mul x13, x3, x103249; CHECK-GI-NEXT: add x11, x11, x123250; CHECK-GI-NEXT: and x12, xzr, #0x13251; CHECK-GI-NEXT: adds x14, x14, x153252; CHECK-GI-NEXT: add x12, x12, x43253; CHECK-GI-NEXT: mul x5, x2, x83254; CHECK-GI-NEXT: cset w4, hs3255; CHECK-GI-NEXT: adds x14, x14, x163256; CHECK-GI-NEXT: and x16, x4, #0x13257; CHECK-GI-NEXT: umulh x9, xzr, x103258; CHECK-GI-NEXT: cset w4, hs3259; CHECK-GI-NEXT: adds x11, x14, x113260; CHECK-GI-NEXT: add x12, x12, x163261; CHECK-GI-NEXT: and x16, x4, #0x13262; CHECK-GI-NEXT: cset w14, hs3263; CHECK-GI-NEXT: umulh x17, x1, x83264; CHECK-GI-NEXT: add x12, x12, x163265; CHECK-GI-NEXT: adds x13, x13, x53266; CHECK-GI-NEXT: umulh x15, x2, x103267; CHECK-GI-NEXT: cset w4, hs3268; CHECK-GI-NEXT: and x16, x4, #0x13269; CHECK-GI-NEXT: mul x6, x3, x83270; CHECK-GI-NEXT: umulh x10, x3, x103271; CHECK-GI-NEXT: cmn x13, x153272; CHECK-GI-NEXT: and x13, x14, #0x13273; CHECK-GI-NEXT: add x14, x9, x173274; CHECK-GI-NEXT: umulh x15, x2, x83275; CHECK-GI-NEXT: add x12, x12, x133276; CHECK-GI-NEXT: add x13, x14, x183277; CHECK-GI-NEXT: cset w14, hs3278; CHECK-GI-NEXT: sub x17, x2, x23279; CHECK-GI-NEXT: and x18, xzr, #0x13280; CHECK-GI-NEXT: and x14, x14, #0x13281; CHECK-GI-NEXT: umulh x8, x3, x83282; CHECK-GI-NEXT: add x12, x13, x123283; CHECK-GI-NEXT: add x14, x16, x143284; CHECK-GI-NEXT: add x16, x6, x173285; CHECK-GI-NEXT: and x17, xzr, #0x13286; CHECK-GI-NEXT: adds x10, x16, x103287; CHECK-GI-NEXT: add x17, x17, x183288; CHECK-GI-NEXT: cset w16, hs3289; CHECK-GI-NEXT: adds x10, x10, x153290; CHECK-GI-NEXT: umulh x15, x2, xzr3291; CHECK-GI-NEXT: and x16, x16, #0x13292; CHECK-GI-NEXT: cset w18, hs3293; CHECK-GI-NEXT: adds x10, x10, x143294; CHECK-GI-NEXT: add x16, x17, x163295; CHECK-GI-NEXT: and x17, x18, #0x13296; CHECK-GI-NEXT: cset w14, hs3297; CHECK-GI-NEXT: add x13, x16, x173298; CHECK-GI-NEXT: and x14, x14, #0x13299; CHECK-GI-NEXT: add x8, x9, x83300; CHECK-GI-NEXT: subs x9, x0, x113301; CHECK-GI-NEXT: add x13, x13, x143302; CHECK-GI-NEXT: add x8, x8, x153303; CHECK-GI-NEXT: sbc x14, x1, x123304; CHECK-GI-NEXT: add x8, x8, x133305; CHECK-GI-NEXT: subs x13, x2, x103306; CHECK-GI-NEXT: extr x9, x14, x9, #13307; CHECK-GI-NEXT: sbc x15, x3, x83308; CHECK-GI-NEXT: lsr x14, x14, #13309; CHECK-GI-NEXT: extr x13, x15, x13, #13310; CHECK-GI-NEXT: adds x9, x9, x113311; CHECK-GI-NEXT: lsr x11, x15, #13312; CHECK-GI-NEXT: adc x12, x14, x123313; CHECK-GI-NEXT: adds x10, x13, x103314; CHECK-GI-NEXT: extr x9, x12, x9, #23315; CHECK-GI-NEXT: mov w13, #7 // =0x73316; CHECK-GI-NEXT: adc x8, x11, x83317; CHECK-GI-NEXT: lsr x11, x12, #23318; CHECK-GI-NEXT: extr x10, x8, x10, #23319; CHECK-GI-NEXT: umulh x12, x9, x133320; CHECK-GI-NEXT: lsr x8, x8, #23321; CHECK-GI-NEXT: lsl x14, x11, #33322; CHECK-GI-NEXT: lsl x15, x9, #33323; CHECK-GI-NEXT: umulh x13, x10, x133324; CHECK-GI-NEXT: lsl x16, x8, #33325; CHECK-GI-NEXT: sub x11, x14, x113326; CHECK-GI-NEXT: lsl x14, x10, #33327; CHECK-GI-NEXT: sub x9, x15, x93328; CHECK-GI-NEXT: sub x8, x16, x83329; CHECK-GI-NEXT: subs x0, x0, x93330; CHECK-GI-NEXT: add x11, x11, x123331; CHECK-GI-NEXT: sub x10, x14, x103332; CHECK-GI-NEXT: sbc x1, x1, x113333; CHECK-GI-NEXT: subs x2, x2, x103334; CHECK-GI-NEXT: add x8, x8, x133335; CHECK-GI-NEXT: sbc x3, x3, x83336; CHECK-GI-NEXT: ret3337entry:3338 %s = urem <2 x i128> %d, <i128 7, i128 7>3339 ret <2 x i128> %s3340}3341 3342define <2 x i128> @uv2i128_100(<2 x i128> %d, <2 x i128> %e) {3343; CHECK-SD-LABEL: uv2i128_100:3344; CHECK-SD: // %bb.0: // %entry3345; CHECK-SD-NEXT: str x30, [sp, #-48]! // 8-byte Folded Spill3346; CHECK-SD-NEXT: stp x22, x21, [sp, #16] // 16-byte Folded Spill3347; CHECK-SD-NEXT: stp x20, x19, [sp, #32] // 16-byte Folded Spill3348; CHECK-SD-NEXT: .cfi_def_cfa_offset 483349; CHECK-SD-NEXT: .cfi_offset w19, -83350; CHECK-SD-NEXT: .cfi_offset w20, -163351; CHECK-SD-NEXT: .cfi_offset w21, -243352; CHECK-SD-NEXT: .cfi_offset w22, -323353; CHECK-SD-NEXT: .cfi_offset w30, -483354; CHECK-SD-NEXT: mov x19, x33355; CHECK-SD-NEXT: mov x20, x23356; CHECK-SD-NEXT: mov w2, #100 // =0x643357; CHECK-SD-NEXT: mov x3, xzr3358; CHECK-SD-NEXT: bl __umodti33359; CHECK-SD-NEXT: mov x21, x03360; CHECK-SD-NEXT: mov x22, x13361; CHECK-SD-NEXT: mov x0, x203362; CHECK-SD-NEXT: mov x1, x193363; CHECK-SD-NEXT: mov w2, #100 // =0x643364; CHECK-SD-NEXT: mov x3, xzr3365; CHECK-SD-NEXT: bl __umodti33366; CHECK-SD-NEXT: mov x2, x03367; CHECK-SD-NEXT: mov x3, x13368; CHECK-SD-NEXT: mov x0, x213369; CHECK-SD-NEXT: mov x1, x223370; CHECK-SD-NEXT: ldp x20, x19, [sp, #32] // 16-byte Folded Reload3371; CHECK-SD-NEXT: ldp x22, x21, [sp, #16] // 16-byte Folded Reload3372; CHECK-SD-NEXT: ldr x30, [sp], #48 // 8-byte Folded Reload3373; CHECK-SD-NEXT: ret3374;3375; CHECK-GI-LABEL: uv2i128_100:3376; CHECK-GI: // %bb.0: // %entry3377; CHECK-GI-NEXT: mov x10, #23593 // =0x5c293378; CHECK-GI-NEXT: mov x8, #62914 // =0xf5c23379; CHECK-GI-NEXT: and x5, xzr, #0x13380; CHECK-GI-NEXT: movk x10, #49807, lsl #163381; CHECK-GI-NEXT: movk x8, #23592, lsl #163382; CHECK-GI-NEXT: umulh x18, x0, xzr3383; CHECK-GI-NEXT: movk x10, #10485, lsl #323384; CHECK-GI-NEXT: movk x8, #49807, lsl #323385; CHECK-GI-NEXT: movk x10, #36700, lsl #483386; CHECK-GI-NEXT: movk x8, #10485, lsl #483387; CHECK-GI-NEXT: mul x11, x1, x103388; CHECK-GI-NEXT: mul x12, x0, x83389; CHECK-GI-NEXT: umulh x13, x0, x103390; CHECK-GI-NEXT: mul x14, x1, x83391; CHECK-GI-NEXT: adds x11, x11, x123392; CHECK-GI-NEXT: umulh x15, x1, x103393; CHECK-GI-NEXT: cset w12, hs3394; CHECK-GI-NEXT: cmn x11, x133395; CHECK-GI-NEXT: sub x13, x0, x03396; CHECK-GI-NEXT: and x12, x12, #0x13397; CHECK-GI-NEXT: umulh x16, x0, x83398; CHECK-GI-NEXT: cset w11, hs3399; CHECK-GI-NEXT: add x13, x14, x133400; CHECK-GI-NEXT: and x11, x11, #0x13401; CHECK-GI-NEXT: and x14, xzr, #0x13402; CHECK-GI-NEXT: umulh x9, xzr, x103403; CHECK-GI-NEXT: add x11, x12, x113404; CHECK-GI-NEXT: add x12, x5, x143405; CHECK-GI-NEXT: adds x13, x13, x153406; CHECK-GI-NEXT: umulh x17, x1, x83407; CHECK-GI-NEXT: cset w14, hs3408; CHECK-GI-NEXT: and x14, x14, #0x13409; CHECK-GI-NEXT: adds x13, x13, x163410; CHECK-GI-NEXT: mul x4, x3, x103411; CHECK-GI-NEXT: add x12, x12, x143412; CHECK-GI-NEXT: cset w14, hs3413; CHECK-GI-NEXT: adds x11, x13, x113414; CHECK-GI-NEXT: and x13, x14, #0x13415; CHECK-GI-NEXT: mul x15, x2, x83416; CHECK-GI-NEXT: cset w14, hs3417; CHECK-GI-NEXT: add x12, x12, x133418; CHECK-GI-NEXT: and x13, x14, #0x13419; CHECK-GI-NEXT: add x14, x9, x173420; CHECK-GI-NEXT: sub x17, x2, x23421; CHECK-GI-NEXT: umulh x16, x2, x103422; CHECK-GI-NEXT: add x12, x12, x133423; CHECK-GI-NEXT: add x13, x14, x183424; CHECK-GI-NEXT: add x12, x13, x123425; CHECK-GI-NEXT: and x18, xzr, #0x13426; CHECK-GI-NEXT: mul x5, x3, x83427; CHECK-GI-NEXT: extr x11, x12, x11, #43428; CHECK-GI-NEXT: adds x13, x4, x153429; CHECK-GI-NEXT: umulh x14, x3, x103430; CHECK-GI-NEXT: cset w15, hs3431; CHECK-GI-NEXT: mov w10, #100 // =0x643432; CHECK-GI-NEXT: cmn x13, x163433; CHECK-GI-NEXT: and x15, x15, #0x13434; CHECK-GI-NEXT: umulh x13, x2, x83435; CHECK-GI-NEXT: cset w16, hs3436; CHECK-GI-NEXT: add x17, x5, x173437; CHECK-GI-NEXT: and x16, x16, #0x13438; CHECK-GI-NEXT: umulh x8, x3, x83439; CHECK-GI-NEXT: add x15, x15, x163440; CHECK-GI-NEXT: adds x14, x17, x143441; CHECK-GI-NEXT: and x17, xzr, #0x13442; CHECK-GI-NEXT: add x16, x18, x173443; CHECK-GI-NEXT: cset w17, hs3444; CHECK-GI-NEXT: adds x13, x14, x133445; CHECK-GI-NEXT: umulh x14, x2, xzr3446; CHECK-GI-NEXT: and x17, x17, #0x13447; CHECK-GI-NEXT: cset w18, hs3448; CHECK-GI-NEXT: adds x13, x13, x153449; CHECK-GI-NEXT: add x15, x16, x173450; CHECK-GI-NEXT: and x16, x18, #0x13451; CHECK-GI-NEXT: cset w17, hs3452; CHECK-GI-NEXT: add x8, x9, x83453; CHECK-GI-NEXT: add x15, x15, x163454; CHECK-GI-NEXT: and x16, x17, #0x13455; CHECK-GI-NEXT: lsr x9, x12, #43456; CHECK-GI-NEXT: add x15, x15, x163457; CHECK-GI-NEXT: umulh x17, x11, x103458; CHECK-GI-NEXT: add x8, x8, x143459; CHECK-GI-NEXT: add x8, x8, x153460; CHECK-GI-NEXT: mul x11, x11, x103461; CHECK-GI-NEXT: extr x12, x8, x13, #43462; CHECK-GI-NEXT: lsr x8, x8, #43463; CHECK-GI-NEXT: madd x9, x9, x10, x173464; CHECK-GI-NEXT: umulh x13, x12, x103465; CHECK-GI-NEXT: subs x0, x0, x113466; CHECK-GI-NEXT: mul x12, x12, x103467; CHECK-GI-NEXT: sbc x1, x1, x93468; CHECK-GI-NEXT: madd x8, x8, x10, x133469; CHECK-GI-NEXT: subs x2, x2, x123470; CHECK-GI-NEXT: sbc x3, x3, x83471; CHECK-GI-NEXT: ret3472entry:3473 %s = urem <2 x i128> %d, <i128 100, i128 100>3474 ret <2 x i128> %s3475}3476