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1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py2; RUN: llc < %s -mtriple=aarch64 | FileCheck %s --check-prefixes=CHECK,CHECK-CVT3; RUN: llc < %s -mtriple=aarch64 -mattr=+fullfp16 | FileCheck %s --check-prefixes=CHECK,CHECK-FP164 5; Round towards minus infinity (fcvtms).6 7define i32 @testmswbf(bfloat %a) {8; CHECK-LABEL: testmswbf:9; CHECK: // %bb.0: // %entry10; CHECK-NEXT: // kill: def $h0 killed $h0 def $d011; CHECK-NEXT: mov w8, #32767 // =0x7fff12; CHECK-NEXT: shll v0.4s, v0.4h, #1613; CHECK-NEXT: frintm s0, s014; CHECK-NEXT: fmov w9, s015; CHECK-NEXT: ubfx w10, w9, #16, #116; CHECK-NEXT: add w8, w9, w817; CHECK-NEXT: add w8, w10, w818; CHECK-NEXT: lsr w8, w8, #1619; CHECK-NEXT: fmov s0, w820; CHECK-NEXT: shll v0.4s, v0.4h, #1621; CHECK-NEXT: fcvtzs w0, s022; CHECK-NEXT: ret23entry:24 %r = call bfloat @llvm.floor.bf16(bfloat %a) nounwind readnone25 %i = call i32 @llvm.fptosi.sat.i32.bf16(bfloat %r)26 ret i32 %i27}28 29define i64 @testmsxbf(bfloat %a) {30; CHECK-LABEL: testmsxbf:31; CHECK: // %bb.0: // %entry32; CHECK-NEXT: // kill: def $h0 killed $h0 def $d033; CHECK-NEXT: mov w8, #32767 // =0x7fff34; CHECK-NEXT: shll v0.4s, v0.4h, #1635; CHECK-NEXT: frintm s0, s036; CHECK-NEXT: fmov w9, s037; CHECK-NEXT: ubfx w10, w9, #16, #138; CHECK-NEXT: add w8, w9, w839; CHECK-NEXT: add w8, w10, w840; CHECK-NEXT: lsr w8, w8, #1641; CHECK-NEXT: fmov s0, w842; CHECK-NEXT: shll v0.4s, v0.4h, #1643; CHECK-NEXT: fcvtzs x0, s044; CHECK-NEXT: ret45entry:46 %r = call bfloat @llvm.floor.bf16(bfloat %a) nounwind readnone47 %i = call i64 @llvm.fptosi.sat.i64.bf16(bfloat %r)48 ret i64 %i49}50 51define i32 @testmswh(half %a) {52; CHECK-CVT-LABEL: testmswh:53; CHECK-CVT: // %bb.0: // %entry54; CHECK-CVT-NEXT: fcvt s0, h055; CHECK-CVT-NEXT: frintm s0, s056; CHECK-CVT-NEXT: fcvt h0, s057; CHECK-CVT-NEXT: fcvt s0, h058; CHECK-CVT-NEXT: fcvtzs w0, s059; CHECK-CVT-NEXT: ret60;61; CHECK-FP16-LABEL: testmswh:62; CHECK-FP16: // %bb.0: // %entry63; CHECK-FP16-NEXT: fcvtms w0, h064; CHECK-FP16-NEXT: ret65entry:66 %r = call half @llvm.floor.f16(half %a) nounwind readnone67 %i = call i32 @llvm.fptosi.sat.i32.f16(half %r)68 ret i32 %i69}70 71define i64 @testmsxh(half %a) {72; CHECK-CVT-LABEL: testmsxh:73; CHECK-CVT: // %bb.0: // %entry74; CHECK-CVT-NEXT: fcvt s0, h075; CHECK-CVT-NEXT: frintm s0, s076; CHECK-CVT-NEXT: fcvt h0, s077; CHECK-CVT-NEXT: fcvt s0, h078; CHECK-CVT-NEXT: fcvtzs x0, s079; CHECK-CVT-NEXT: ret80;81; CHECK-FP16-LABEL: testmsxh:82; CHECK-FP16: // %bb.0: // %entry83; CHECK-FP16-NEXT: fcvtms x0, h084; CHECK-FP16-NEXT: ret85entry:86 %r = call half @llvm.floor.f16(half %a) nounwind readnone87 %i = call i64 @llvm.fptosi.sat.i64.f16(half %r)88 ret i64 %i89}90 91define i32 @testmsws(float %a) {92; CHECK-LABEL: testmsws:93; CHECK: // %bb.0: // %entry94; CHECK-NEXT: fcvtms w0, s095; CHECK-NEXT: ret96entry:97 %r = call float @floorf(float %a) nounwind readnone98 %i = call i32 @llvm.fptosi.sat.i32.f32(float %r)99 ret i32 %i100}101 102define i64 @testmsxs(float %a) {103; CHECK-LABEL: testmsxs:104; CHECK: // %bb.0: // %entry105; CHECK-NEXT: fcvtms x0, s0106; CHECK-NEXT: ret107entry:108 %r = call float @floorf(float %a) nounwind readnone109 %i = call i64 @llvm.fptosi.sat.i64.f32(float %r)110 ret i64 %i111}112 113define i32 @testmswd(double %a) {114; CHECK-LABEL: testmswd:115; CHECK: // %bb.0: // %entry116; CHECK-NEXT: fcvtms w0, d0117; CHECK-NEXT: ret118entry:119 %r = call double @floor(double %a) nounwind readnone120 %i = call i32 @llvm.fptosi.sat.i32.f64(double %r)121 ret i32 %i122}123 124define i64 @testmsxd(double %a) {125; CHECK-LABEL: testmsxd:126; CHECK: // %bb.0: // %entry127; CHECK-NEXT: fcvtms x0, d0128; CHECK-NEXT: ret129entry:130 %r = call double @floor(double %a) nounwind readnone131 %i = call i64 @llvm.fptosi.sat.i64.f64(double %r)132 ret i64 %i133}134 135; Round towards plus infinity (fcvtps).136 137define i32 @testpswbf(bfloat %a) {138; CHECK-LABEL: testpswbf:139; CHECK: // %bb.0: // %entry140; CHECK-NEXT: // kill: def $h0 killed $h0 def $d0141; CHECK-NEXT: mov w8, #32767 // =0x7fff142; CHECK-NEXT: shll v0.4s, v0.4h, #16143; CHECK-NEXT: frintp s0, s0144; CHECK-NEXT: fmov w9, s0145; CHECK-NEXT: ubfx w10, w9, #16, #1146; CHECK-NEXT: add w8, w9, w8147; CHECK-NEXT: add w8, w10, w8148; CHECK-NEXT: lsr w8, w8, #16149; CHECK-NEXT: fmov s0, w8150; CHECK-NEXT: shll v0.4s, v0.4h, #16151; CHECK-NEXT: fcvtzs w0, s0152; CHECK-NEXT: ret153entry:154 %r = call bfloat @llvm.ceil.bf16(bfloat %a) nounwind readnone155 %i = call i32 @llvm.fptosi.sat.i32.bf16(bfloat %r)156 ret i32 %i157}158 159define i64 @testpsxbf(bfloat %a) {160; CHECK-LABEL: testpsxbf:161; CHECK: // %bb.0: // %entry162; CHECK-NEXT: // kill: def $h0 killed $h0 def $d0163; CHECK-NEXT: mov w8, #32767 // =0x7fff164; CHECK-NEXT: shll v0.4s, v0.4h, #16165; CHECK-NEXT: frintp s0, s0166; CHECK-NEXT: fmov w9, s0167; CHECK-NEXT: ubfx w10, w9, #16, #1168; CHECK-NEXT: add w8, w9, w8169; CHECK-NEXT: add w8, w10, w8170; CHECK-NEXT: lsr w8, w8, #16171; CHECK-NEXT: fmov s0, w8172; CHECK-NEXT: shll v0.4s, v0.4h, #16173; CHECK-NEXT: fcvtzs x0, s0174; CHECK-NEXT: ret175entry:176 %r = call bfloat @llvm.ceil.bf16(bfloat %a) nounwind readnone177 %i = call i64 @llvm.fptosi.sat.i64.bf16(bfloat %r)178 ret i64 %i179}180 181define i32 @testpswh(half %a) {182; CHECK-CVT-LABEL: testpswh:183; CHECK-CVT: // %bb.0: // %entry184; CHECK-CVT-NEXT: fcvt s0, h0185; CHECK-CVT-NEXT: frintp s0, s0186; CHECK-CVT-NEXT: fcvt h0, s0187; CHECK-CVT-NEXT: fcvt s0, h0188; CHECK-CVT-NEXT: fcvtzs w0, s0189; CHECK-CVT-NEXT: ret190;191; CHECK-FP16-LABEL: testpswh:192; CHECK-FP16: // %bb.0: // %entry193; CHECK-FP16-NEXT: fcvtps w0, h0194; CHECK-FP16-NEXT: ret195entry:196 %r = call half @llvm.ceil.f16(half %a) nounwind readnone197 %i = call i32 @llvm.fptosi.sat.i32.f16(half %r)198 ret i32 %i199}200 201define i64 @testpsxh(half %a) {202; CHECK-CVT-LABEL: testpsxh:203; CHECK-CVT: // %bb.0: // %entry204; CHECK-CVT-NEXT: fcvt s0, h0205; CHECK-CVT-NEXT: frintp s0, s0206; CHECK-CVT-NEXT: fcvt h0, s0207; CHECK-CVT-NEXT: fcvt s0, h0208; CHECK-CVT-NEXT: fcvtzs x0, s0209; CHECK-CVT-NEXT: ret210;211; CHECK-FP16-LABEL: testpsxh:212; CHECK-FP16: // %bb.0: // %entry213; CHECK-FP16-NEXT: fcvtps x0, h0214; CHECK-FP16-NEXT: ret215entry:216 %r = call half @llvm.ceil.f16(half %a) nounwind readnone217 %i = call i64 @llvm.fptosi.sat.i64.f16(half %r)218 ret i64 %i219}220 221define i32 @testpsws(float %a) {222; CHECK-LABEL: testpsws:223; CHECK: // %bb.0: // %entry224; CHECK-NEXT: fcvtps w0, s0225; CHECK-NEXT: ret226entry:227 %r = call float @ceilf(float %a) nounwind readnone228 %i = call i32 @llvm.fptosi.sat.i32.f32(float %r)229 ret i32 %i230}231 232define i64 @testpsxs(float %a) {233; CHECK-LABEL: testpsxs:234; CHECK: // %bb.0: // %entry235; CHECK-NEXT: fcvtps x0, s0236; CHECK-NEXT: ret237entry:238 %r = call float @ceilf(float %a) nounwind readnone239 %i = call i64 @llvm.fptosi.sat.i64.f32(float %r)240 ret i64 %i241}242 243define i32 @testpswd(double %a) {244; CHECK-LABEL: testpswd:245; CHECK: // %bb.0: // %entry246; CHECK-NEXT: fcvtps w0, d0247; CHECK-NEXT: ret248entry:249 %r = call double @ceil(double %a) nounwind readnone250 %i = call i32 @llvm.fptosi.sat.i32.f64(double %r)251 ret i32 %i252}253 254define i64 @testpsxd(double %a) {255; CHECK-LABEL: testpsxd:256; CHECK: // %bb.0: // %entry257; CHECK-NEXT: fcvtps x0, d0258; CHECK-NEXT: ret259entry:260 %r = call double @ceil(double %a) nounwind readnone261 %i = call i64 @llvm.fptosi.sat.i64.f64(double %r)262 ret i64 %i263}264 265; Round towards zero (fcvtzs).266 267define i32 @testzswh(half %a) {268; CHECK-CVT-LABEL: testzswh:269; CHECK-CVT: // %bb.0: // %entry270; CHECK-CVT-NEXT: fcvt s0, h0271; CHECK-CVT-NEXT: frintz s0, s0272; CHECK-CVT-NEXT: fcvt h0, s0273; CHECK-CVT-NEXT: fcvt s0, h0274; CHECK-CVT-NEXT: fcvtzs w0, s0275; CHECK-CVT-NEXT: ret276;277; CHECK-FP16-LABEL: testzswh:278; CHECK-FP16: // %bb.0: // %entry279; CHECK-FP16-NEXT: fcvtzs w0, h0280; CHECK-FP16-NEXT: ret281entry:282 %r = call half @llvm.trunc.f16(half %a) nounwind readnone283 %i = call i32 @llvm.fptosi.sat.i32.f16(half %r)284 ret i32 %i285}286 287define i64 @testzsxh(half %a) {288; CHECK-CVT-LABEL: testzsxh:289; CHECK-CVT: // %bb.0: // %entry290; CHECK-CVT-NEXT: fcvt s0, h0291; CHECK-CVT-NEXT: frintz s0, s0292; CHECK-CVT-NEXT: fcvt h0, s0293; CHECK-CVT-NEXT: fcvt s0, h0294; CHECK-CVT-NEXT: fcvtzs x0, s0295; CHECK-CVT-NEXT: ret296;297; CHECK-FP16-LABEL: testzsxh:298; CHECK-FP16: // %bb.0: // %entry299; CHECK-FP16-NEXT: fcvtzs x0, h0300; CHECK-FP16-NEXT: ret301entry:302 %r = call half @llvm.trunc.f16(half %a) nounwind readnone303 %i = call i64 @llvm.fptosi.sat.i64.f16(half %r)304 ret i64 %i305}306 307define i32 @testzsws(float %a) {308; CHECK-LABEL: testzsws:309; CHECK: // %bb.0: // %entry310; CHECK-NEXT: fcvtzs w0, s0311; CHECK-NEXT: ret312entry:313 %r = call float @truncf(float %a) nounwind readnone314 %i = call i32 @llvm.fptosi.sat.i32.f32(float %r)315 ret i32 %i316}317 318define i64 @testzsxs(float %a) {319; CHECK-LABEL: testzsxs:320; CHECK: // %bb.0: // %entry321; CHECK-NEXT: fcvtzs x0, s0322; CHECK-NEXT: ret323entry:324 %r = call float @truncf(float %a) nounwind readnone325 %i = call i64 @llvm.fptosi.sat.i64.f32(float %r)326 ret i64 %i327}328 329define i32 @testzswd(double %a) {330; CHECK-LABEL: testzswd:331; CHECK: // %bb.0: // %entry332; CHECK-NEXT: fcvtzs w0, d0333; CHECK-NEXT: ret334entry:335 %r = call double @trunc(double %a) nounwind readnone336 %i = call i32 @llvm.fptosi.sat.i32.f64(double %r)337 ret i32 %i338}339 340define i64 @testzsxd(double %a) {341; CHECK-LABEL: testzsxd:342; CHECK: // %bb.0: // %entry343; CHECK-NEXT: fcvtzs x0, d0344; CHECK-NEXT: ret345entry:346 %r = call double @trunc(double %a) nounwind readnone347 %i = call i64 @llvm.fptosi.sat.i64.f64(double %r)348 ret i64 %i349}350 351; Round to nearest, ties away from zero (fcvtas).352 353define i32 @testaswh(half %a) {354; CHECK-CVT-LABEL: testaswh:355; CHECK-CVT: // %bb.0: // %entry356; CHECK-CVT-NEXT: fcvt s0, h0357; CHECK-CVT-NEXT: frinta s0, s0358; CHECK-CVT-NEXT: fcvt h0, s0359; CHECK-CVT-NEXT: fcvt s0, h0360; CHECK-CVT-NEXT: fcvtzs w0, s0361; CHECK-CVT-NEXT: ret362;363; CHECK-FP16-LABEL: testaswh:364; CHECK-FP16: // %bb.0: // %entry365; CHECK-FP16-NEXT: fcvtas w0, h0366; CHECK-FP16-NEXT: ret367entry:368 %r = call half @llvm.round.f16(half %a) nounwind readnone369 %i = call i32 @llvm.fptosi.sat.i32.f16(half %r)370 ret i32 %i371}372 373define i64 @testasxh(half %a) {374; CHECK-CVT-LABEL: testasxh:375; CHECK-CVT: // %bb.0: // %entry376; CHECK-CVT-NEXT: fcvt s0, h0377; CHECK-CVT-NEXT: frinta s0, s0378; CHECK-CVT-NEXT: fcvt h0, s0379; CHECK-CVT-NEXT: fcvt s0, h0380; CHECK-CVT-NEXT: fcvtzs x0, s0381; CHECK-CVT-NEXT: ret382;383; CHECK-FP16-LABEL: testasxh:384; CHECK-FP16: // %bb.0: // %entry385; CHECK-FP16-NEXT: fcvtas x0, h0386; CHECK-FP16-NEXT: ret387entry:388 %r = call half @llvm.round.f16(half %a) nounwind readnone389 %i = call i64 @llvm.fptosi.sat.i64.f16(half %r)390 ret i64 %i391}392 393define i32 @testasws(float %a) {394; CHECK-LABEL: testasws:395; CHECK: // %bb.0: // %entry396; CHECK-NEXT: fcvtas w0, s0397; CHECK-NEXT: ret398entry:399 %r = call float @roundf(float %a) nounwind readnone400 %i = call i32 @llvm.fptosi.sat.i32.f32(float %r)401 ret i32 %i402}403 404define i64 @testasxs(float %a) {405; CHECK-LABEL: testasxs:406; CHECK: // %bb.0: // %entry407; CHECK-NEXT: fcvtas x0, s0408; CHECK-NEXT: ret409entry:410 %r = call float @roundf(float %a) nounwind readnone411 %i = call i64 @llvm.fptosi.sat.i64.f32(float %r)412 ret i64 %i413}414 415define i32 @testaswd(double %a) {416; CHECK-LABEL: testaswd:417; CHECK: // %bb.0: // %entry418; CHECK-NEXT: fcvtas w0, d0419; CHECK-NEXT: ret420entry:421 %r = call double @round(double %a) nounwind readnone422 %i = call i32 @llvm.fptosi.sat.i32.f64(double %r)423 ret i32 %i424}425 426define i64 @testasxd(double %a) {427; CHECK-LABEL: testasxd:428; CHECK: // %bb.0: // %entry429; CHECK-NEXT: fcvtas x0, d0430; CHECK-NEXT: ret431entry:432 %r = call double @round(double %a) nounwind readnone433 %i = call i64 @llvm.fptosi.sat.i64.f64(double %r)434 ret i64 %i435}436 437declare i32 @llvm.fptosi.sat.i32.bf16 (bfloat)438declare i64 @llvm.fptosi.sat.i64.bf16 (bfloat)439declare i32 @llvm.fptosi.sat.i32.f16 (half)440declare i64 @llvm.fptosi.sat.i64.f16 (half)441declare i32 @llvm.fptosi.sat.i32.f32 (float)442declare i64 @llvm.fptosi.sat.i64.f32 (float)443declare i32 @llvm.fptosi.sat.i32.f64 (double)444declare i64 @llvm.fptosi.sat.i64.f64 (double)445 446declare bfloat @llvm.floor.bf16(bfloat) nounwind readnone447declare bfloat @llvm.ceil.bf16(bfloat) nounwind readnone448declare bfloat @llvm.trunc.bf16(bfloat) nounwind readnone449declare bfloat @llvm.round.bf16(bfloat) nounwind readnone450declare half @llvm.floor.f16(half) nounwind readnone451declare half @llvm.ceil.f16(half) nounwind readnone452declare half @llvm.trunc.f16(half) nounwind readnone453declare half @llvm.round.f16(half) nounwind readnone454declare float @floorf(float) nounwind readnone455declare float @ceilf(float) nounwind readnone456declare float @truncf(float) nounwind readnone457declare float @roundf(float) nounwind readnone458declare double @floor(double) nounwind readnone459declare double @ceil(double) nounwind readnone460declare double @trunc(double) nounwind readnone461declare double @round(double) nounwind readnone462