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1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py2; RUN: llc < %s -mtriple=aarch64-- | FileCheck %s --check-prefixes=CHECK,CHECK-SD3; RUN: llc < %s -mtriple=aarch64-- -global-isel | FileCheck %s --check-prefixes=CHECK,CHECK-GI4 5declare i4 @llvm.sadd.sat.i4(i4, i4)6declare i8 @llvm.sadd.sat.i8(i8, i8)7declare i16 @llvm.sadd.sat.i16(i16, i16)8declare i32 @llvm.sadd.sat.i32(i32, i32)9declare i64 @llvm.sadd.sat.i64(i64, i64)10 11define i32 @func32(i32 %x, i32 %y, i32 %z) nounwind {12; CHECK-SD-LABEL: func32:13; CHECK-SD: // %bb.0:14; CHECK-SD-NEXT: mul w8, w1, w215; CHECK-SD-NEXT: adds w8, w0, w816; CHECK-SD-NEXT: asr w9, w8, #3117; CHECK-SD-NEXT: eor w9, w9, #0x8000000018; CHECK-SD-NEXT: csel w0, w9, w8, vs19; CHECK-SD-NEXT: ret20;21; CHECK-GI-LABEL: func32:22; CHECK-GI: // %bb.0:23; CHECK-GI-NEXT: mul w8, w1, w224; CHECK-GI-NEXT: mov w9, #-2147483648 // =0x8000000025; CHECK-GI-NEXT: adds w8, w0, w826; CHECK-GI-NEXT: cset w10, vs27; CHECK-GI-NEXT: add w9, w9, w8, asr #3128; CHECK-GI-NEXT: tst w10, #0x129; CHECK-GI-NEXT: csel w0, w9, w8, ne30; CHECK-GI-NEXT: ret31 %a = mul i32 %y, %z32 %tmp = call i32 @llvm.sadd.sat.i32(i32 %x, i32 %a)33 ret i32 %tmp34}35 36define i64 @func64(i64 %x, i64 %y, i64 %z) nounwind {37; CHECK-SD-LABEL: func64:38; CHECK-SD: // %bb.0:39; CHECK-SD-NEXT: adds x8, x0, x240; CHECK-SD-NEXT: asr x9, x8, #6341; CHECK-SD-NEXT: eor x9, x9, #0x800000000000000042; CHECK-SD-NEXT: csel x0, x9, x8, vs43; CHECK-SD-NEXT: ret44;45; CHECK-GI-LABEL: func64:46; CHECK-GI: // %bb.0:47; CHECK-GI-NEXT: mov x8, #-9223372036854775808 // =0x800000000000000048; CHECK-GI-NEXT: adds x9, x0, x249; CHECK-GI-NEXT: cset w10, vs50; CHECK-GI-NEXT: add x8, x8, x9, asr #6351; CHECK-GI-NEXT: tst w10, #0x152; CHECK-GI-NEXT: csel x0, x8, x9, ne53; CHECK-GI-NEXT: ret54 %a = mul i64 %y, %z55 %tmp = call i64 @llvm.sadd.sat.i64(i64 %x, i64 %z)56 ret i64 %tmp57}58 59define i16 @func16(i16 %x, i16 %y, i16 %z) nounwind {60; CHECK-SD-LABEL: func16:61; CHECK-SD: // %bb.0:62; CHECK-SD-NEXT: mul w8, w1, w263; CHECK-SD-NEXT: sxth w9, w064; CHECK-SD-NEXT: add w8, w9, w8, sxth65; CHECK-SD-NEXT: mov w9, #32767 // =0x7fff66; CHECK-SD-NEXT: cmp w8, w967; CHECK-SD-NEXT: csel w8, w8, w9, lt68; CHECK-SD-NEXT: mov w9, #-32768 // =0xffff800069; CHECK-SD-NEXT: cmn w8, #8, lsl #12 // =3276870; CHECK-SD-NEXT: csel w0, w8, w9, gt71; CHECK-SD-NEXT: ret72;73; CHECK-GI-LABEL: func16:74; CHECK-GI: // %bb.0:75; CHECK-GI-NEXT: mul w8, w1, w276; CHECK-GI-NEXT: sxth w8, w877; CHECK-GI-NEXT: add w8, w8, w0, sxth78; CHECK-GI-NEXT: sxth w9, w879; CHECK-GI-NEXT: sbfx w10, w8, #15, #180; CHECK-GI-NEXT: sub w10, w10, #8, lsl #12 // =3276881; CHECK-GI-NEXT: cmp w8, w982; CHECK-GI-NEXT: csel w0, w10, w8, ne83; CHECK-GI-NEXT: ret84 %a = mul i16 %y, %z85 %tmp = call i16 @llvm.sadd.sat.i16(i16 %x, i16 %a)86 ret i16 %tmp87}88 89define i8 @func8(i8 %x, i8 %y, i8 %z) nounwind {90; CHECK-SD-LABEL: func8:91; CHECK-SD: // %bb.0:92; CHECK-SD-NEXT: mul w8, w1, w293; CHECK-SD-NEXT: sxtb w9, w094; CHECK-SD-NEXT: add w8, w9, w8, sxtb95; CHECK-SD-NEXT: mov w9, #127 // =0x7f96; CHECK-SD-NEXT: cmp w8, #12797; CHECK-SD-NEXT: csel w8, w8, w9, lt98; CHECK-SD-NEXT: mov w9, #-128 // =0xffffff8099; CHECK-SD-NEXT: cmn w8, #128100; CHECK-SD-NEXT: csel w0, w8, w9, gt101; CHECK-SD-NEXT: ret102;103; CHECK-GI-LABEL: func8:104; CHECK-GI: // %bb.0:105; CHECK-GI-NEXT: mul w8, w1, w2106; CHECK-GI-NEXT: sxtb w8, w8107; CHECK-GI-NEXT: add w8, w8, w0, sxtb108; CHECK-GI-NEXT: sxtb w9, w8109; CHECK-GI-NEXT: sbfx w10, w8, #7, #1110; CHECK-GI-NEXT: sub w10, w10, #128111; CHECK-GI-NEXT: cmp w8, w9112; CHECK-GI-NEXT: csel w0, w10, w8, ne113; CHECK-GI-NEXT: ret114 %a = mul i8 %y, %z115 %tmp = call i8 @llvm.sadd.sat.i8(i8 %x, i8 %a)116 ret i8 %tmp117}118 119define i4 @func4(i4 %x, i4 %y, i4 %z) nounwind {120; CHECK-SD-LABEL: func4:121; CHECK-SD: // %bb.0:122; CHECK-SD-NEXT: mul w8, w1, w2123; CHECK-SD-NEXT: sbfx w9, w0, #0, #4124; CHECK-SD-NEXT: lsl w8, w8, #28125; CHECK-SD-NEXT: add w8, w9, w8, asr #28126; CHECK-SD-NEXT: mov w9, #7 // =0x7127; CHECK-SD-NEXT: cmp w8, #7128; CHECK-SD-NEXT: csel w8, w8, w9, lt129; CHECK-SD-NEXT: mov w9, #-8 // =0xfffffff8130; CHECK-SD-NEXT: cmn w8, #8131; CHECK-SD-NEXT: csel w0, w8, w9, gt132; CHECK-SD-NEXT: ret133;134; CHECK-GI-LABEL: func4:135; CHECK-GI: // %bb.0:136; CHECK-GI-NEXT: mul w8, w1, w2137; CHECK-GI-NEXT: sbfx w9, w0, #0, #4138; CHECK-GI-NEXT: sbfx w8, w8, #0, #4139; CHECK-GI-NEXT: add w8, w9, w8140; CHECK-GI-NEXT: sbfx w9, w8, #0, #4141; CHECK-GI-NEXT: asr w10, w9, #3142; CHECK-GI-NEXT: cmp w8, w9143; CHECK-GI-NEXT: add w10, w10, #8144; CHECK-GI-NEXT: csel w0, w10, w8, ne145; CHECK-GI-NEXT: ret146 %a = mul i4 %y, %z147 %tmp = call i4 @llvm.sadd.sat.i4(i4 %x, i4 %a)148 ret i4 %tmp149}150;; NOTE: These prefixes are unused and the list is autogenerated. Do not add tests below this line:151; CHECK: {{.*}}152