661 lines · plain
1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py2; RUN: llc < %s -mtriple=aarch64-- | FileCheck %s3 4; There are at least 3 potential patterns corresponding to an unsigned saturated add: min, cmp with sum, cmp with not.5; Test each of those patterns with i8/i16/i32/i64.6; Test each of those with a constant operand and a variable operand.7; Test each of those with a 128-bit vector type.8 9define i8 @unsigned_sat_constant_i8_using_min(i8 %x) {10; CHECK-LABEL: unsigned_sat_constant_i8_using_min:11; CHECK: // %bb.0:12; CHECK-NEXT: and w9, w0, #0xff13; CHECK-NEXT: mov w8, #-43 // =0xffffffd514; CHECK-NEXT: cmp w9, #21315; CHECK-NEXT: csel w8, w0, w8, lo16; CHECK-NEXT: add w0, w8, #4217; CHECK-NEXT: ret18 %c = icmp ult i8 %x, -4319 %s = select i1 %c, i8 %x, i8 -4320 %r = add i8 %s, 4221 ret i8 %r22}23 24define i8 @unsigned_sat_constant_i8_using_cmp_sum(i8 %x) {25; CHECK-LABEL: unsigned_sat_constant_i8_using_cmp_sum:26; CHECK: // %bb.0:27; CHECK-NEXT: and w8, w0, #0xff28; CHECK-NEXT: add w8, w8, #4229; CHECK-NEXT: tst w8, #0x10030; CHECK-NEXT: csinv w0, w8, wzr, eq31; CHECK-NEXT: ret32 %a = add i8 %x, 4233 %c = icmp ugt i8 %x, %a34 %r = select i1 %c, i8 -1, i8 %a35 ret i8 %r36}37 38define i8 @unsigned_sat_constant_i8_using_cmp_notval(i8 %x) {39; CHECK-LABEL: unsigned_sat_constant_i8_using_cmp_notval:40; CHECK: // %bb.0:41; CHECK-NEXT: and w8, w0, #0xff42; CHECK-NEXT: add w9, w0, #4243; CHECK-NEXT: cmp w8, #21344; CHECK-NEXT: csinv w0, w9, wzr, ls45; CHECK-NEXT: ret46 %a = add i8 %x, 4247 %c = icmp ugt i8 %x, -4348 %r = select i1 %c, i8 -1, i8 %a49 ret i8 %r50}51 52define i16 @unsigned_sat_constant_i16_using_min(i16 %x) {53; CHECK-LABEL: unsigned_sat_constant_i16_using_min:54; CHECK: // %bb.0:55; CHECK-NEXT: mov w8, #65493 // =0xffd556; CHECK-NEXT: cmp w8, w0, uxth57; CHECK-NEXT: mov w8, #-43 // =0xffffffd558; CHECK-NEXT: csel w8, w0, w8, hi59; CHECK-NEXT: add w0, w8, #4260; CHECK-NEXT: ret61 %c = icmp ult i16 %x, -4362 %s = select i1 %c, i16 %x, i16 -4363 %r = add i16 %s, 4264 ret i16 %r65}66 67define i16 @unsigned_sat_constant_i16_using_cmp_sum(i16 %x) {68; CHECK-LABEL: unsigned_sat_constant_i16_using_cmp_sum:69; CHECK: // %bb.0:70; CHECK-NEXT: and w8, w0, #0xffff71; CHECK-NEXT: add w8, w8, #4272; CHECK-NEXT: tst w8, #0x1000073; CHECK-NEXT: csinv w0, w8, wzr, eq74; CHECK-NEXT: ret75 %a = add i16 %x, 4276 %c = icmp ugt i16 %x, %a77 %r = select i1 %c, i16 -1, i16 %a78 ret i16 %r79}80 81define i16 @unsigned_sat_constant_i16_using_cmp_notval(i16 %x) {82; CHECK-LABEL: unsigned_sat_constant_i16_using_cmp_notval:83; CHECK: // %bb.0:84; CHECK-NEXT: mov w8, #65493 // =0xffd585; CHECK-NEXT: add w9, w0, #4286; CHECK-NEXT: cmp w8, w0, uxth87; CHECK-NEXT: csinv w0, w9, wzr, hs88; CHECK-NEXT: ret89 %a = add i16 %x, 4290 %c = icmp ugt i16 %x, -4391 %r = select i1 %c, i16 -1, i16 %a92 ret i16 %r93}94 95define i32 @unsigned_sat_constant_i32_using_min(i32 %x) {96; CHECK-LABEL: unsigned_sat_constant_i32_using_min:97; CHECK: // %bb.0:98; CHECK-NEXT: mov w8, #-43 // =0xffffffd599; CHECK-NEXT: cmn w0, #43100; CHECK-NEXT: csel w8, w0, w8, lo101; CHECK-NEXT: add w0, w8, #42102; CHECK-NEXT: ret103 %c = icmp ult i32 %x, -43104 %s = select i1 %c, i32 %x, i32 -43105 %r = add i32 %s, 42106 ret i32 %r107}108 109define i32 @unsigned_sat_constant_i32_using_cmp_sum(i32 %x) {110; CHECK-LABEL: unsigned_sat_constant_i32_using_cmp_sum:111; CHECK: // %bb.0:112; CHECK-NEXT: adds w8, w0, #42113; CHECK-NEXT: csinv w0, w8, wzr, lo114; CHECK-NEXT: ret115 %a = add i32 %x, 42116 %c = icmp ugt i32 %x, %a117 %r = select i1 %c, i32 -1, i32 %a118 ret i32 %r119}120 121define i32 @unsigned_sat_constant_i32_using_cmp_notval(i32 %x) {122; CHECK-LABEL: unsigned_sat_constant_i32_using_cmp_notval:123; CHECK: // %bb.0:124; CHECK-NEXT: adds w8, w0, #42125; CHECK-NEXT: csinv w0, w8, wzr, lo126; CHECK-NEXT: ret127 %a = add i32 %x, 42128 %c = icmp ugt i32 %x, -43129 %r = select i1 %c, i32 -1, i32 %a130 ret i32 %r131}132 133define i64 @unsigned_sat_constant_i64_using_min(i64 %x) {134; CHECK-LABEL: unsigned_sat_constant_i64_using_min:135; CHECK: // %bb.0:136; CHECK-NEXT: mov x8, #-43 // =0xffffffffffffffd5137; CHECK-NEXT: cmn x0, #43138; CHECK-NEXT: csel x8, x0, x8, lo139; CHECK-NEXT: add x0, x8, #42140; CHECK-NEXT: ret141 %c = icmp ult i64 %x, -43142 %s = select i1 %c, i64 %x, i64 -43143 %r = add i64 %s, 42144 ret i64 %r145}146 147define i64 @unsigned_sat_constant_i64_using_cmp_sum(i64 %x) {148; CHECK-LABEL: unsigned_sat_constant_i64_using_cmp_sum:149; CHECK: // %bb.0:150; CHECK-NEXT: adds x8, x0, #42151; CHECK-NEXT: csinv x0, x8, xzr, lo152; CHECK-NEXT: ret153 %a = add i64 %x, 42154 %c = icmp ugt i64 %x, %a155 %r = select i1 %c, i64 -1, i64 %a156 ret i64 %r157}158 159define i64 @unsigned_sat_constant_i64_using_cmp_notval(i64 %x) {160; CHECK-LABEL: unsigned_sat_constant_i64_using_cmp_notval:161; CHECK: // %bb.0:162; CHECK-NEXT: adds x8, x0, #42163; CHECK-NEXT: csinv x0, x8, xzr, lo164; CHECK-NEXT: ret165 %a = add i64 %x, 42166 %c = icmp ugt i64 %x, -43167 %r = select i1 %c, i64 -1, i64 %a168 ret i64 %r169}170 171define i8 @unsigned_sat_variable_i8_using_min(i8 %x, i8 %y) {172; CHECK-LABEL: unsigned_sat_variable_i8_using_min:173; CHECK: // %bb.0:174; CHECK-NEXT: and w8, w0, #0xff175; CHECK-NEXT: mvn w9, w1176; CHECK-NEXT: cmp w8, w9, uxtb177; CHECK-NEXT: csinv w8, w0, w1, lo178; CHECK-NEXT: add w0, w8, w1179; CHECK-NEXT: ret180 %noty = xor i8 %y, -1181 %c = icmp ult i8 %x, %noty182 %s = select i1 %c, i8 %x, i8 %noty183 %r = add i8 %s, %y184 ret i8 %r185}186 187define i8 @unsigned_sat_variable_i8_using_cmp_sum(i8 %x, i8 %y) {188; CHECK-LABEL: unsigned_sat_variable_i8_using_cmp_sum:189; CHECK: // %bb.0:190; CHECK-NEXT: and w8, w0, #0xff191; CHECK-NEXT: add w8, w8, w1, uxtb192; CHECK-NEXT: tst w8, #0x100193; CHECK-NEXT: csinv w0, w8, wzr, eq194; CHECK-NEXT: ret195 %a = add i8 %x, %y196 %c = icmp ugt i8 %x, %a197 %r = select i1 %c, i8 -1, i8 %a198 ret i8 %r199}200 201define i8 @unsigned_sat_variable_i8_using_cmp_notval(i8 %x, i8 %y) {202; CHECK-LABEL: unsigned_sat_variable_i8_using_cmp_notval:203; CHECK: // %bb.0:204; CHECK-NEXT: and w8, w1, #0xff205; CHECK-NEXT: add w9, w0, w1206; CHECK-NEXT: add w8, w8, w0, uxtb207; CHECK-NEXT: tst w8, #0x100208; CHECK-NEXT: csinv w0, w9, wzr, eq209; CHECK-NEXT: ret210 %noty = xor i8 %y, -1211 %a = add i8 %x, %y212 %c = icmp ugt i8 %x, %noty213 %r = select i1 %c, i8 -1, i8 %a214 ret i8 %r215}216 217define i16 @unsigned_sat_variable_i16_using_min(i16 %x, i16 %y) {218; CHECK-LABEL: unsigned_sat_variable_i16_using_min:219; CHECK: // %bb.0:220; CHECK-NEXT: and w8, w0, #0xffff221; CHECK-NEXT: mvn w9, w1222; CHECK-NEXT: cmp w8, w9, uxth223; CHECK-NEXT: csinv w8, w0, w1, lo224; CHECK-NEXT: add w0, w8, w1225; CHECK-NEXT: ret226 %noty = xor i16 %y, -1227 %c = icmp ult i16 %x, %noty228 %s = select i1 %c, i16 %x, i16 %noty229 %r = add i16 %s, %y230 ret i16 %r231}232 233define i16 @unsigned_sat_variable_i16_using_cmp_sum(i16 %x, i16 %y) {234; CHECK-LABEL: unsigned_sat_variable_i16_using_cmp_sum:235; CHECK: // %bb.0:236; CHECK-NEXT: and w8, w0, #0xffff237; CHECK-NEXT: add w8, w8, w1, uxth238; CHECK-NEXT: tst w8, #0x10000239; CHECK-NEXT: csinv w0, w8, wzr, eq240; CHECK-NEXT: ret241 %a = add i16 %x, %y242 %c = icmp ugt i16 %x, %a243 %r = select i1 %c, i16 -1, i16 %a244 ret i16 %r245}246 247define i16 @unsigned_sat_variable_i16_using_cmp_notval(i16 %x, i16 %y) {248; CHECK-LABEL: unsigned_sat_variable_i16_using_cmp_notval:249; CHECK: // %bb.0:250; CHECK-NEXT: and w8, w1, #0xffff251; CHECK-NEXT: add w9, w0, w1252; CHECK-NEXT: add w8, w8, w0, uxth253; CHECK-NEXT: tst w8, #0x10000254; CHECK-NEXT: csinv w0, w9, wzr, eq255; CHECK-NEXT: ret256 %noty = xor i16 %y, -1257 %a = add i16 %x, %y258 %c = icmp ugt i16 %x, %noty259 %r = select i1 %c, i16 -1, i16 %a260 ret i16 %r261}262 263define i32 @unsigned_sat_variable_i32_using_min(i32 %x, i32 %y) {264; CHECK-LABEL: unsigned_sat_variable_i32_using_min:265; CHECK: // %bb.0:266; CHECK-NEXT: mvn w8, w1267; CHECK-NEXT: cmp w0, w8268; CHECK-NEXT: csinv w8, w0, w1, lo269; CHECK-NEXT: add w0, w8, w1270; CHECK-NEXT: ret271 %noty = xor i32 %y, -1272 %c = icmp ult i32 %x, %noty273 %s = select i1 %c, i32 %x, i32 %noty274 %r = add i32 %s, %y275 ret i32 %r276}277 278define i32 @unsigned_sat_variable_i32_using_cmp_sum(i32 %x, i32 %y) {279; CHECK-LABEL: unsigned_sat_variable_i32_using_cmp_sum:280; CHECK: // %bb.0:281; CHECK-NEXT: adds w8, w0, w1282; CHECK-NEXT: csinv w0, w8, wzr, lo283; CHECK-NEXT: ret284 %a = add i32 %x, %y285 %c = icmp ugt i32 %x, %a286 %r = select i1 %c, i32 -1, i32 %a287 ret i32 %r288}289 290define i32 @unsigned_sat_variable_i32_using_cmp_notval(i32 %x, i32 %y) {291; CHECK-LABEL: unsigned_sat_variable_i32_using_cmp_notval:292; CHECK: // %bb.0:293; CHECK-NEXT: adds w8, w1, w0294; CHECK-NEXT: csinv w0, w8, wzr, lo295; CHECK-NEXT: ret296 %noty = xor i32 %y, -1297 %a = add i32 %x, %y298 %c = icmp ugt i32 %x, %noty299 %r = select i1 %c, i32 -1, i32 %a300 ret i32 %r301}302 303define i64 @unsigned_sat_variable_i64_using_min(i64 %x, i64 %y) {304; CHECK-LABEL: unsigned_sat_variable_i64_using_min:305; CHECK: // %bb.0:306; CHECK-NEXT: mvn x8, x1307; CHECK-NEXT: cmp x0, x8308; CHECK-NEXT: csinv x8, x0, x1, lo309; CHECK-NEXT: add x0, x8, x1310; CHECK-NEXT: ret311 %noty = xor i64 %y, -1312 %c = icmp ult i64 %x, %noty313 %s = select i1 %c, i64 %x, i64 %noty314 %r = add i64 %s, %y315 ret i64 %r316}317 318define i64 @unsigned_sat_variable_i64_using_cmp_sum(i64 %x, i64 %y) {319; CHECK-LABEL: unsigned_sat_variable_i64_using_cmp_sum:320; CHECK: // %bb.0:321; CHECK-NEXT: adds x8, x0, x1322; CHECK-NEXT: csinv x0, x8, xzr, lo323; CHECK-NEXT: ret324 %a = add i64 %x, %y325 %c = icmp ugt i64 %x, %a326 %r = select i1 %c, i64 -1, i64 %a327 ret i64 %r328}329 330define i64 @unsigned_sat_variable_i64_using_cmp_notval(i64 %x, i64 %y) {331; CHECK-LABEL: unsigned_sat_variable_i64_using_cmp_notval:332; CHECK: // %bb.0:333; CHECK-NEXT: adds x8, x1, x0334; CHECK-NEXT: csinv x0, x8, xzr, lo335; CHECK-NEXT: ret336 %noty = xor i64 %y, -1337 %a = add i64 %x, %y338 %c = icmp ugt i64 %x, %noty339 %r = select i1 %c, i64 -1, i64 %a340 ret i64 %r341}342 343define <16 x i8> @unsigned_sat_constant_v16i8_using_min(<16 x i8> %x) {344; CHECK-LABEL: unsigned_sat_constant_v16i8_using_min:345; CHECK: // %bb.0:346; CHECK-NEXT: movi v1.16b, #213347; CHECK-NEXT: movi v2.16b, #42348; CHECK-NEXT: umin v0.16b, v0.16b, v1.16b349; CHECK-NEXT: add v0.16b, v0.16b, v2.16b350; CHECK-NEXT: ret351 %c = icmp ult <16 x i8> %x, <i8 -43, i8 -43, i8 -43, i8 -43, i8 -43, i8 -43, i8 -43, i8 -43, i8 -43, i8 -43, i8 -43, i8 -43, i8 -43, i8 -43, i8 -43, i8 -43>352 %s = select <16 x i1> %c, <16 x i8> %x, <16 x i8> <i8 -43, i8 -43, i8 -43, i8 -43, i8 -43, i8 -43, i8 -43, i8 -43, i8 -43, i8 -43, i8 -43, i8 -43, i8 -43, i8 -43, i8 -43, i8 -43>353 %r = add <16 x i8> %s, <i8 42, i8 42, i8 42, i8 42, i8 42, i8 42, i8 42, i8 42, i8 42, i8 42, i8 42, i8 42, i8 42, i8 42, i8 42, i8 42>354 ret <16 x i8> %r355}356 357define <16 x i8> @unsigned_sat_constant_v16i8_using_cmp_sum(<16 x i8> %x) {358; CHECK-LABEL: unsigned_sat_constant_v16i8_using_cmp_sum:359; CHECK: // %bb.0:360; CHECK-NEXT: movi v1.16b, #42361; CHECK-NEXT: uqadd v0.16b, v0.16b, v1.16b362; CHECK-NEXT: ret363 %a = add <16 x i8> %x, <i8 42, i8 42, i8 42, i8 42, i8 42, i8 42, i8 42, i8 42, i8 42, i8 42, i8 42, i8 42, i8 42, i8 42, i8 42, i8 42>364 %c = icmp ugt <16 x i8> %x, %a365 %r = select <16 x i1> %c, <16 x i8> <i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1>, <16 x i8> %a366 ret <16 x i8> %r367}368 369define <16 x i8> @unsigned_sat_constant_v16i8_using_cmp_notval(<16 x i8> %x) {370; CHECK-LABEL: unsigned_sat_constant_v16i8_using_cmp_notval:371; CHECK: // %bb.0:372; CHECK-NEXT: movi v1.16b, #42373; CHECK-NEXT: uqadd v0.16b, v0.16b, v1.16b374; CHECK-NEXT: ret375 %a = add <16 x i8> %x, <i8 42, i8 42, i8 42, i8 42, i8 42, i8 42, i8 42, i8 42, i8 42, i8 42, i8 42, i8 42, i8 42, i8 42, i8 42, i8 42>376 %c = icmp ugt <16 x i8> %x, <i8 -43, i8 -43, i8 -43, i8 -43, i8 -43, i8 -43, i8 -43, i8 -43, i8 -43, i8 -43, i8 -43, i8 -43, i8 -43, i8 -43, i8 -43, i8 -43>377 %r = select <16 x i1> %c, <16 x i8> <i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1>, <16 x i8> %a378 ret <16 x i8> %r379}380 381define <8 x i16> @unsigned_sat_constant_v8i16_using_min(<8 x i16> %x) {382; CHECK-LABEL: unsigned_sat_constant_v8i16_using_min:383; CHECK: // %bb.0:384; CHECK-NEXT: mvni v1.8h, #42385; CHECK-NEXT: movi v2.8h, #42386; CHECK-NEXT: umin v0.8h, v0.8h, v1.8h387; CHECK-NEXT: add v0.8h, v0.8h, v2.8h388; CHECK-NEXT: ret389 %c = icmp ult <8 x i16> %x, <i16 -43, i16 -43, i16 -43, i16 -43, i16 -43, i16 -43, i16 -43, i16 -43>390 %s = select <8 x i1> %c, <8 x i16> %x, <8 x i16> <i16 -43, i16 -43, i16 -43, i16 -43, i16 -43, i16 -43, i16 -43, i16 -43>391 %r = add <8 x i16> %s, <i16 42, i16 42, i16 42, i16 42, i16 42, i16 42, i16 42, i16 42>392 ret <8 x i16> %r393}394 395define <8 x i16> @unsigned_sat_constant_v8i16_using_cmp_sum(<8 x i16> %x) {396; CHECK-LABEL: unsigned_sat_constant_v8i16_using_cmp_sum:397; CHECK: // %bb.0:398; CHECK-NEXT: movi v1.8h, #42399; CHECK-NEXT: uqadd v0.8h, v0.8h, v1.8h400; CHECK-NEXT: ret401 %a = add <8 x i16> %x, <i16 42, i16 42, i16 42, i16 42, i16 42, i16 42, i16 42, i16 42>402 %c = icmp ugt <8 x i16> %x, %a403 %r = select <8 x i1> %c, <8 x i16> <i16 -1, i16 -1, i16 -1, i16 -1, i16 -1, i16 -1, i16 -1, i16 -1>, <8 x i16> %a404 ret <8 x i16> %r405}406 407define <8 x i16> @unsigned_sat_constant_v8i16_using_cmp_notval(<8 x i16> %x) {408; CHECK-LABEL: unsigned_sat_constant_v8i16_using_cmp_notval:409; CHECK: // %bb.0:410; CHECK-NEXT: movi v1.8h, #42411; CHECK-NEXT: uqadd v0.8h, v0.8h, v1.8h412; CHECK-NEXT: ret413 %a = add <8 x i16> %x, <i16 42, i16 42, i16 42, i16 42, i16 42, i16 42, i16 42, i16 42>414 %c = icmp ugt <8 x i16> %x, <i16 -43, i16 -43, i16 -43, i16 -43, i16 -43, i16 -43, i16 -43, i16 -43>415 %r = select <8 x i1> %c, <8 x i16> <i16 -1, i16 -1, i16 -1, i16 -1, i16 -1, i16 -1, i16 -1, i16 -1>, <8 x i16> %a416 ret <8 x i16> %r417}418 419define <4 x i32> @unsigned_sat_constant_v4i32_using_min(<4 x i32> %x) {420; CHECK-LABEL: unsigned_sat_constant_v4i32_using_min:421; CHECK: // %bb.0:422; CHECK-NEXT: mvni v1.4s, #42423; CHECK-NEXT: umin v0.4s, v0.4s, v1.4s424; CHECK-NEXT: movi v1.4s, #42425; CHECK-NEXT: add v0.4s, v0.4s, v1.4s426; CHECK-NEXT: ret427 %c = icmp ult <4 x i32> %x, <i32 -43, i32 -43, i32 -43, i32 -43>428 %s = select <4 x i1> %c, <4 x i32> %x, <4 x i32> <i32 -43, i32 -43, i32 -43, i32 -43>429 %r = add <4 x i32> %s, <i32 42, i32 42, i32 42, i32 42>430 ret <4 x i32> %r431}432 433define <4 x i32> @unsigned_sat_constant_v4i32_using_cmp_sum(<4 x i32> %x) {434; CHECK-LABEL: unsigned_sat_constant_v4i32_using_cmp_sum:435; CHECK: // %bb.0:436; CHECK-NEXT: movi v1.4s, #42437; CHECK-NEXT: uqadd v0.4s, v0.4s, v1.4s438; CHECK-NEXT: ret439 %a = add <4 x i32> %x, <i32 42, i32 42, i32 42, i32 42>440 %c = icmp ugt <4 x i32> %x, %a441 %r = select <4 x i1> %c, <4 x i32> <i32 -1, i32 -1, i32 -1, i32 -1>, <4 x i32> %a442 ret <4 x i32> %r443}444 445define <4 x i32> @unsigned_sat_constant_v4i32_using_cmp_notval(<4 x i32> %x) {446; CHECK-LABEL: unsigned_sat_constant_v4i32_using_cmp_notval:447; CHECK: // %bb.0:448; CHECK-NEXT: movi v1.4s, #42449; CHECK-NEXT: uqadd v0.4s, v0.4s, v1.4s450; CHECK-NEXT: ret451 %a = add <4 x i32> %x, <i32 42, i32 42, i32 42, i32 42>452 %c = icmp ugt <4 x i32> %x, <i32 -43, i32 -43, i32 -43, i32 -43>453 %r = select <4 x i1> %c, <4 x i32> <i32 -1, i32 -1, i32 -1, i32 -1>, <4 x i32> %a454 ret <4 x i32> %r455}456 457define <2 x i64> @unsigned_sat_constant_v2i64_using_min(<2 x i64> %x) {458; CHECK-LABEL: unsigned_sat_constant_v2i64_using_min:459; CHECK: // %bb.0:460; CHECK-NEXT: mov x8, #-43 // =0xffffffffffffffd5461; CHECK-NEXT: dup v1.2d, x8462; CHECK-NEXT: mov w8, #42 // =0x2a463; CHECK-NEXT: cmhi v2.2d, v1.2d, v0.2d464; CHECK-NEXT: bif v0.16b, v1.16b, v2.16b465; CHECK-NEXT: dup v1.2d, x8466; CHECK-NEXT: add v0.2d, v0.2d, v1.2d467; CHECK-NEXT: ret468 %c = icmp ult <2 x i64> %x, <i64 -43, i64 -43>469 %s = select <2 x i1> %c, <2 x i64> %x, <2 x i64> <i64 -43, i64 -43>470 %r = add <2 x i64> %s, <i64 42, i64 42>471 ret <2 x i64> %r472}473 474define <2 x i64> @unsigned_sat_constant_v2i64_using_cmp_sum(<2 x i64> %x) {475; CHECK-LABEL: unsigned_sat_constant_v2i64_using_cmp_sum:476; CHECK: // %bb.0:477; CHECK-NEXT: mov w8, #42 // =0x2a478; CHECK-NEXT: dup v1.2d, x8479; CHECK-NEXT: uqadd v0.2d, v0.2d, v1.2d480; CHECK-NEXT: ret481 %a = add <2 x i64> %x, <i64 42, i64 42>482 %c = icmp ugt <2 x i64> %x, %a483 %r = select <2 x i1> %c, <2 x i64> <i64 -1, i64 -1>, <2 x i64> %a484 ret <2 x i64> %r485}486 487define <2 x i64> @unsigned_sat_constant_v2i64_using_cmp_notval(<2 x i64> %x) {488; CHECK-LABEL: unsigned_sat_constant_v2i64_using_cmp_notval:489; CHECK: // %bb.0:490; CHECK-NEXT: mov w8, #42 // =0x2a491; CHECK-NEXT: dup v1.2d, x8492; CHECK-NEXT: uqadd v0.2d, v0.2d, v1.2d493; CHECK-NEXT: ret494 %a = add <2 x i64> %x, <i64 42, i64 42>495 %c = icmp ugt <2 x i64> %x, <i64 -43, i64 -43>496 %r = select <2 x i1> %c, <2 x i64> <i64 -1, i64 -1>, <2 x i64> %a497 ret <2 x i64> %r498}499 500define <16 x i8> @unsigned_sat_variable_v16i8_using_min(<16 x i8> %x, <16 x i8> %y) {501; CHECK-LABEL: unsigned_sat_variable_v16i8_using_min:502; CHECK: // %bb.0:503; CHECK-NEXT: mvn v2.16b, v1.16b504; CHECK-NEXT: umin v0.16b, v0.16b, v2.16b505; CHECK-NEXT: add v0.16b, v0.16b, v1.16b506; CHECK-NEXT: ret507 %noty = xor <16 x i8> %y, <i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1>508 %c = icmp ult <16 x i8> %x, %noty509 %s = select <16 x i1> %c, <16 x i8> %x, <16 x i8> %noty510 %r = add <16 x i8> %s, %y511 ret <16 x i8> %r512}513 514define <16 x i8> @unsigned_sat_variable_v16i8_using_cmp_sum(<16 x i8> %x, <16 x i8> %y) {515; CHECK-LABEL: unsigned_sat_variable_v16i8_using_cmp_sum:516; CHECK: // %bb.0:517; CHECK-NEXT: uqadd v0.16b, v0.16b, v1.16b518; CHECK-NEXT: ret519 %a = add <16 x i8> %x, %y520 %c = icmp ugt <16 x i8> %x, %a521 %r = select <16 x i1> %c, <16 x i8> <i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1>, <16 x i8> %a522 ret <16 x i8> %r523}524 525define <16 x i8> @unsigned_sat_variable_v16i8_using_cmp_notval(<16 x i8> %x, <16 x i8> %y) {526; CHECK-LABEL: unsigned_sat_variable_v16i8_using_cmp_notval:527; CHECK: // %bb.0:528; CHECK-NEXT: mvn v2.16b, v1.16b529; CHECK-NEXT: add v1.16b, v0.16b, v1.16b530; CHECK-NEXT: cmhi v0.16b, v0.16b, v2.16b531; CHECK-NEXT: orr v0.16b, v0.16b, v1.16b532; CHECK-NEXT: ret533 %noty = xor <16 x i8> %y, <i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1>534 %a = add <16 x i8> %x, %y535 %c = icmp ugt <16 x i8> %x, %noty536 %r = select <16 x i1> %c, <16 x i8> <i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1>, <16 x i8> %a537 ret <16 x i8> %r538}539 540define <8 x i16> @unsigned_sat_variable_v8i16_using_min(<8 x i16> %x, <8 x i16> %y) {541; CHECK-LABEL: unsigned_sat_variable_v8i16_using_min:542; CHECK: // %bb.0:543; CHECK-NEXT: mvn v2.16b, v1.16b544; CHECK-NEXT: umin v0.8h, v0.8h, v2.8h545; CHECK-NEXT: add v0.8h, v0.8h, v1.8h546; CHECK-NEXT: ret547 %noty = xor <8 x i16> %y, <i16 -1, i16 -1, i16 -1, i16 -1, i16 -1, i16 -1, i16 -1, i16 -1>548 %c = icmp ult <8 x i16> %x, %noty549 %s = select <8 x i1> %c, <8 x i16> %x, <8 x i16> %noty550 %r = add <8 x i16> %s, %y551 ret <8 x i16> %r552}553 554define <8 x i16> @unsigned_sat_variable_v8i16_using_cmp_sum(<8 x i16> %x, <8 x i16> %y) {555; CHECK-LABEL: unsigned_sat_variable_v8i16_using_cmp_sum:556; CHECK: // %bb.0:557; CHECK-NEXT: uqadd v0.8h, v0.8h, v1.8h558; CHECK-NEXT: ret559 %a = add <8 x i16> %x, %y560 %c = icmp ugt <8 x i16> %x, %a561 %r = select <8 x i1> %c, <8 x i16> <i16 -1, i16 -1, i16 -1, i16 -1, i16 -1, i16 -1, i16 -1, i16 -1>, <8 x i16> %a562 ret <8 x i16> %r563}564 565define <8 x i16> @unsigned_sat_variable_v8i16_using_cmp_notval(<8 x i16> %x, <8 x i16> %y) {566; CHECK-LABEL: unsigned_sat_variable_v8i16_using_cmp_notval:567; CHECK: // %bb.0:568; CHECK-NEXT: mvn v2.16b, v1.16b569; CHECK-NEXT: add v1.8h, v0.8h, v1.8h570; CHECK-NEXT: cmhi v0.8h, v0.8h, v2.8h571; CHECK-NEXT: orr v0.16b, v0.16b, v1.16b572; CHECK-NEXT: ret573 %noty = xor <8 x i16> %y, <i16 -1, i16 -1, i16 -1, i16 -1, i16 -1, i16 -1, i16 -1, i16 -1>574 %a = add <8 x i16> %x, %y575 %c = icmp ugt <8 x i16> %x, %noty576 %r = select <8 x i1> %c, <8 x i16> <i16 -1, i16 -1, i16 -1, i16 -1, i16 -1, i16 -1, i16 -1, i16 -1>, <8 x i16> %a577 ret <8 x i16> %r578}579 580define <4 x i32> @unsigned_sat_variable_v4i32_using_min(<4 x i32> %x, <4 x i32> %y) {581; CHECK-LABEL: unsigned_sat_variable_v4i32_using_min:582; CHECK: // %bb.0:583; CHECK-NEXT: mvn v2.16b, v1.16b584; CHECK-NEXT: umin v0.4s, v0.4s, v2.4s585; CHECK-NEXT: add v0.4s, v0.4s, v1.4s586; CHECK-NEXT: ret587 %noty = xor <4 x i32> %y, <i32 -1, i32 -1, i32 -1, i32 -1>588 %c = icmp ult <4 x i32> %x, %noty589 %s = select <4 x i1> %c, <4 x i32> %x, <4 x i32> %noty590 %r = add <4 x i32> %s, %y591 ret <4 x i32> %r592}593 594define <4 x i32> @unsigned_sat_variable_v4i32_using_cmp_sum(<4 x i32> %x, <4 x i32> %y) {595; CHECK-LABEL: unsigned_sat_variable_v4i32_using_cmp_sum:596; CHECK: // %bb.0:597; CHECK-NEXT: uqadd v0.4s, v0.4s, v1.4s598; CHECK-NEXT: ret599 %a = add <4 x i32> %x, %y600 %c = icmp ugt <4 x i32> %x, %a601 %r = select <4 x i1> %c, <4 x i32> <i32 -1, i32 -1, i32 -1, i32 -1>, <4 x i32> %a602 ret <4 x i32> %r603}604 605define <4 x i32> @unsigned_sat_variable_v4i32_using_cmp_notval(<4 x i32> %x, <4 x i32> %y) {606; CHECK-LABEL: unsigned_sat_variable_v4i32_using_cmp_notval:607; CHECK: // %bb.0:608; CHECK-NEXT: mvn v2.16b, v1.16b609; CHECK-NEXT: add v1.4s, v0.4s, v1.4s610; CHECK-NEXT: cmhi v0.4s, v0.4s, v2.4s611; CHECK-NEXT: orr v0.16b, v0.16b, v1.16b612; CHECK-NEXT: ret613 %noty = xor <4 x i32> %y, <i32 -1, i32 -1, i32 -1, i32 -1>614 %a = add <4 x i32> %x, %y615 %c = icmp ugt <4 x i32> %x, %noty616 %r = select <4 x i1> %c, <4 x i32> <i32 -1, i32 -1, i32 -1, i32 -1>, <4 x i32> %a617 ret <4 x i32> %r618}619 620define <2 x i64> @unsigned_sat_variable_v2i64_using_min(<2 x i64> %x, <2 x i64> %y) {621; CHECK-LABEL: unsigned_sat_variable_v2i64_using_min:622; CHECK: // %bb.0:623; CHECK-NEXT: mvn v2.16b, v1.16b624; CHECK-NEXT: cmhi v3.2d, v2.2d, v0.2d625; CHECK-NEXT: bif v0.16b, v2.16b, v3.16b626; CHECK-NEXT: add v0.2d, v0.2d, v1.2d627; CHECK-NEXT: ret628 %noty = xor <2 x i64> %y, <i64 -1, i64 -1>629 %c = icmp ult <2 x i64> %x, %noty630 %s = select <2 x i1> %c, <2 x i64> %x, <2 x i64> %noty631 %r = add <2 x i64> %s, %y632 ret <2 x i64> %r633}634 635define <2 x i64> @unsigned_sat_variable_v2i64_using_cmp_sum(<2 x i64> %x, <2 x i64> %y) {636; CHECK-LABEL: unsigned_sat_variable_v2i64_using_cmp_sum:637; CHECK: // %bb.0:638; CHECK-NEXT: uqadd v0.2d, v0.2d, v1.2d639; CHECK-NEXT: ret640 %a = add <2 x i64> %x, %y641 %c = icmp ugt <2 x i64> %x, %a642 %r = select <2 x i1> %c, <2 x i64> <i64 -1, i64 -1>, <2 x i64> %a643 ret <2 x i64> %r644}645 646define <2 x i64> @unsigned_sat_variable_v2i64_using_cmp_notval(<2 x i64> %x, <2 x i64> %y) {647; CHECK-LABEL: unsigned_sat_variable_v2i64_using_cmp_notval:648; CHECK: // %bb.0:649; CHECK-NEXT: mvn v2.16b, v1.16b650; CHECK-NEXT: add v1.2d, v0.2d, v1.2d651; CHECK-NEXT: cmhi v0.2d, v0.2d, v2.2d652; CHECK-NEXT: orr v0.16b, v0.16b, v1.16b653; CHECK-NEXT: ret654 %noty = xor <2 x i64> %y, <i64 -1, i64 -1>655 %a = add <2 x i64> %x, %y656 %c = icmp ugt <2 x i64> %x, %noty657 %r = select <2 x i1> %c, <2 x i64> <i64 -1, i64 -1>, <2 x i64> %a658 ret <2 x i64> %r659}660 661