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1; NOTE: Assertions have been autogenerated by utils/update_test_checks.py2; RUN: opt -select-optimize -mtriple=aarch64-linux-gnu -mcpu=neoverse-v2 -S < %s | FileCheck %s --check-prefixes=CHECK,CHECK-STANDARD3; RUN: opt -select-optimize -mtriple=aarch64-linux-gnu -mcpu=neoverse-v2 -S -disable-loop-level-heuristics < %s | FileCheck %s --check-prefixes=CHECK,CHECK-FORCED4 5target datalayout = "e-m:e-i8:8:32-i16:16:32-i64:64-i128:128-n32:64-S128-Fn32"6target triple = "aarch64"7 8define i32 @minloc1(ptr nocapture readonly %0, ptr nocapture readonly %1, ptr nocapture readonly %2) {9; CHECK-LABEL: @minloc1(10; CHECK-NEXT: [[TMP4:%.*]] = getelementptr i8, ptr [[TMP0:%.*]], i64 4011; CHECK-NEXT: [[TMP5:%.*]] = load i64, ptr [[TMP4]], align 812; CHECK-NEXT: [[TMP6:%.*]] = getelementptr i8, ptr [[TMP0]], i64 6413; CHECK-NEXT: [[TMP7:%.*]] = load i64, ptr [[TMP6]], align 814; CHECK-NEXT: [[TMP8:%.*]] = getelementptr i8, ptr [[TMP0]], i64 8015; CHECK-NEXT: [[TMP9:%.*]] = load i64, ptr [[TMP8]], align 816; CHECK-NEXT: [[TMP10:%.*]] = getelementptr i8, ptr [[TMP0]], i64 8817; CHECK-NEXT: [[TMP11:%.*]] = load i64, ptr [[TMP10]], align 818; CHECK-NEXT: [[TMP12:%.*]] = load ptr, ptr [[TMP0]], align 819; CHECK-NEXT: [[TMP13:%.*]] = load i32, ptr [[TMP1:%.*]], align 420; CHECK-NEXT: [[TMP14:%.*]] = sext i32 [[TMP13]] to i6421; CHECK-NEXT: [[TMP15:%.*]] = add nsw i64 [[TMP14]], -122; CHECK-NEXT: [[TMP16:%.*]] = mul i64 [[TMP15]], [[TMP5]]23; CHECK-NEXT: [[TMP17:%.*]] = getelementptr i8, ptr [[TMP12]], i64 [[TMP16]]24; CHECK-NEXT: [[TMP18:%.*]] = shl i64 [[TMP7]], 325; CHECK-NEXT: [[TMP19:%.*]] = getelementptr i8, ptr [[TMP17]], i64 [[TMP18]]26; CHECK-NEXT: [[TMP20:%.*]] = load i32, ptr [[TMP2:%.*]], align 427; CHECK-NEXT: [[DOTNOT:%.*]] = icmp slt i64 [[TMP9]], 128; CHECK-NEXT: br i1 [[DOTNOT]], label [[DOTPREHEADER:%.*]], label [[DOTPREHEADER35_LR_PH:%.*]]29; CHECK: .preheader35.lr.ph:30; CHECK-NEXT: [[TMP21:%.*]] = sub i64 0, [[TMP7]]31; CHECK-NEXT: br label [[DOTPREHEADER35:%.*]]32; CHECK: .preheader35:33; CHECK-NEXT: [[TMP22:%.*]] = phi i32 [ 2147483647, [[DOTPREHEADER35_LR_PH]] ], [ [[TMP30:%.*]], [[SELECT_END:%.*]] ]34; CHECK-NEXT: [[TMP23:%.*]] = phi i64 [ 0, [[DOTPREHEADER35_LR_PH]] ], [ [[IV_N:%.*]], [[SELECT_END]] ]35; CHECK-NEXT: [[DOT045:%.*]] = phi i1 [ false, [[DOTPREHEADER35_LR_PH]] ], [ [[DOT2:%.*]], [[SELECT_END]] ]36; CHECK-NEXT: [[DOTLCSSA364144:%.*]] = phi i32 [ 0, [[DOTPREHEADER35_LR_PH]] ], [ [[TMP29:%.*]], [[SELECT_END]] ]37; CHECK-NEXT: [[TMP24:%.*]] = mul nsw i64 [[TMP23]], [[TMP11]]38; CHECK-NEXT: [[TMP25:%.*]] = getelementptr i8, ptr [[TMP19]], i64 [[TMP24]]39; CHECK-NEXT: [[TMP26:%.*]] = load i32, ptr [[TMP25]], align 440; CHECK-NEXT: [[TMP27:%.*]] = icmp ne i32 [[TMP26]], [[TMP20]]41; CHECK-NEXT: [[TMP28:%.*]] = icmp sge i32 [[TMP26]], [[TMP22]]42; CHECK-NEXT: [[DOTNOT33:%.*]] = and i1 [[DOT045]], [[TMP28]]43; CHECK-NEXT: [[OR_COND:%.*]] = select i1 [[TMP27]], i1 true, i1 [[DOTNOT33]]44; CHECK-NEXT: [[OR_COND_FROZEN:%.*]] = freeze i1 [[OR_COND]]45; CHECK-NEXT: br i1 [[OR_COND_FROZEN]], label [[SELECT_END]], label [[SELECT_FALSE:%.*]]46; CHECK: select.false:47; CHECK-NEXT: br label [[SELECT_END]]48; CHECK: select.end:49; CHECK-NEXT: [[TMP29]] = phi i32 [ [[DOTLCSSA364144]], [[DOTPREHEADER35]] ], [ 1, [[SELECT_FALSE]] ]50; CHECK-NEXT: [[DOT2]] = phi i1 [ [[DOT045]], [[DOTPREHEADER35]] ], [ true, [[SELECT_FALSE]] ]51; CHECK-NEXT: [[TMP30]] = phi i32 [ [[TMP22]], [[DOTPREHEADER35]] ], [ [[TMP20]], [[SELECT_FALSE]] ]52; CHECK-NEXT: [[NOT_OR_COND:%.*]] = xor i1 [[OR_COND]], true53; CHECK-NEXT: [[IV_N]] = add nuw nsw i64 [[TMP23]], 154; CHECK-NEXT: [[EXITCOND_NOT:%.*]] = icmp eq i64 [[IV_N]], [[TMP9]]55; CHECK-NEXT: br i1 [[EXITCOND_NOT]], label [[DOTPREHEADER]], label [[DOTPREHEADER35]]56; CHECK: .preheader:57; CHECK-NEXT: [[DOTLCSSA3641_LCSSA:%.*]] = phi i32 [ 0, [[TMP3:%.*]] ], [ [[TMP29]], [[SELECT_END]] ]58; CHECK-NEXT: ret i32 [[DOTLCSSA3641_LCSSA]]59;60 %4 = getelementptr i8, ptr %0, i64 4061 %5 = load i64, ptr %4, align 862 %6 = getelementptr i8, ptr %0, i64 6463 %7 = load i64, ptr %6, align 864 %8 = getelementptr i8, ptr %0, i64 8065 %9 = load i64, ptr %8, align 866 %10 = getelementptr i8, ptr %0, i64 8867 %11 = load i64, ptr %10, align 868 %12 = load ptr, ptr %0, align 869 %13 = load i32, ptr %1, align 470 %14 = sext i32 %13 to i6471 %15 = add nsw i64 %14, -172 %16 = mul i64 %15, %573 %17 = getelementptr i8, ptr %12, i64 %1674 %18 = shl i64 %7, 375 %19 = getelementptr i8, ptr %17, i64 %1876 %20 = load i32, ptr %2, align 477 %.not = icmp slt i64 %9, 178 br i1 %.not, label %.preheader, label %.preheader35.lr.ph79 80.preheader35.lr.ph: ; preds = %381 %21 = sub i64 0, %782 br label %.preheader3583 84.preheader35: ; preds = %.preheader35.lr.ph, %.preheader3585 %22 = phi i32 [ 2147483647, %.preheader35.lr.ph ], [ %30, %.preheader35 ]86 %23 = phi i64 [ 0, %.preheader35.lr.ph ], [ %iv.n, %.preheader35 ]87 %.045 = phi i1 [ false, %.preheader35.lr.ph ], [ %.2, %.preheader35 ]88 %.lcssa364144 = phi i32 [ 0, %.preheader35.lr.ph ], [ %29, %.preheader35 ]89 %24 = mul nsw i64 %23, %1190 %25 = getelementptr i8, ptr %19, i64 %2491 %26 = load i32, ptr %25, align 492 %27 = icmp ne i32 %26, %2093 %28 = icmp sge i32 %26, %2294 %.not33 = and i1 %.045, %2895 %or.cond = select i1 %27, i1 true, i1 %.not3396 %29 = select i1 %or.cond, i32 %.lcssa364144, i32 197 %not.or.cond = xor i1 %or.cond, true98 %.2 = select i1 %not.or.cond, i1 true, i1 %.04599 %30 = select i1 %or.cond, i32 %22, i32 %20100 %iv.n = add nuw nsw i64 %23, 1101 %exitcond.not = icmp eq i64 %iv.n, %9102 br i1 %exitcond.not, label %.preheader, label %.preheader35103 104.preheader: ; preds = %.preheader35, %3105 %.lcssa3641.lcssa = phi i32 [ 0, %3 ], [ %29, %.preheader35 ]106 ret i32 %.lcssa3641.lcssa107}108 109define i32 @minloc1_otherunusednot(ptr nocapture readonly %0, ptr nocapture readonly %1, ptr nocapture readonly %2) {110; CHECK-STANDARD-LABEL: @minloc1_otherunusednot(111; CHECK-STANDARD-NEXT: [[TMP4:%.*]] = getelementptr i8, ptr [[TMP0:%.*]], i64 40112; CHECK-STANDARD-NEXT: [[TMP5:%.*]] = load i64, ptr [[TMP4]], align 8113; CHECK-STANDARD-NEXT: [[TMP6:%.*]] = getelementptr i8, ptr [[TMP0]], i64 64114; CHECK-STANDARD-NEXT: [[TMP7:%.*]] = load i64, ptr [[TMP6]], align 8115; CHECK-STANDARD-NEXT: [[TMP8:%.*]] = getelementptr i8, ptr [[TMP0]], i64 80116; CHECK-STANDARD-NEXT: [[TMP9:%.*]] = load i64, ptr [[TMP8]], align 8117; CHECK-STANDARD-NEXT: [[TMP10:%.*]] = getelementptr i8, ptr [[TMP0]], i64 88118; CHECK-STANDARD-NEXT: [[TMP11:%.*]] = load i64, ptr [[TMP10]], align 8119; CHECK-STANDARD-NEXT: [[TMP12:%.*]] = load ptr, ptr [[TMP0]], align 8120; CHECK-STANDARD-NEXT: [[TMP13:%.*]] = load i32, ptr [[TMP1:%.*]], align 4121; CHECK-STANDARD-NEXT: [[TMP14:%.*]] = sext i32 [[TMP13]] to i64122; CHECK-STANDARD-NEXT: [[TMP15:%.*]] = add nsw i64 [[TMP14]], -1123; CHECK-STANDARD-NEXT: [[TMP16:%.*]] = mul i64 [[TMP15]], [[TMP5]]124; CHECK-STANDARD-NEXT: [[TMP17:%.*]] = getelementptr i8, ptr [[TMP12]], i64 [[TMP16]]125; CHECK-STANDARD-NEXT: [[TMP18:%.*]] = shl i64 [[TMP7]], 3126; CHECK-STANDARD-NEXT: [[TMP19:%.*]] = getelementptr i8, ptr [[TMP17]], i64 [[TMP18]]127; CHECK-STANDARD-NEXT: [[TMP20:%.*]] = load i32, ptr [[TMP2:%.*]], align 4128; CHECK-STANDARD-NEXT: [[DOTNOT:%.*]] = icmp slt i64 [[TMP9]], 1129; CHECK-STANDARD-NEXT: br i1 [[DOTNOT]], label [[DOTPREHEADER:%.*]], label [[DOTPREHEADER35_LR_PH:%.*]]130; CHECK-STANDARD: .preheader35.lr.ph:131; CHECK-STANDARD-NEXT: [[TMP21:%.*]] = sub i64 0, [[TMP7]]132; CHECK-STANDARD-NEXT: br label [[DOTPREHEADER35:%.*]]133; CHECK-STANDARD: .preheader35:134; CHECK-STANDARD-NEXT: [[TMP22:%.*]] = phi i32 [ 2147483647, [[DOTPREHEADER35_LR_PH]] ], [ [[TMP30:%.*]], [[DOTPREHEADER35]] ]135; CHECK-STANDARD-NEXT: [[TMP23:%.*]] = phi i64 [ 0, [[DOTPREHEADER35_LR_PH]] ], [ [[IV_N:%.*]], [[DOTPREHEADER35]] ]136; CHECK-STANDARD-NEXT: [[DOT045:%.*]] = phi i1 [ false, [[DOTPREHEADER35_LR_PH]] ], [ [[DOT2:%.*]], [[DOTPREHEADER35]] ]137; CHECK-STANDARD-NEXT: [[DOTLCSSA364144:%.*]] = phi i32 [ 0, [[DOTPREHEADER35_LR_PH]] ], [ [[TMP29:%.*]], [[DOTPREHEADER35]] ]138; CHECK-STANDARD-NEXT: [[TMP24:%.*]] = mul nsw i64 [[TMP23]], [[TMP11]]139; CHECK-STANDARD-NEXT: [[TMP25:%.*]] = getelementptr i8, ptr [[TMP19]], i64 [[TMP24]]140; CHECK-STANDARD-NEXT: [[TMP26:%.*]] = load i32, ptr [[TMP25]], align 4141; CHECK-STANDARD-NEXT: [[TMP27:%.*]] = icmp ne i32 [[TMP26]], [[TMP20]]142; CHECK-STANDARD-NEXT: [[TMP28:%.*]] = icmp sge i32 [[TMP26]], [[TMP22]]143; CHECK-STANDARD-NEXT: [[DOTNOT33:%.*]] = and i1 [[DOT045]], [[TMP28]]144; CHECK-STANDARD-NEXT: [[OR_COND:%.*]] = select i1 [[TMP27]], i1 true, i1 [[DOTNOT33]]145; CHECK-STANDARD-NEXT: [[TMP29]] = select i1 [[OR_COND]], i32 [[DOTLCSSA364144]], i32 1146; CHECK-STANDARD-NEXT: [[DOT2]] = select i1 [[OR_COND]], i1 [[DOT045]], i1 true147; CHECK-STANDARD-NEXT: [[NOT_OR_COND:%.*]] = xor i1 [[OR_COND]], true148; CHECK-STANDARD-NEXT: [[TMP30]] = select i1 [[OR_COND]], i32 [[TMP22]], i32 [[TMP20]]149; CHECK-STANDARD-NEXT: [[IV_N]] = add nuw nsw i64 [[TMP23]], 1150; CHECK-STANDARD-NEXT: [[EXITCOND_NOT:%.*]] = icmp eq i64 [[IV_N]], [[TMP9]]151; CHECK-STANDARD-NEXT: br i1 [[EXITCOND_NOT]], label [[DOTPREHEADER]], label [[DOTPREHEADER35]]152; CHECK-STANDARD: .preheader:153; CHECK-STANDARD-NEXT: [[DOTLCSSA3641_LCSSA:%.*]] = phi i32 [ 0, [[TMP3:%.*]] ], [ [[TMP29]], [[DOTPREHEADER35]] ]154; CHECK-STANDARD-NEXT: [[P:%.*]] = phi i1 [ false, [[TMP3]] ], [ [[NOT_OR_COND]], [[DOTPREHEADER35]] ]155; CHECK-STANDARD-NEXT: [[Q:%.*]] = select i1 [[P]], i32 [[DOTLCSSA3641_LCSSA]], i32 1156; CHECK-STANDARD-NEXT: ret i32 [[Q]]157;158; CHECK-FORCED-LABEL: @minloc1_otherunusednot(159; CHECK-FORCED-NEXT: [[TMP4:%.*]] = getelementptr i8, ptr [[TMP0:%.*]], i64 40160; CHECK-FORCED-NEXT: [[TMP5:%.*]] = load i64, ptr [[TMP4]], align 8161; CHECK-FORCED-NEXT: [[TMP6:%.*]] = getelementptr i8, ptr [[TMP0]], i64 64162; CHECK-FORCED-NEXT: [[TMP7:%.*]] = load i64, ptr [[TMP6]], align 8163; CHECK-FORCED-NEXT: [[TMP8:%.*]] = getelementptr i8, ptr [[TMP0]], i64 80164; CHECK-FORCED-NEXT: [[TMP9:%.*]] = load i64, ptr [[TMP8]], align 8165; CHECK-FORCED-NEXT: [[TMP10:%.*]] = getelementptr i8, ptr [[TMP0]], i64 88166; CHECK-FORCED-NEXT: [[TMP11:%.*]] = load i64, ptr [[TMP10]], align 8167; CHECK-FORCED-NEXT: [[TMP12:%.*]] = load ptr, ptr [[TMP0]], align 8168; CHECK-FORCED-NEXT: [[TMP13:%.*]] = load i32, ptr [[TMP1:%.*]], align 4169; CHECK-FORCED-NEXT: [[TMP14:%.*]] = sext i32 [[TMP13]] to i64170; CHECK-FORCED-NEXT: [[TMP15:%.*]] = add nsw i64 [[TMP14]], -1171; CHECK-FORCED-NEXT: [[TMP16:%.*]] = mul i64 [[TMP15]], [[TMP5]]172; CHECK-FORCED-NEXT: [[TMP17:%.*]] = getelementptr i8, ptr [[TMP12]], i64 [[TMP16]]173; CHECK-FORCED-NEXT: [[TMP18:%.*]] = shl i64 [[TMP7]], 3174; CHECK-FORCED-NEXT: [[TMP19:%.*]] = getelementptr i8, ptr [[TMP17]], i64 [[TMP18]]175; CHECK-FORCED-NEXT: [[TMP20:%.*]] = load i32, ptr [[TMP2:%.*]], align 4176; CHECK-FORCED-NEXT: [[DOTNOT:%.*]] = icmp slt i64 [[TMP9]], 1177; CHECK-FORCED-NEXT: br i1 [[DOTNOT]], label [[DOTPREHEADER:%.*]], label [[DOTPREHEADER35_LR_PH:%.*]]178; CHECK-FORCED: .preheader35.lr.ph:179; CHECK-FORCED-NEXT: [[TMP21:%.*]] = sub i64 0, [[TMP7]]180; CHECK-FORCED-NEXT: br label [[DOTPREHEADER35:%.*]]181; CHECK-FORCED: .preheader35:182; CHECK-FORCED-NEXT: [[TMP22:%.*]] = phi i32 [ 2147483647, [[DOTPREHEADER35_LR_PH]] ], [ [[TMP30:%.*]], [[SELECT_END:%.*]] ]183; CHECK-FORCED-NEXT: [[TMP23:%.*]] = phi i64 [ 0, [[DOTPREHEADER35_LR_PH]] ], [ [[IV_N:%.*]], [[SELECT_END]] ]184; CHECK-FORCED-NEXT: [[DOT045:%.*]] = phi i1 [ false, [[DOTPREHEADER35_LR_PH]] ], [ [[DOT2:%.*]], [[SELECT_END]] ]185; CHECK-FORCED-NEXT: [[DOTLCSSA364144:%.*]] = phi i32 [ 0, [[DOTPREHEADER35_LR_PH]] ], [ [[TMP29:%.*]], [[SELECT_END]] ]186; CHECK-FORCED-NEXT: [[TMP24:%.*]] = mul nsw i64 [[TMP23]], [[TMP11]]187; CHECK-FORCED-NEXT: [[TMP25:%.*]] = getelementptr i8, ptr [[TMP19]], i64 [[TMP24]]188; CHECK-FORCED-NEXT: [[TMP26:%.*]] = load i32, ptr [[TMP25]], align 4189; CHECK-FORCED-NEXT: [[TMP27:%.*]] = icmp ne i32 [[TMP26]], [[TMP20]]190; CHECK-FORCED-NEXT: [[TMP28:%.*]] = icmp sge i32 [[TMP26]], [[TMP22]]191; CHECK-FORCED-NEXT: [[DOTNOT33:%.*]] = and i1 [[DOT045]], [[TMP28]]192; CHECK-FORCED-NEXT: [[OR_COND:%.*]] = select i1 [[TMP27]], i1 true, i1 [[DOTNOT33]]193; CHECK-FORCED-NEXT: [[OR_COND_FROZEN:%.*]] = freeze i1 [[OR_COND]]194; CHECK-FORCED-NEXT: br i1 [[OR_COND_FROZEN]], label [[SELECT_END]], label [[SELECT_FALSE:%.*]]195; CHECK-FORCED: select.false:196; CHECK-FORCED-NEXT: br label [[SELECT_END]]197; CHECK-FORCED: select.end:198; CHECK-FORCED-NEXT: [[TMP29]] = phi i32 [ [[DOTLCSSA364144]], [[DOTPREHEADER35]] ], [ 1, [[SELECT_FALSE]] ]199; CHECK-FORCED-NEXT: [[DOT2]] = phi i1 [ [[DOT045]], [[DOTPREHEADER35]] ], [ true, [[SELECT_FALSE]] ]200; CHECK-FORCED-NEXT: [[TMP30]] = phi i32 [ [[TMP22]], [[DOTPREHEADER35]] ], [ [[TMP20]], [[SELECT_FALSE]] ]201; CHECK-FORCED-NEXT: [[NOT_OR_COND:%.*]] = xor i1 [[OR_COND]], true202; CHECK-FORCED-NEXT: [[IV_N]] = add nuw nsw i64 [[TMP23]], 1203; CHECK-FORCED-NEXT: [[EXITCOND_NOT:%.*]] = icmp eq i64 [[IV_N]], [[TMP9]]204; CHECK-FORCED-NEXT: br i1 [[EXITCOND_NOT]], label [[DOTPREHEADER]], label [[DOTPREHEADER35]]205; CHECK-FORCED: .preheader:206; CHECK-FORCED-NEXT: [[DOTLCSSA3641_LCSSA:%.*]] = phi i32 [ 0, [[TMP3:%.*]] ], [ [[TMP29]], [[SELECT_END]] ]207; CHECK-FORCED-NEXT: [[P:%.*]] = phi i1 [ false, [[TMP3]] ], [ [[NOT_OR_COND]], [[SELECT_END]] ]208; CHECK-FORCED-NEXT: [[Q:%.*]] = select i1 [[P]], i32 [[DOTLCSSA3641_LCSSA]], i32 1209; CHECK-FORCED-NEXT: ret i32 [[Q]]210;211 %4 = getelementptr i8, ptr %0, i64 40212 %5 = load i64, ptr %4, align 8213 %6 = getelementptr i8, ptr %0, i64 64214 %7 = load i64, ptr %6, align 8215 %8 = getelementptr i8, ptr %0, i64 80216 %9 = load i64, ptr %8, align 8217 %10 = getelementptr i8, ptr %0, i64 88218 %11 = load i64, ptr %10, align 8219 %12 = load ptr, ptr %0, align 8220 %13 = load i32, ptr %1, align 4221 %14 = sext i32 %13 to i64222 %15 = add nsw i64 %14, -1223 %16 = mul i64 %15, %5224 %17 = getelementptr i8, ptr %12, i64 %16225 %18 = shl i64 %7, 3226 %19 = getelementptr i8, ptr %17, i64 %18227 %20 = load i32, ptr %2, align 4228 %.not = icmp slt i64 %9, 1229 br i1 %.not, label %.preheader, label %.preheader35.lr.ph230 231.preheader35.lr.ph: ; preds = %3232 %21 = sub i64 0, %7233 br label %.preheader35234 235.preheader35: ; preds = %.preheader35.lr.ph, %.preheader35236 %22 = phi i32 [ 2147483647, %.preheader35.lr.ph ], [ %30, %.preheader35 ]237 %23 = phi i64 [ 0, %.preheader35.lr.ph ], [ %iv.n, %.preheader35 ]238 %.045 = phi i1 [ false, %.preheader35.lr.ph ], [ %.2, %.preheader35 ]239 %.lcssa364144 = phi i32 [ 0, %.preheader35.lr.ph ], [ %29, %.preheader35 ]240 %24 = mul nsw i64 %23, %11241 %25 = getelementptr i8, ptr %19, i64 %24242 %26 = load i32, ptr %25, align 4243 %27 = icmp ne i32 %26, %20244 %28 = icmp sge i32 %26, %22245 %.not33 = and i1 %.045, %28246 %or.cond = select i1 %27, i1 true, i1 %.not33247 %29 = select i1 %or.cond, i32 %.lcssa364144, i32 1248 %.2 = select i1 %or.cond, i1 %.045, i1 true249 %not.or.cond = xor i1 %or.cond, true250 %30 = select i1 %or.cond, i32 %22, i32 %20251 %iv.n = add nuw nsw i64 %23, 1252 %exitcond.not = icmp eq i64 %iv.n, %9253 br i1 %exitcond.not, label %.preheader, label %.preheader35254 255.preheader: ; preds = %.preheader35, %3256 %.lcssa3641.lcssa = phi i32 [ 0, %3 ], [ %29, %.preheader35 ]257 %p = phi i1 [ false, %3 ], [ %not.or.cond, %.preheader35 ]258 %q = select i1 %p, i32 %.lcssa3641.lcssa, i32 1259 ret i32 %q260}261 262define i32 @minloc1_twonot(ptr nocapture readonly %0, ptr nocapture readonly %1, ptr nocapture readonly %2) {263; CHECK-LABEL: @minloc1_twonot(264; CHECK-NEXT: [[TMP4:%.*]] = getelementptr i8, ptr [[TMP0:%.*]], i64 40265; CHECK-NEXT: [[TMP5:%.*]] = load i64, ptr [[TMP4]], align 8266; CHECK-NEXT: [[TMP6:%.*]] = getelementptr i8, ptr [[TMP0]], i64 64267; CHECK-NEXT: [[TMP7:%.*]] = load i64, ptr [[TMP6]], align 8268; CHECK-NEXT: [[TMP8:%.*]] = getelementptr i8, ptr [[TMP0]], i64 80269; CHECK-NEXT: [[TMP9:%.*]] = load i64, ptr [[TMP8]], align 8270; CHECK-NEXT: [[TMP10:%.*]] = getelementptr i8, ptr [[TMP0]], i64 88271; CHECK-NEXT: [[TMP11:%.*]] = load i64, ptr [[TMP10]], align 8272; CHECK-NEXT: [[TMP12:%.*]] = load ptr, ptr [[TMP0]], align 8273; CHECK-NEXT: [[TMP13:%.*]] = load i32, ptr [[TMP1:%.*]], align 4274; CHECK-NEXT: [[TMP14:%.*]] = sext i32 [[TMP13]] to i64275; CHECK-NEXT: [[TMP15:%.*]] = add nsw i64 [[TMP14]], -1276; CHECK-NEXT: [[TMP16:%.*]] = mul i64 [[TMP15]], [[TMP5]]277; CHECK-NEXT: [[TMP17:%.*]] = getelementptr i8, ptr [[TMP12]], i64 [[TMP16]]278; CHECK-NEXT: [[TMP18:%.*]] = shl i64 [[TMP7]], 3279; CHECK-NEXT: [[TMP19:%.*]] = getelementptr i8, ptr [[TMP17]], i64 [[TMP18]]280; CHECK-NEXT: [[TMP20:%.*]] = load i32, ptr [[TMP2:%.*]], align 4281; CHECK-NEXT: [[DOTNOT:%.*]] = icmp slt i64 [[TMP9]], 1282; CHECK-NEXT: br i1 [[DOTNOT]], label [[DOTPREHEADER:%.*]], label [[DOTPREHEADER35_LR_PH:%.*]]283; CHECK: .preheader35.lr.ph:284; CHECK-NEXT: [[TMP21:%.*]] = sub i64 0, [[TMP7]]285; CHECK-NEXT: br label [[DOTPREHEADER35:%.*]]286; CHECK: .preheader35:287; CHECK-NEXT: [[TMP22:%.*]] = phi i32 [ 2147483647, [[DOTPREHEADER35_LR_PH]] ], [ [[TMP30:%.*]], [[SELECT_END:%.*]] ]288; CHECK-NEXT: [[TMP23:%.*]] = phi i64 [ 0, [[DOTPREHEADER35_LR_PH]] ], [ [[IV_N:%.*]], [[SELECT_END]] ]289; CHECK-NEXT: [[DOT045:%.*]] = phi i1 [ false, [[DOTPREHEADER35_LR_PH]] ], [ [[DOT3:%.*]], [[SELECT_END]] ]290; CHECK-NEXT: [[DOTLCSSA364144:%.*]] = phi i32 [ 0, [[DOTPREHEADER35_LR_PH]] ], [ [[TMP29:%.*]], [[SELECT_END]] ]291; CHECK-NEXT: [[TMP24:%.*]] = mul nsw i64 [[TMP23]], [[TMP11]]292; CHECK-NEXT: [[TMP25:%.*]] = getelementptr i8, ptr [[TMP19]], i64 [[TMP24]]293; CHECK-NEXT: [[TMP26:%.*]] = load i32, ptr [[TMP25]], align 4294; CHECK-NEXT: [[TMP27:%.*]] = icmp ne i32 [[TMP26]], [[TMP20]]295; CHECK-NEXT: [[TMP28:%.*]] = icmp sge i32 [[TMP26]], [[TMP22]]296; CHECK-NEXT: [[DOTNOT33:%.*]] = and i1 [[DOT045]], [[TMP28]]297; CHECK-NEXT: [[OR_COND:%.*]] = select i1 [[TMP27]], i1 true, i1 [[DOTNOT33]]298; CHECK-NEXT: [[OR_COND_FROZEN:%.*]] = freeze i1 [[OR_COND]]299; CHECK-NEXT: br i1 [[OR_COND_FROZEN]], label [[SELECT_END]], label [[SELECT_FALSE:%.*]]300; CHECK: select.false:301; CHECK-NEXT: br label [[SELECT_END]]302; CHECK: select.end:303; CHECK-NEXT: [[TMP29]] = phi i32 [ [[DOTLCSSA364144]], [[DOTPREHEADER35]] ], [ 1, [[SELECT_FALSE]] ]304; CHECK-NEXT: [[DOT2:%.*]] = phi i1 [ [[DOT045]], [[DOTPREHEADER35]] ], [ true, [[SELECT_FALSE]] ]305; CHECK-NEXT: [[DOT3]] = phi i1 [ [[DOT045]], [[DOTPREHEADER35]] ], [ true, [[SELECT_FALSE]] ]306; CHECK-NEXT: [[TMP30]] = phi i32 [ [[TMP22]], [[DOTPREHEADER35]] ], [ [[TMP20]], [[SELECT_FALSE]] ]307; CHECK-NEXT: [[NOT_OR_COND:%.*]] = xor i1 [[OR_COND]], true308; CHECK-NEXT: [[IV_N]] = add nuw nsw i64 [[TMP23]], 1309; CHECK-NEXT: [[EXITCOND_NOT:%.*]] = icmp eq i64 [[IV_N]], [[TMP9]]310; CHECK-NEXT: br i1 [[EXITCOND_NOT]], label [[DOTPREHEADER]], label [[DOTPREHEADER35]]311; CHECK: .preheader:312; CHECK-NEXT: [[DOTLCSSA3641_LCSSA:%.*]] = phi i32 [ 0, [[TMP3:%.*]] ], [ [[TMP29]], [[SELECT_END]] ]313; CHECK-NEXT: ret i32 [[DOTLCSSA3641_LCSSA]]314;315 %4 = getelementptr i8, ptr %0, i64 40316 %5 = load i64, ptr %4, align 8317 %6 = getelementptr i8, ptr %0, i64 64318 %7 = load i64, ptr %6, align 8319 %8 = getelementptr i8, ptr %0, i64 80320 %9 = load i64, ptr %8, align 8321 %10 = getelementptr i8, ptr %0, i64 88322 %11 = load i64, ptr %10, align 8323 %12 = load ptr, ptr %0, align 8324 %13 = load i32, ptr %1, align 4325 %14 = sext i32 %13 to i64326 %15 = add nsw i64 %14, -1327 %16 = mul i64 %15, %5328 %17 = getelementptr i8, ptr %12, i64 %16329 %18 = shl i64 %7, 3330 %19 = getelementptr i8, ptr %17, i64 %18331 %20 = load i32, ptr %2, align 4332 %.not = icmp slt i64 %9, 1333 br i1 %.not, label %.preheader, label %.preheader35.lr.ph334 335.preheader35.lr.ph: ; preds = %3336 %21 = sub i64 0, %7337 br label %.preheader35338 339.preheader35: ; preds = %.preheader35.lr.ph, %.preheader35340 %22 = phi i32 [ 2147483647, %.preheader35.lr.ph ], [ %30, %.preheader35 ]341 %23 = phi i64 [ 0, %.preheader35.lr.ph ], [ %iv.n, %.preheader35 ]342 %.045 = phi i1 [ false, %.preheader35.lr.ph ], [ %.3, %.preheader35 ]343 %.lcssa364144 = phi i32 [ 0, %.preheader35.lr.ph ], [ %29, %.preheader35 ]344 %24 = mul nsw i64 %23, %11345 %25 = getelementptr i8, ptr %19, i64 %24346 %26 = load i32, ptr %25, align 4347 %27 = icmp ne i32 %26, %20348 %28 = icmp sge i32 %26, %22349 %.not33 = and i1 %.045, %28350 %or.cond = select i1 %27, i1 true, i1 %.not33351 %29 = select i1 %or.cond, i32 %.lcssa364144, i32 1352 %not.or.cond = xor i1 %or.cond, true353 %.2 = select i1 %not.or.cond, i1 true, i1 %.045354 %.3 = select i1 %not.or.cond, i1 true, i1 %.2355 %30 = select i1 %or.cond, i32 %22, i32 %20356 %iv.n = add nuw nsw i64 %23, 1357 %exitcond.not = icmp eq i64 %iv.n, %9358 br i1 %exitcond.not, label %.preheader, label %.preheader35359 360.preheader: ; preds = %.preheader35, %3361 %.lcssa3641.lcssa = phi i32 [ 0, %3 ], [ %29, %.preheader35 ]362 ret i32 %.lcssa3641.lcssa363}364 365define i32 @minloc1_onenotdependent(ptr nocapture readonly %0, ptr nocapture readonly %1, ptr nocapture readonly %2) {366; CHECK-LABEL: @minloc1_onenotdependent(367; CHECK-NEXT: [[TMP4:%.*]] = getelementptr i8, ptr [[TMP0:%.*]], i64 40368; CHECK-NEXT: [[TMP5:%.*]] = load i64, ptr [[TMP4]], align 8369; CHECK-NEXT: [[TMP6:%.*]] = getelementptr i8, ptr [[TMP0]], i64 64370; CHECK-NEXT: [[TMP7:%.*]] = load i64, ptr [[TMP6]], align 8371; CHECK-NEXT: [[TMP8:%.*]] = getelementptr i8, ptr [[TMP0]], i64 80372; CHECK-NEXT: [[TMP9:%.*]] = load i64, ptr [[TMP8]], align 8373; CHECK-NEXT: [[TMP10:%.*]] = getelementptr i8, ptr [[TMP0]], i64 88374; CHECK-NEXT: [[TMP11:%.*]] = load i64, ptr [[TMP10]], align 8375; CHECK-NEXT: [[TMP12:%.*]] = load ptr, ptr [[TMP0]], align 8376; CHECK-NEXT: [[TMP13:%.*]] = load i32, ptr [[TMP1:%.*]], align 4377; CHECK-NEXT: [[TMP14:%.*]] = sext i32 [[TMP13]] to i64378; CHECK-NEXT: [[TMP15:%.*]] = add nsw i64 [[TMP14]], -1379; CHECK-NEXT: [[TMP16:%.*]] = mul i64 [[TMP15]], [[TMP5]]380; CHECK-NEXT: [[TMP17:%.*]] = getelementptr i8, ptr [[TMP12]], i64 [[TMP16]]381; CHECK-NEXT: [[TMP18:%.*]] = shl i64 [[TMP7]], 3382; CHECK-NEXT: [[TMP19:%.*]] = getelementptr i8, ptr [[TMP17]], i64 [[TMP18]]383; CHECK-NEXT: [[TMP20:%.*]] = load i32, ptr [[TMP2:%.*]], align 4384; CHECK-NEXT: [[DOTNOT:%.*]] = icmp slt i64 [[TMP9]], 1385; CHECK-NEXT: br i1 [[DOTNOT]], label [[DOTPREHEADER:%.*]], label [[DOTPREHEADER35_LR_PH:%.*]]386; CHECK: .preheader35.lr.ph:387; CHECK-NEXT: [[TMP21:%.*]] = sub i64 0, [[TMP7]]388; CHECK-NEXT: br label [[DOTPREHEADER35:%.*]]389; CHECK: .preheader35:390; CHECK-NEXT: [[TMP22:%.*]] = phi i32 [ 2147483647, [[DOTPREHEADER35_LR_PH]] ], [ [[TMP30:%.*]], [[SELECT_END:%.*]] ]391; CHECK-NEXT: [[TMP23:%.*]] = phi i64 [ 0, [[DOTPREHEADER35_LR_PH]] ], [ [[IV_N:%.*]], [[SELECT_END]] ]392; CHECK-NEXT: [[DOT045:%.*]] = phi i1 [ false, [[DOTPREHEADER35_LR_PH]] ], [ [[DOT3:%.*]], [[SELECT_END]] ]393; CHECK-NEXT: [[DOTLCSSA364144:%.*]] = phi i32 [ 0, [[DOTPREHEADER35_LR_PH]] ], [ [[TMP29:%.*]], [[SELECT_END]] ]394; CHECK-NEXT: [[TMP24:%.*]] = mul nsw i64 [[TMP23]], [[TMP11]]395; CHECK-NEXT: [[TMP25:%.*]] = getelementptr i8, ptr [[TMP19]], i64 [[TMP24]]396; CHECK-NEXT: [[TMP26:%.*]] = load i32, ptr [[TMP25]], align 4397; CHECK-NEXT: [[TMP27:%.*]] = icmp ne i32 [[TMP26]], [[TMP20]]398; CHECK-NEXT: [[TMP28:%.*]] = icmp sge i32 [[TMP26]], [[TMP22]]399; CHECK-NEXT: [[DOTNOT33:%.*]] = and i1 [[DOT045]], [[TMP28]]400; CHECK-NEXT: [[OR_COND:%.*]] = select i1 [[TMP27]], i1 true, i1 [[DOTNOT33]]401; CHECK-NEXT: [[OR_COND_FROZEN:%.*]] = freeze i1 [[OR_COND]]402; CHECK-NEXT: br i1 [[OR_COND_FROZEN]], label [[SELECT_END]], label [[SELECT_FALSE:%.*]]403; CHECK: select.false:404; CHECK-NEXT: br label [[SELECT_END]]405; CHECK: select.end:406; CHECK-NEXT: [[TMP29]] = phi i32 [ [[DOTLCSSA364144]], [[DOTPREHEADER35]] ], [ 1, [[SELECT_FALSE]] ]407; CHECK-NEXT: [[DOT2:%.*]] = phi i1 [ true, [[DOTPREHEADER35]] ], [ [[DOT045]], [[SELECT_FALSE]] ]408; CHECK-NEXT: [[DOT3]] = phi i1 [ true, [[DOTPREHEADER35]] ], [ true, [[SELECT_FALSE]] ]409; CHECK-NEXT: [[TMP30]] = phi i32 [ [[TMP22]], [[DOTPREHEADER35]] ], [ [[TMP20]], [[SELECT_FALSE]] ]410; CHECK-NEXT: [[NOT_OR_COND:%.*]] = xor i1 [[OR_COND]], true411; CHECK-NEXT: [[IV_N]] = add nuw nsw i64 [[TMP23]], 1412; CHECK-NEXT: [[EXITCOND_NOT:%.*]] = icmp eq i64 [[IV_N]], [[TMP9]]413; CHECK-NEXT: br i1 [[EXITCOND_NOT]], label [[DOTPREHEADER]], label [[DOTPREHEADER35]]414; CHECK: .preheader:415; CHECK-NEXT: [[DOTLCSSA3641_LCSSA:%.*]] = phi i32 [ 0, [[TMP3:%.*]] ], [ [[TMP29]], [[SELECT_END]] ]416; CHECK-NEXT: ret i32 [[DOTLCSSA3641_LCSSA]]417;418 %4 = getelementptr i8, ptr %0, i64 40419 %5 = load i64, ptr %4, align 8420 %6 = getelementptr i8, ptr %0, i64 64421 %7 = load i64, ptr %6, align 8422 %8 = getelementptr i8, ptr %0, i64 80423 %9 = load i64, ptr %8, align 8424 %10 = getelementptr i8, ptr %0, i64 88425 %11 = load i64, ptr %10, align 8426 %12 = load ptr, ptr %0, align 8427 %13 = load i32, ptr %1, align 4428 %14 = sext i32 %13 to i64429 %15 = add nsw i64 %14, -1430 %16 = mul i64 %15, %5431 %17 = getelementptr i8, ptr %12, i64 %16432 %18 = shl i64 %7, 3433 %19 = getelementptr i8, ptr %17, i64 %18434 %20 = load i32, ptr %2, align 4435 %.not = icmp slt i64 %9, 1436 br i1 %.not, label %.preheader, label %.preheader35.lr.ph437 438.preheader35.lr.ph: ; preds = %3439 %21 = sub i64 0, %7440 br label %.preheader35441 442.preheader35: ; preds = %.preheader35.lr.ph, %.preheader35443 %22 = phi i32 [ 2147483647, %.preheader35.lr.ph ], [ %30, %.preheader35 ]444 %23 = phi i64 [ 0, %.preheader35.lr.ph ], [ %iv.n, %.preheader35 ]445 %.045 = phi i1 [ false, %.preheader35.lr.ph ], [ %.3, %.preheader35 ]446 %.lcssa364144 = phi i32 [ 0, %.preheader35.lr.ph ], [ %29, %.preheader35 ]447 %24 = mul nsw i64 %23, %11448 %25 = getelementptr i8, ptr %19, i64 %24449 %26 = load i32, ptr %25, align 4450 %27 = icmp ne i32 %26, %20451 %28 = icmp sge i32 %26, %22452 %.not33 = and i1 %.045, %28453 %or.cond = select i1 %27, i1 true, i1 %.not33454 %29 = select i1 %or.cond, i32 %.lcssa364144, i32 1455 %not.or.cond = xor i1 %or.cond, true456 %.2 = select i1 %or.cond, i1 true, i1 %.045457 %.3 = select i1 %not.or.cond, i1 true, i1 %.2458 %30 = select i1 %or.cond, i32 %22, i32 %20459 %iv.n = add nuw nsw i64 %23, 1460 %exitcond.not = icmp eq i64 %iv.n, %9461 br i1 %exitcond.not, label %.preheader, label %.preheader35462 463.preheader: ; preds = %.preheader35, %3464 %.lcssa3641.lcssa = phi i32 [ 0, %3 ], [ %29, %.preheader35 ]465 ret i32 %.lcssa3641.lcssa466}467 468 469define i32 @minloc9(ptr nocapture readonly %0, ptr nocapture readonly %1, ptr nocapture readonly %2) {470; CHECK-LABEL: @minloc9(471; CHECK-NEXT: [[TMP4:%.*]] = getelementptr i8, ptr [[TMP0:%.*]], i64 40472; CHECK-NEXT: [[TMP5:%.*]] = load i64, ptr [[TMP4]], align 8473; CHECK-NEXT: [[TMP6:%.*]] = getelementptr i8, ptr [[TMP0]], i64 64474; CHECK-NEXT: [[TMP7:%.*]] = load i64, ptr [[TMP6]], align 8475; CHECK-NEXT: [[TMP8:%.*]] = getelementptr i8, ptr [[TMP0]], i64 80476; CHECK-NEXT: [[TMP9:%.*]] = load i64, ptr [[TMP8]], align 8477; CHECK-NEXT: [[TMP10:%.*]] = getelementptr i8, ptr [[TMP0]], i64 88478; CHECK-NEXT: [[TMP11:%.*]] = load i64, ptr [[TMP10]], align 8479; CHECK-NEXT: [[TMP12:%.*]] = load ptr, ptr [[TMP0]], align 8480; CHECK-NEXT: [[TMP13:%.*]] = load i32, ptr [[TMP1:%.*]], align 4481; CHECK-NEXT: [[TMP14:%.*]] = sext i32 [[TMP13]] to i64482; CHECK-NEXT: [[TMP15:%.*]] = add nsw i64 [[TMP14]], -1483; CHECK-NEXT: [[TMP16:%.*]] = mul i64 [[TMP15]], [[TMP5]]484; CHECK-NEXT: [[TMP17:%.*]] = getelementptr i8, ptr [[TMP12]], i64 [[TMP16]]485; CHECK-NEXT: [[TMP18:%.*]] = shl i64 [[TMP7]], 3486; CHECK-NEXT: [[TMP19:%.*]] = getelementptr i8, ptr [[TMP17]], i64 [[TMP18]]487; CHECK-NEXT: [[TMP20:%.*]] = load i32, ptr [[TMP2:%.*]], align 4488; CHECK-NEXT: [[DOTNOT:%.*]] = icmp slt i64 [[TMP9]], 1489; CHECK-NEXT: br i1 [[DOTNOT]], label [[DOTPREHEADER:%.*]], label [[DOTPREHEADER35_LR_PH:%.*]]490; CHECK: .preheader35.lr.ph:491; CHECK-NEXT: [[TMP21:%.*]] = sub i64 0, [[TMP7]]492; CHECK-NEXT: [[DOTNEG:%.*]] = mul i64 [[TMP7]], -2493; CHECK-NEXT: [[DOTNEG50:%.*]] = mul i64 [[TMP7]], -3494; CHECK-NEXT: [[DOTNEG51:%.*]] = mul i64 [[TMP7]], -4495; CHECK-NEXT: [[DOTNEG52:%.*]] = mul i64 [[TMP7]], -5496; CHECK-NEXT: [[DOTNEG53:%.*]] = mul i64 [[TMP7]], -6497; CHECK-NEXT: [[DOTNEG54:%.*]] = mul i64 [[TMP7]], -7498; CHECK-NEXT: [[DOTNEG55:%.*]] = mul i64 [[TMP7]], -8499; CHECK-NEXT: br label [[DOTPREHEADER35:%.*]]500; CHECK: .preheader35:501; CHECK-NEXT: [[TMP22:%.*]] = phi i32 [ 2147483647, [[DOTPREHEADER35_LR_PH]] ], [ [[TMP78:%.*]], [[SELECT_END15:%.*]] ]502; CHECK-NEXT: [[TMP23:%.*]] = phi i64 [ 0, [[DOTPREHEADER35_LR_PH]] ], [ [[TMP79:%.*]], [[SELECT_END15]] ]503; CHECK-NEXT: [[DOT045:%.*]] = phi i1 [ false, [[DOTPREHEADER35_LR_PH]] ], [ [[DOT2_8:%.*]], [[SELECT_END15]] ]504; CHECK-NEXT: [[DOTLCSSA364144:%.*]] = phi i32 [ 0, [[DOTPREHEADER35_LR_PH]] ], [ [[TMP77:%.*]], [[SELECT_END15]] ]505; CHECK-NEXT: [[TMP24:%.*]] = mul nsw i64 [[TMP23]], [[TMP11]]506; CHECK-NEXT: [[TMP25:%.*]] = getelementptr i8, ptr [[TMP19]], i64 [[TMP24]]507; CHECK-NEXT: [[TMP26:%.*]] = load i32, ptr [[TMP25]], align 4508; CHECK-NEXT: [[TMP27:%.*]] = icmp ne i32 [[TMP26]], [[TMP20]]509; CHECK-NEXT: [[TMP28:%.*]] = icmp sge i32 [[TMP26]], [[TMP22]]510; CHECK-NEXT: [[DOTNOT33:%.*]] = and i1 [[DOT045]], [[TMP28]]511; CHECK-NEXT: [[OR_COND:%.*]] = select i1 [[TMP27]], i1 true, i1 [[DOTNOT33]]512; CHECK-NEXT: [[OR_COND_FROZEN:%.*]] = freeze i1 [[OR_COND]]513; CHECK-NEXT: br i1 [[OR_COND_FROZEN]], label [[SELECT_END:%.*]], label [[SELECT_FALSE:%.*]]514; CHECK: select.false:515; CHECK-NEXT: br label [[SELECT_END]]516; CHECK: select.end:517; CHECK-NEXT: [[TMP29:%.*]] = phi i32 [ [[DOTLCSSA364144]], [[DOTPREHEADER35]] ], [ 1, [[SELECT_FALSE]] ]518; CHECK-NEXT: [[DOT2:%.*]] = phi i1 [ [[DOT045]], [[DOTPREHEADER35]] ], [ true, [[SELECT_FALSE]] ]519; CHECK-NEXT: [[TMP30:%.*]] = phi i32 [ [[TMP22]], [[DOTPREHEADER35]] ], [ [[TMP20]], [[SELECT_FALSE]] ]520; CHECK-NEXT: [[NOT_OR_COND:%.*]] = xor i1 [[OR_COND]], true521; CHECK-NEXT: [[TMP31:%.*]] = getelementptr i8, ptr [[TMP25]], i64 [[TMP21]]522; CHECK-NEXT: [[TMP32:%.*]] = load i32, ptr [[TMP31]], align 4523; CHECK-NEXT: [[TMP33:%.*]] = icmp ne i32 [[TMP32]], [[TMP20]]524; CHECK-NEXT: [[TMP34:%.*]] = icmp sge i32 [[TMP32]], [[TMP30]]525; CHECK-NEXT: [[DOTNOT33_1:%.*]] = and i1 [[DOT2]], [[TMP34]]526; CHECK-NEXT: [[OR_COND_1:%.*]] = select i1 [[TMP33]], i1 true, i1 [[DOTNOT33_1]]527; CHECK-NEXT: [[OR_COND_1_FROZEN:%.*]] = freeze i1 [[OR_COND_1]]528; CHECK-NEXT: br i1 [[OR_COND_1_FROZEN]], label [[SELECT_END1:%.*]], label [[SELECT_FALSE2:%.*]]529; CHECK: select.false2:530; CHECK-NEXT: br label [[SELECT_END1]]531; CHECK: select.end1:532; CHECK-NEXT: [[TMP35:%.*]] = phi i32 [ [[TMP29]], [[SELECT_END]] ], [ 2, [[SELECT_FALSE2]] ]533; CHECK-NEXT: [[DOT2_1:%.*]] = phi i1 [ [[DOT2]], [[SELECT_END]] ], [ true, [[SELECT_FALSE2]] ]534; CHECK-NEXT: [[TMP36:%.*]] = phi i32 [ [[TMP30]], [[SELECT_END]] ], [ [[TMP20]], [[SELECT_FALSE2]] ]535; CHECK-NEXT: [[NOT_OR_COND_1:%.*]] = xor i1 [[OR_COND_1]], true536; CHECK-NEXT: [[TMP37:%.*]] = getelementptr i8, ptr [[TMP25]], i64 [[DOTNEG]]537; CHECK-NEXT: [[TMP38:%.*]] = load i32, ptr [[TMP37]], align 4538; CHECK-NEXT: [[TMP39:%.*]] = icmp ne i32 [[TMP38]], [[TMP20]]539; CHECK-NEXT: [[TMP40:%.*]] = icmp sge i32 [[TMP38]], [[TMP36]]540; CHECK-NEXT: [[DOTNOT33_2:%.*]] = and i1 [[DOT2_1]], [[TMP40]]541; CHECK-NEXT: [[OR_COND_2:%.*]] = select i1 [[TMP39]], i1 true, i1 [[DOTNOT33_2]]542; CHECK-NEXT: [[OR_COND_2_FROZEN:%.*]] = freeze i1 [[OR_COND_2]]543; CHECK-NEXT: br i1 [[OR_COND_2_FROZEN]], label [[SELECT_END3:%.*]], label [[SELECT_FALSE4:%.*]]544; CHECK: select.false4:545; CHECK-NEXT: br label [[SELECT_END3]]546; CHECK: select.end3:547; CHECK-NEXT: [[TMP41:%.*]] = phi i32 [ [[TMP35]], [[SELECT_END1]] ], [ 3, [[SELECT_FALSE4]] ]548; CHECK-NEXT: [[DOT2_2:%.*]] = phi i1 [ [[DOT2_1]], [[SELECT_END1]] ], [ true, [[SELECT_FALSE4]] ]549; CHECK-NEXT: [[TMP42:%.*]] = phi i32 [ [[TMP36]], [[SELECT_END1]] ], [ [[TMP20]], [[SELECT_FALSE4]] ]550; CHECK-NEXT: [[NOT_OR_COND_2:%.*]] = xor i1 [[OR_COND_2]], true551; CHECK-NEXT: [[TMP43:%.*]] = getelementptr i8, ptr [[TMP25]], i64 [[DOTNEG50]]552; CHECK-NEXT: [[TMP44:%.*]] = load i32, ptr [[TMP43]], align 4553; CHECK-NEXT: [[TMP45:%.*]] = icmp ne i32 [[TMP44]], [[TMP20]]554; CHECK-NEXT: [[TMP46:%.*]] = icmp sge i32 [[TMP44]], [[TMP42]]555; CHECK-NEXT: [[DOTNOT33_3:%.*]] = and i1 [[DOT2_2]], [[TMP46]]556; CHECK-NEXT: [[OR_COND_3:%.*]] = select i1 [[TMP45]], i1 true, i1 [[DOTNOT33_3]]557; CHECK-NEXT: [[OR_COND_3_FROZEN:%.*]] = freeze i1 [[OR_COND_3]]558; CHECK-NEXT: br i1 [[OR_COND_3_FROZEN]], label [[SELECT_END5:%.*]], label [[SELECT_FALSE6:%.*]]559; CHECK: select.false6:560; CHECK-NEXT: br label [[SELECT_END5]]561; CHECK: select.end5:562; CHECK-NEXT: [[TMP47:%.*]] = phi i32 [ [[TMP41]], [[SELECT_END3]] ], [ 4, [[SELECT_FALSE6]] ]563; CHECK-NEXT: [[DOT2_3:%.*]] = phi i1 [ [[DOT2_2]], [[SELECT_END3]] ], [ true, [[SELECT_FALSE6]] ]564; CHECK-NEXT: [[TMP48:%.*]] = phi i32 [ [[TMP42]], [[SELECT_END3]] ], [ [[TMP20]], [[SELECT_FALSE6]] ]565; CHECK-NEXT: [[NOT_OR_COND_3:%.*]] = xor i1 [[OR_COND_3]], true566; CHECK-NEXT: [[TMP49:%.*]] = getelementptr i8, ptr [[TMP25]], i64 [[DOTNEG51]]567; CHECK-NEXT: [[TMP50:%.*]] = load i32, ptr [[TMP49]], align 4568; CHECK-NEXT: [[TMP51:%.*]] = icmp ne i32 [[TMP50]], [[TMP20]]569; CHECK-NEXT: [[TMP52:%.*]] = icmp sge i32 [[TMP50]], [[TMP48]]570; CHECK-NEXT: [[DOTNOT33_4:%.*]] = and i1 [[DOT2_3]], [[TMP52]]571; CHECK-NEXT: [[OR_COND_4:%.*]] = select i1 [[TMP51]], i1 true, i1 [[DOTNOT33_4]]572; CHECK-NEXT: [[OR_COND_4_FROZEN:%.*]] = freeze i1 [[OR_COND_4]]573; CHECK-NEXT: br i1 [[OR_COND_4_FROZEN]], label [[SELECT_END7:%.*]], label [[SELECT_FALSE8:%.*]]574; CHECK: select.false8:575; CHECK-NEXT: br label [[SELECT_END7]]576; CHECK: select.end7:577; CHECK-NEXT: [[TMP53:%.*]] = phi i32 [ [[TMP47]], [[SELECT_END5]] ], [ 5, [[SELECT_FALSE8]] ]578; CHECK-NEXT: [[DOT2_4:%.*]] = phi i1 [ [[DOT2_3]], [[SELECT_END5]] ], [ true, [[SELECT_FALSE8]] ]579; CHECK-NEXT: [[TMP54:%.*]] = phi i32 [ [[TMP48]], [[SELECT_END5]] ], [ [[TMP20]], [[SELECT_FALSE8]] ]580; CHECK-NEXT: [[NOT_OR_COND_4:%.*]] = xor i1 [[OR_COND_4]], true581; CHECK-NEXT: [[TMP55:%.*]] = getelementptr i8, ptr [[TMP25]], i64 [[DOTNEG52]]582; CHECK-NEXT: [[TMP56:%.*]] = load i32, ptr [[TMP55]], align 4583; CHECK-NEXT: [[TMP57:%.*]] = icmp ne i32 [[TMP56]], [[TMP20]]584; CHECK-NEXT: [[TMP58:%.*]] = icmp sge i32 [[TMP56]], [[TMP54]]585; CHECK-NEXT: [[DOTNOT33_5:%.*]] = and i1 [[DOT2_4]], [[TMP58]]586; CHECK-NEXT: [[OR_COND_5:%.*]] = select i1 [[TMP57]], i1 true, i1 [[DOTNOT33_5]]587; CHECK-NEXT: [[OR_COND_5_FROZEN:%.*]] = freeze i1 [[OR_COND_5]]588; CHECK-NEXT: br i1 [[OR_COND_5_FROZEN]], label [[SELECT_END9:%.*]], label [[SELECT_FALSE10:%.*]]589; CHECK: select.false10:590; CHECK-NEXT: br label [[SELECT_END9]]591; CHECK: select.end9:592; CHECK-NEXT: [[TMP59:%.*]] = phi i32 [ [[TMP53]], [[SELECT_END7]] ], [ 6, [[SELECT_FALSE10]] ]593; CHECK-NEXT: [[DOT2_5:%.*]] = phi i1 [ [[DOT2_4]], [[SELECT_END7]] ], [ true, [[SELECT_FALSE10]] ]594; CHECK-NEXT: [[TMP60:%.*]] = phi i32 [ [[TMP54]], [[SELECT_END7]] ], [ [[TMP20]], [[SELECT_FALSE10]] ]595; CHECK-NEXT: [[NOT_OR_COND_5:%.*]] = xor i1 [[OR_COND_5]], true596; CHECK-NEXT: [[TMP61:%.*]] = getelementptr i8, ptr [[TMP25]], i64 [[DOTNEG53]]597; CHECK-NEXT: [[TMP62:%.*]] = load i32, ptr [[TMP61]], align 4598; CHECK-NEXT: [[TMP63:%.*]] = icmp ne i32 [[TMP62]], [[TMP20]]599; CHECK-NEXT: [[TMP64:%.*]] = icmp sge i32 [[TMP62]], [[TMP60]]600; CHECK-NEXT: [[DOTNOT33_6:%.*]] = and i1 [[DOT2_5]], [[TMP64]]601; CHECK-NEXT: [[OR_COND_6:%.*]] = select i1 [[TMP63]], i1 true, i1 [[DOTNOT33_6]]602; CHECK-NEXT: [[OR_COND_6_FROZEN:%.*]] = freeze i1 [[OR_COND_6]]603; CHECK-NEXT: br i1 [[OR_COND_6_FROZEN]], label [[SELECT_END11:%.*]], label [[SELECT_FALSE12:%.*]]604; CHECK: select.false12:605; CHECK-NEXT: br label [[SELECT_END11]]606; CHECK: select.end11:607; CHECK-NEXT: [[TMP65:%.*]] = phi i32 [ [[TMP59]], [[SELECT_END9]] ], [ 7, [[SELECT_FALSE12]] ]608; CHECK-NEXT: [[DOT2_6:%.*]] = phi i1 [ [[DOT2_5]], [[SELECT_END9]] ], [ true, [[SELECT_FALSE12]] ]609; CHECK-NEXT: [[TMP66:%.*]] = phi i32 [ [[TMP60]], [[SELECT_END9]] ], [ [[TMP20]], [[SELECT_FALSE12]] ]610; CHECK-NEXT: [[NOT_OR_COND_6:%.*]] = xor i1 [[OR_COND_6]], true611; CHECK-NEXT: [[TMP67:%.*]] = getelementptr i8, ptr [[TMP25]], i64 [[DOTNEG54]]612; CHECK-NEXT: [[TMP68:%.*]] = load i32, ptr [[TMP67]], align 4613; CHECK-NEXT: [[TMP69:%.*]] = icmp ne i32 [[TMP68]], [[TMP20]]614; CHECK-NEXT: [[TMP70:%.*]] = icmp sge i32 [[TMP68]], [[TMP66]]615; CHECK-NEXT: [[DOTNOT33_7:%.*]] = and i1 [[DOT2_6]], [[TMP70]]616; CHECK-NEXT: [[OR_COND_7:%.*]] = select i1 [[TMP69]], i1 true, i1 [[DOTNOT33_7]]617; CHECK-NEXT: [[OR_COND_7_FROZEN:%.*]] = freeze i1 [[OR_COND_7]]618; CHECK-NEXT: br i1 [[OR_COND_7_FROZEN]], label [[SELECT_END13:%.*]], label [[SELECT_FALSE14:%.*]]619; CHECK: select.false14:620; CHECK-NEXT: br label [[SELECT_END13]]621; CHECK: select.end13:622; CHECK-NEXT: [[TMP71:%.*]] = phi i32 [ [[TMP65]], [[SELECT_END11]] ], [ 8, [[SELECT_FALSE14]] ]623; CHECK-NEXT: [[DOT2_7:%.*]] = phi i1 [ [[DOT2_6]], [[SELECT_END11]] ], [ true, [[SELECT_FALSE14]] ]624; CHECK-NEXT: [[TMP72:%.*]] = phi i32 [ [[TMP66]], [[SELECT_END11]] ], [ [[TMP20]], [[SELECT_FALSE14]] ]625; CHECK-NEXT: [[NOT_OR_COND_7:%.*]] = xor i1 [[OR_COND_7]], true626; CHECK-NEXT: [[TMP73:%.*]] = getelementptr i8, ptr [[TMP25]], i64 [[DOTNEG55]]627; CHECK-NEXT: [[TMP74:%.*]] = load i32, ptr [[TMP73]], align 4628; CHECK-NEXT: [[TMP75:%.*]] = icmp ne i32 [[TMP74]], [[TMP20]]629; CHECK-NEXT: [[TMP76:%.*]] = icmp sge i32 [[TMP74]], [[TMP72]]630; CHECK-NEXT: [[DOTNOT33_8:%.*]] = and i1 [[DOT2_7]], [[TMP76]]631; CHECK-NEXT: [[OR_COND_8:%.*]] = select i1 [[TMP75]], i1 true, i1 [[DOTNOT33_8]]632; CHECK-NEXT: [[OR_COND_8_FROZEN:%.*]] = freeze i1 [[OR_COND_8]]633; CHECK-NEXT: br i1 [[OR_COND_8_FROZEN]], label [[SELECT_END15]], label [[SELECT_FALSE16:%.*]]634; CHECK: select.false16:635; CHECK-NEXT: br label [[SELECT_END15]]636; CHECK: select.end15:637; CHECK-NEXT: [[TMP77]] = phi i32 [ [[TMP71]], [[SELECT_END13]] ], [ 9, [[SELECT_FALSE16]] ]638; CHECK-NEXT: [[DOT2_8]] = phi i1 [ [[DOT2_7]], [[SELECT_END13]] ], [ true, [[SELECT_FALSE16]] ]639; CHECK-NEXT: [[TMP78]] = phi i32 [ [[TMP72]], [[SELECT_END13]] ], [ [[TMP20]], [[SELECT_FALSE16]] ]640; CHECK-NEXT: [[NOT_OR_COND_8:%.*]] = xor i1 [[OR_COND_8]], true641; CHECK-NEXT: [[TMP79]] = add nuw nsw i64 [[TMP23]], 1642; CHECK-NEXT: [[EXITCOND_NOT:%.*]] = icmp eq i64 [[TMP79]], [[TMP9]]643; CHECK-NEXT: br i1 [[EXITCOND_NOT]], label [[DOTPREHEADER]], label [[DOTPREHEADER35]]644; CHECK: .preheader:645; CHECK-NEXT: [[DOTLCSSA3641_LCSSA:%.*]] = phi i32 [ 0, [[TMP3:%.*]] ], [ [[TMP77]], [[SELECT_END15]] ]646; CHECK-NEXT: ret i32 [[DOTLCSSA3641_LCSSA]]647;648 %4 = getelementptr i8, ptr %0, i64 40649 %5 = load i64, ptr %4, align 8650 %6 = getelementptr i8, ptr %0, i64 64651 %7 = load i64, ptr %6, align 8652 %8 = getelementptr i8, ptr %0, i64 80653 %9 = load i64, ptr %8, align 8654 %10 = getelementptr i8, ptr %0, i64 88655 %11 = load i64, ptr %10, align 8656 %12 = load ptr, ptr %0, align 8657 %13 = load i32, ptr %1, align 4658 %14 = sext i32 %13 to i64659 %15 = add nsw i64 %14, -1660 %16 = mul i64 %15, %5661 %17 = getelementptr i8, ptr %12, i64 %16662 %18 = shl i64 %7, 3663 %19 = getelementptr i8, ptr %17, i64 %18664 %20 = load i32, ptr %2, align 4665 %.not = icmp slt i64 %9, 1666 br i1 %.not, label %.preheader, label %.preheader35.lr.ph667 668.preheader35.lr.ph: ; preds = %3669 %21 = sub i64 0, %7670 %.neg = mul i64 %7, -2671 %.neg50 = mul i64 %7, -3672 %.neg51 = mul i64 %7, -4673 %.neg52 = mul i64 %7, -5674 %.neg53 = mul i64 %7, -6675 %.neg54 = mul i64 %7, -7676 %.neg55 = mul i64 %7, -8677 br label %.preheader35678 679.preheader35: ; preds = %.preheader35.lr.ph, %.preheader35680 %22 = phi i32 [ 2147483647, %.preheader35.lr.ph ], [ %78, %.preheader35 ]681 %23 = phi i64 [ 0, %.preheader35.lr.ph ], [ %79, %.preheader35 ]682 %.045 = phi i1 [ false, %.preheader35.lr.ph ], [ %.2.8, %.preheader35 ]683 %.lcssa364144 = phi i32 [ 0, %.preheader35.lr.ph ], [ %77, %.preheader35 ]684 %24 = mul nsw i64 %23, %11685 %25 = getelementptr i8, ptr %19, i64 %24686 %26 = load i32, ptr %25, align 4687 %27 = icmp ne i32 %26, %20688 %28 = icmp sge i32 %26, %22689 %.not33 = and i1 %.045, %28690 %or.cond = select i1 %27, i1 true, i1 %.not33691 %29 = select i1 %or.cond, i32 %.lcssa364144, i32 1692 %not.or.cond = xor i1 %or.cond, true693 %.2 = select i1 %not.or.cond, i1 true, i1 %.045694 %30 = select i1 %or.cond, i32 %22, i32 %20695 %31 = getelementptr i8, ptr %25, i64 %21696 %32 = load i32, ptr %31, align 4697 %33 = icmp ne i32 %32, %20698 %34 = icmp sge i32 %32, %30699 %.not33.1 = and i1 %.2, %34700 %or.cond.1 = select i1 %33, i1 true, i1 %.not33.1701 %35 = select i1 %or.cond.1, i32 %29, i32 2702 %not.or.cond.1 = xor i1 %or.cond.1, true703 %.2.1 = select i1 %not.or.cond.1, i1 true, i1 %.2704 %36 = select i1 %or.cond.1, i32 %30, i32 %20705 %37 = getelementptr i8, ptr %25, i64 %.neg706 %38 = load i32, ptr %37, align 4707 %39 = icmp ne i32 %38, %20708 %40 = icmp sge i32 %38, %36709 %.not33.2 = and i1 %.2.1, %40710 %or.cond.2 = select i1 %39, i1 true, i1 %.not33.2711 %41 = select i1 %or.cond.2, i32 %35, i32 3712 %not.or.cond.2 = xor i1 %or.cond.2, true713 %.2.2 = select i1 %not.or.cond.2, i1 true, i1 %.2.1714 %42 = select i1 %or.cond.2, i32 %36, i32 %20715 %43 = getelementptr i8, ptr %25, i64 %.neg50716 %44 = load i32, ptr %43, align 4717 %45 = icmp ne i32 %44, %20718 %46 = icmp sge i32 %44, %42719 %.not33.3 = and i1 %.2.2, %46720 %or.cond.3 = select i1 %45, i1 true, i1 %.not33.3721 %47 = select i1 %or.cond.3, i32 %41, i32 4722 %not.or.cond.3 = xor i1 %or.cond.3, true723 %.2.3 = select i1 %not.or.cond.3, i1 true, i1 %.2.2724 %48 = select i1 %or.cond.3, i32 %42, i32 %20725 %49 = getelementptr i8, ptr %25, i64 %.neg51726 %50 = load i32, ptr %49, align 4727 %51 = icmp ne i32 %50, %20728 %52 = icmp sge i32 %50, %48729 %.not33.4 = and i1 %.2.3, %52730 %or.cond.4 = select i1 %51, i1 true, i1 %.not33.4731 %53 = select i1 %or.cond.4, i32 %47, i32 5732 %not.or.cond.4 = xor i1 %or.cond.4, true733 %.2.4 = select i1 %not.or.cond.4, i1 true, i1 %.2.3734 %54 = select i1 %or.cond.4, i32 %48, i32 %20735 %55 = getelementptr i8, ptr %25, i64 %.neg52736 %56 = load i32, ptr %55, align 4737 %57 = icmp ne i32 %56, %20738 %58 = icmp sge i32 %56, %54739 %.not33.5 = and i1 %.2.4, %58740 %or.cond.5 = select i1 %57, i1 true, i1 %.not33.5741 %59 = select i1 %or.cond.5, i32 %53, i32 6742 %not.or.cond.5 = xor i1 %or.cond.5, true743 %.2.5 = select i1 %not.or.cond.5, i1 true, i1 %.2.4744 %60 = select i1 %or.cond.5, i32 %54, i32 %20745 %61 = getelementptr i8, ptr %25, i64 %.neg53746 %62 = load i32, ptr %61, align 4747 %63 = icmp ne i32 %62, %20748 %64 = icmp sge i32 %62, %60749 %.not33.6 = and i1 %.2.5, %64750 %or.cond.6 = select i1 %63, i1 true, i1 %.not33.6751 %65 = select i1 %or.cond.6, i32 %59, i32 7752 %not.or.cond.6 = xor i1 %or.cond.6, true753 %.2.6 = select i1 %not.or.cond.6, i1 true, i1 %.2.5754 %66 = select i1 %or.cond.6, i32 %60, i32 %20755 %67 = getelementptr i8, ptr %25, i64 %.neg54756 %68 = load i32, ptr %67, align 4757 %69 = icmp ne i32 %68, %20758 %70 = icmp sge i32 %68, %66759 %.not33.7 = and i1 %.2.6, %70760 %or.cond.7 = select i1 %69, i1 true, i1 %.not33.7761 %71 = select i1 %or.cond.7, i32 %65, i32 8762 %not.or.cond.7 = xor i1 %or.cond.7, true763 %.2.7 = select i1 %not.or.cond.7, i1 true, i1 %.2.6764 %72 = select i1 %or.cond.7, i32 %66, i32 %20765 %73 = getelementptr i8, ptr %25, i64 %.neg55766 %74 = load i32, ptr %73, align 4767 %75 = icmp ne i32 %74, %20768 %76 = icmp sge i32 %74, %72769 %.not33.8 = and i1 %.2.7, %76770 %or.cond.8 = select i1 %75, i1 true, i1 %.not33.8771 %77 = select i1 %or.cond.8, i32 %71, i32 9772 %not.or.cond.8 = xor i1 %or.cond.8, true773 %.2.8 = select i1 %not.or.cond.8, i1 true, i1 %.2.7774 %78 = select i1 %or.cond.8, i32 %72, i32 %20775 %79 = add nuw nsw i64 %23, 1776 %exitcond.not = icmp eq i64 %79, %9777 br i1 %exitcond.not, label %.preheader, label %.preheader35778 779.preheader: ; preds = %.preheader35, %3780 %.lcssa3641.lcssa = phi i32 [ 0, %3 ], [ %77, %.preheader35 ]781 ret i32 %.lcssa3641.lcssa782}783