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1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py2; RUN: llc < %s -mtriple=aarch64-unknown-unknown | FileCheck %s3 4;==============================================================================;5; the shift amount is negated (shiftbitwidth - shiftamt)6;==============================================================================;7 8; shift left9;------------------------------------------------------------------------------;10 11define i32 @reg32_shl_by_negated(i32 %val, i32 %shamt) nounwind {12; CHECK-LABEL: reg32_shl_by_negated:13; CHECK: // %bb.0:14; CHECK-NEXT: neg w8, w115; CHECK-NEXT: lsl w0, w0, w816; CHECK-NEXT: ret17 %negshamt = sub i32 32, %shamt18 %shifted = shl i32 %val, %negshamt19 ret i32 %shifted20}21define i32 @load32_shl_by_negated(ptr %valptr, i32 %shamt) nounwind {22; CHECK-LABEL: load32_shl_by_negated:23; CHECK: // %bb.0:24; CHECK-NEXT: ldr w8, [x0]25; CHECK-NEXT: neg w9, w126; CHECK-NEXT: lsl w0, w8, w927; CHECK-NEXT: ret28 %val = load i32, ptr %valptr29 %negshamt = sub i32 32, %shamt30 %shifted = shl i32 %val, %negshamt31 ret i32 %shifted32}33define void @store32_shl_by_negated(i32 %val, ptr %dstptr, i32 %shamt) nounwind {34; CHECK-LABEL: store32_shl_by_negated:35; CHECK: // %bb.0:36; CHECK-NEXT: neg w8, w237; CHECK-NEXT: lsl w8, w0, w838; CHECK-NEXT: str w8, [x1]39; CHECK-NEXT: ret40 %negshamt = sub i32 32, %shamt41 %shifted = shl i32 %val, %negshamt42 store i32 %shifted, ptr %dstptr43 ret void44}45define void @modify32_shl_by_negated(ptr %valptr, i32 %shamt) nounwind {46; CHECK-LABEL: modify32_shl_by_negated:47; CHECK: // %bb.0:48; CHECK-NEXT: ldr w8, [x0]49; CHECK-NEXT: neg w9, w150; CHECK-NEXT: lsl w8, w8, w951; CHECK-NEXT: str w8, [x0]52; CHECK-NEXT: ret53 %val = load i32, ptr %valptr54 %negshamt = sub i32 32, %shamt55 %shifted = shl i32 %val, %negshamt56 store i32 %shifted, ptr %valptr57 ret void58}59define void @modify32_shl_by_negated_multi_use(ptr %valptr, i32 %shamt, ptr %shamtptr) nounwind {60; CHECK-LABEL: modify32_shl_by_negated_multi_use:61; CHECK: // %bb.0:62; CHECK-NEXT: ldr w8, [x0]63; CHECK-NEXT: neg w9, w164; CHECK-NEXT: lsl w8, w8, w965; CHECK-NEXT: mov w9, #32 // =0x2066; CHECK-NEXT: sub w9, w9, w167; CHECK-NEXT: str w8, [x0]68; CHECK-NEXT: str w9, [x2]69; CHECK-NEXT: ret70 %val = load i32, ptr %valptr71 %negshamt = sub i32 32, %shamt72 %shifted = shl i32 %val, %negshamt73 store i32 %shifted, ptr %valptr74 store i32 %negshamt, ptr %shamtptr75 ret void76}77 78define i64 @reg64_shl_by_negated(i64 %val, i64 %shamt) nounwind {79; CHECK-LABEL: reg64_shl_by_negated:80; CHECK: // %bb.0:81; CHECK-NEXT: neg x8, x182; CHECK-NEXT: lsl x0, x0, x883; CHECK-NEXT: ret84 %negshamt = sub i64 64, %shamt85 %shifted = shl i64 %val, %negshamt86 ret i64 %shifted87}88define i64 @load64_shl_by_negated(ptr %valptr, i64 %shamt) nounwind {89; CHECK-LABEL: load64_shl_by_negated:90; CHECK: // %bb.0:91; CHECK-NEXT: ldr x8, [x0]92; CHECK-NEXT: neg x9, x193; CHECK-NEXT: lsl x0, x8, x994; CHECK-NEXT: ret95 %val = load i64, ptr %valptr96 %negshamt = sub i64 64, %shamt97 %shifted = shl i64 %val, %negshamt98 ret i64 %shifted99}100define void @store64_shl_by_negated(i64 %val, ptr %dstptr, i64 %shamt) nounwind {101; CHECK-LABEL: store64_shl_by_negated:102; CHECK: // %bb.0:103; CHECK-NEXT: neg x8, x2104; CHECK-NEXT: lsl x8, x0, x8105; CHECK-NEXT: str x8, [x1]106; CHECK-NEXT: ret107 %negshamt = sub i64 64, %shamt108 %shifted = shl i64 %val, %negshamt109 store i64 %shifted, ptr %dstptr110 ret void111}112define void @modify64_shl_by_negated(ptr %valptr, i64 %shamt) nounwind {113; CHECK-LABEL: modify64_shl_by_negated:114; CHECK: // %bb.0:115; CHECK-NEXT: ldr x8, [x0]116; CHECK-NEXT: neg x9, x1117; CHECK-NEXT: lsl x8, x8, x9118; CHECK-NEXT: str x8, [x0]119; CHECK-NEXT: ret120 %val = load i64, ptr %valptr121 %negshamt = sub i64 64, %shamt122 %shifted = shl i64 %val, %negshamt123 store i64 %shifted, ptr %valptr124 ret void125}126define void @modify64_shl_by_negated_multi_use(ptr %valptr, i64 %shamt, ptr %shamtptr) nounwind {127; CHECK-LABEL: modify64_shl_by_negated_multi_use:128; CHECK: // %bb.0:129; CHECK-NEXT: ldr x8, [x0]130; CHECK-NEXT: neg x9, x1131; CHECK-NEXT: lsl x8, x8, x9132; CHECK-NEXT: mov w9, #64 // =0x40133; CHECK-NEXT: sub x9, x9, x1134; CHECK-NEXT: str x8, [x0]135; CHECK-NEXT: str x9, [x2]136; CHECK-NEXT: ret137 %val = load i64, ptr %valptr138 %negshamt = sub i64 64, %shamt139 %shifted = shl i64 %val, %negshamt140 store i64 %shifted, ptr %valptr141 store i64 %negshamt, ptr %shamtptr142 ret void143}144 145; logical shift right146;------------------------------------------------------------------------------;147 148define i32 @reg32_lshr_by_negated(i32 %val, i32 %shamt) nounwind {149; CHECK-LABEL: reg32_lshr_by_negated:150; CHECK: // %bb.0:151; CHECK-NEXT: neg w8, w1152; CHECK-NEXT: lsr w0, w0, w8153; CHECK-NEXT: ret154 %negshamt = sub i32 32, %shamt155 %shifted = lshr i32 %val, %negshamt156 ret i32 %shifted157}158define i32 @load32_lshr_by_negated(ptr %valptr, i32 %shamt) nounwind {159; CHECK-LABEL: load32_lshr_by_negated:160; CHECK: // %bb.0:161; CHECK-NEXT: ldr w8, [x0]162; CHECK-NEXT: neg w9, w1163; CHECK-NEXT: lsr w0, w8, w9164; CHECK-NEXT: ret165 %val = load i32, ptr %valptr166 %negshamt = sub i32 32, %shamt167 %shifted = lshr i32 %val, %negshamt168 ret i32 %shifted169}170define void @store32_lshr_by_negated(i32 %val, ptr %dstptr, i32 %shamt) nounwind {171; CHECK-LABEL: store32_lshr_by_negated:172; CHECK: // %bb.0:173; CHECK-NEXT: neg w8, w2174; CHECK-NEXT: lsr w8, w0, w8175; CHECK-NEXT: str w8, [x1]176; CHECK-NEXT: ret177 %negshamt = sub i32 32, %shamt178 %shifted = lshr i32 %val, %negshamt179 store i32 %shifted, ptr %dstptr180 ret void181}182define void @modify32_lshr_by_negated(ptr %valptr, i32 %shamt) nounwind {183; CHECK-LABEL: modify32_lshr_by_negated:184; CHECK: // %bb.0:185; CHECK-NEXT: ldr w8, [x0]186; CHECK-NEXT: neg w9, w1187; CHECK-NEXT: lsr w8, w8, w9188; CHECK-NEXT: str w8, [x0]189; CHECK-NEXT: ret190 %val = load i32, ptr %valptr191 %negshamt = sub i32 32, %shamt192 %shifted = lshr i32 %val, %negshamt193 store i32 %shifted, ptr %valptr194 ret void195}196define void @modify32_lshr_by_negated_multi_use(ptr %valptr, i32 %shamt, ptr %shamtptr) nounwind {197; CHECK-LABEL: modify32_lshr_by_negated_multi_use:198; CHECK: // %bb.0:199; CHECK-NEXT: ldr w8, [x0]200; CHECK-NEXT: neg w9, w1201; CHECK-NEXT: lsr w8, w8, w9202; CHECK-NEXT: mov w9, #32 // =0x20203; CHECK-NEXT: sub w9, w9, w1204; CHECK-NEXT: str w8, [x0]205; CHECK-NEXT: str w9, [x2]206; CHECK-NEXT: ret207 %val = load i32, ptr %valptr208 %negshamt = sub i32 32, %shamt209 %shifted = lshr i32 %val, %negshamt210 store i32 %shifted, ptr %valptr211 store i32 %negshamt, ptr %shamtptr212 ret void213}214 215define i64 @reg64_lshr_by_negated(i64 %val, i64 %shamt) nounwind {216; CHECK-LABEL: reg64_lshr_by_negated:217; CHECK: // %bb.0:218; CHECK-NEXT: neg x8, x1219; CHECK-NEXT: lsr x0, x0, x8220; CHECK-NEXT: ret221 %negshamt = sub i64 64, %shamt222 %shifted = lshr i64 %val, %negshamt223 ret i64 %shifted224}225define i64 @load64_lshr_by_negated(ptr %valptr, i64 %shamt) nounwind {226; CHECK-LABEL: load64_lshr_by_negated:227; CHECK: // %bb.0:228; CHECK-NEXT: ldr x8, [x0]229; CHECK-NEXT: neg x9, x1230; CHECK-NEXT: lsr x0, x8, x9231; CHECK-NEXT: ret232 %val = load i64, ptr %valptr233 %negshamt = sub i64 64, %shamt234 %shifted = lshr i64 %val, %negshamt235 ret i64 %shifted236}237define void @store64_lshr_by_negated(i64 %val, ptr %dstptr, i64 %shamt) nounwind {238; CHECK-LABEL: store64_lshr_by_negated:239; CHECK: // %bb.0:240; CHECK-NEXT: neg x8, x2241; CHECK-NEXT: lsr x8, x0, x8242; CHECK-NEXT: str x8, [x1]243; CHECK-NEXT: ret244 %negshamt = sub i64 64, %shamt245 %shifted = lshr i64 %val, %negshamt246 store i64 %shifted, ptr %dstptr247 ret void248}249define void @modify64_lshr_by_negated(ptr %valptr, i64 %shamt) nounwind {250; CHECK-LABEL: modify64_lshr_by_negated:251; CHECK: // %bb.0:252; CHECK-NEXT: ldr x8, [x0]253; CHECK-NEXT: neg x9, x1254; CHECK-NEXT: lsr x8, x8, x9255; CHECK-NEXT: str x8, [x0]256; CHECK-NEXT: ret257 %val = load i64, ptr %valptr258 %negshamt = sub i64 64, %shamt259 %shifted = lshr i64 %val, %negshamt260 store i64 %shifted, ptr %valptr261 ret void262}263define void @modify64_lshr_by_negated_multi_use(ptr %valptr, i64 %shamt, ptr %shamtptr) nounwind {264; CHECK-LABEL: modify64_lshr_by_negated_multi_use:265; CHECK: // %bb.0:266; CHECK-NEXT: ldr x8, [x0]267; CHECK-NEXT: neg x9, x1268; CHECK-NEXT: lsr x8, x8, x9269; CHECK-NEXT: mov w9, #64 // =0x40270; CHECK-NEXT: sub x9, x9, x1271; CHECK-NEXT: str x8, [x0]272; CHECK-NEXT: str x9, [x2]273; CHECK-NEXT: ret274 %val = load i64, ptr %valptr275 %negshamt = sub i64 64, %shamt276 %shifted = lshr i64 %val, %negshamt277 store i64 %shifted, ptr %valptr278 store i64 %negshamt, ptr %shamtptr279 ret void280}281 282; arithmetic shift right283;------------------------------------------------------------------------------;284 285define i32 @reg32_ashr_by_negated(i32 %val, i32 %shamt) nounwind {286; CHECK-LABEL: reg32_ashr_by_negated:287; CHECK: // %bb.0:288; CHECK-NEXT: neg w8, w1289; CHECK-NEXT: asr w0, w0, w8290; CHECK-NEXT: ret291 %negshamt = sub i32 32, %shamt292 %shifted = ashr i32 %val, %negshamt293 ret i32 %shifted294}295define i32 @load32_ashr_by_negated(ptr %valptr, i32 %shamt) nounwind {296; CHECK-LABEL: load32_ashr_by_negated:297; CHECK: // %bb.0:298; CHECK-NEXT: ldr w8, [x0]299; CHECK-NEXT: neg w9, w1300; CHECK-NEXT: asr w0, w8, w9301; CHECK-NEXT: ret302 %val = load i32, ptr %valptr303 %negshamt = sub i32 32, %shamt304 %shifted = ashr i32 %val, %negshamt305 ret i32 %shifted306}307define void @store32_ashr_by_negated(i32 %val, ptr %dstptr, i32 %shamt) nounwind {308; CHECK-LABEL: store32_ashr_by_negated:309; CHECK: // %bb.0:310; CHECK-NEXT: neg w8, w2311; CHECK-NEXT: asr w8, w0, w8312; CHECK-NEXT: str w8, [x1]313; CHECK-NEXT: ret314 %negshamt = sub i32 32, %shamt315 %shifted = ashr i32 %val, %negshamt316 store i32 %shifted, ptr %dstptr317 ret void318}319define void @modify32_ashr_by_negated(ptr %valptr, i32 %shamt) nounwind {320; CHECK-LABEL: modify32_ashr_by_negated:321; CHECK: // %bb.0:322; CHECK-NEXT: ldr w8, [x0]323; CHECK-NEXT: neg w9, w1324; CHECK-NEXT: asr w8, w8, w9325; CHECK-NEXT: str w8, [x0]326; CHECK-NEXT: ret327 %val = load i32, ptr %valptr328 %negshamt = sub i32 32, %shamt329 %shifted = ashr i32 %val, %negshamt330 store i32 %shifted, ptr %valptr331 ret void332}333define void @modify32_ashr_by_negated_multi_use(ptr %valptr, i32 %shamt, ptr %shamtptr) nounwind {334; CHECK-LABEL: modify32_ashr_by_negated_multi_use:335; CHECK: // %bb.0:336; CHECK-NEXT: ldr w8, [x0]337; CHECK-NEXT: neg w9, w1338; CHECK-NEXT: asr w8, w8, w9339; CHECK-NEXT: mov w9, #32 // =0x20340; CHECK-NEXT: sub w9, w9, w1341; CHECK-NEXT: str w8, [x0]342; CHECK-NEXT: str w9, [x2]343; CHECK-NEXT: ret344 %val = load i32, ptr %valptr345 %negshamt = sub i32 32, %shamt346 %shifted = ashr i32 %val, %negshamt347 store i32 %shifted, ptr %valptr348 store i32 %negshamt, ptr %shamtptr349 ret void350}351 352define i64 @reg64_ashr_by_negated(i64 %val, i64 %shamt) nounwind {353; CHECK-LABEL: reg64_ashr_by_negated:354; CHECK: // %bb.0:355; CHECK-NEXT: neg x8, x1356; CHECK-NEXT: asr x0, x0, x8357; CHECK-NEXT: ret358 %negshamt = sub i64 64, %shamt359 %shifted = ashr i64 %val, %negshamt360 ret i64 %shifted361}362define i64 @load64_ashr_by_negated(ptr %valptr, i64 %shamt) nounwind {363; CHECK-LABEL: load64_ashr_by_negated:364; CHECK: // %bb.0:365; CHECK-NEXT: ldr x8, [x0]366; CHECK-NEXT: neg x9, x1367; CHECK-NEXT: asr x0, x8, x9368; CHECK-NEXT: ret369 %val = load i64, ptr %valptr370 %negshamt = sub i64 64, %shamt371 %shifted = ashr i64 %val, %negshamt372 ret i64 %shifted373}374define void @store64_ashr_by_negated(i64 %val, ptr %dstptr, i64 %shamt) nounwind {375; CHECK-LABEL: store64_ashr_by_negated:376; CHECK: // %bb.0:377; CHECK-NEXT: neg x8, x2378; CHECK-NEXT: asr x8, x0, x8379; CHECK-NEXT: str x8, [x1]380; CHECK-NEXT: ret381 %negshamt = sub i64 64, %shamt382 %shifted = ashr i64 %val, %negshamt383 store i64 %shifted, ptr %dstptr384 ret void385}386define void @modify64_ashr_by_negated(ptr %valptr, i64 %shamt) nounwind {387; CHECK-LABEL: modify64_ashr_by_negated:388; CHECK: // %bb.0:389; CHECK-NEXT: ldr x8, [x0]390; CHECK-NEXT: neg x9, x1391; CHECK-NEXT: asr x8, x8, x9392; CHECK-NEXT: str x8, [x0]393; CHECK-NEXT: ret394 %val = load i64, ptr %valptr395 %negshamt = sub i64 64, %shamt396 %shifted = ashr i64 %val, %negshamt397 store i64 %shifted, ptr %valptr398 ret void399}400define void @modify64_ashr_by_negated_multi_use(ptr %valptr, i64 %shamt, ptr %shamtptr) nounwind {401; CHECK-LABEL: modify64_ashr_by_negated_multi_use:402; CHECK: // %bb.0:403; CHECK-NEXT: ldr x8, [x0]404; CHECK-NEXT: neg x9, x1405; CHECK-NEXT: asr x8, x8, x9406; CHECK-NEXT: mov w9, #64 // =0x40407; CHECK-NEXT: sub x9, x9, x1408; CHECK-NEXT: str x8, [x0]409; CHECK-NEXT: str x9, [x2]410; CHECK-NEXT: ret411 %val = load i64, ptr %valptr412 %negshamt = sub i64 64, %shamt413 %shifted = ashr i64 %val, %negshamt414 store i64 %shifted, ptr %valptr415 store i64 %negshamt, ptr %shamtptr416 ret void417}418 419;==============================================================================;420; the shift amount is complemented (shiftbitwidth - 1 - shiftamt)421;==============================================================================;422 423; shift left424;------------------------------------------------------------------------------;425 426define i32 @reg32_shl_by_complemented(i32 %val, i32 %shamt) nounwind {427; CHECK-LABEL: reg32_shl_by_complemented:428; CHECK: // %bb.0:429; CHECK-NEXT: mvn w8, w1430; CHECK-NEXT: lsl w0, w0, w8431; CHECK-NEXT: ret432 %negshamt = sub i32 31, %shamt433 %shifted = shl i32 %val, %negshamt434 ret i32 %shifted435}436define i32 @load32_shl_by_complemented(ptr %valptr, i32 %shamt) nounwind {437; CHECK-LABEL: load32_shl_by_complemented:438; CHECK: // %bb.0:439; CHECK-NEXT: ldr w8, [x0]440; CHECK-NEXT: mvn w9, w1441; CHECK-NEXT: lsl w0, w8, w9442; CHECK-NEXT: ret443 %val = load i32, ptr %valptr444 %negshamt = sub i32 31, %shamt445 %shifted = shl i32 %val, %negshamt446 ret i32 %shifted447}448define void @store32_shl_by_complemented(i32 %val, ptr %dstptr, i32 %shamt) nounwind {449; CHECK-LABEL: store32_shl_by_complemented:450; CHECK: // %bb.0:451; CHECK-NEXT: mvn w8, w2452; CHECK-NEXT: lsl w8, w0, w8453; CHECK-NEXT: str w8, [x1]454; CHECK-NEXT: ret455 %negshamt = sub i32 31, %shamt456 %shifted = shl i32 %val, %negshamt457 store i32 %shifted, ptr %dstptr458 ret void459}460define void @modify32_shl_by_complemented(ptr %valptr, i32 %shamt) nounwind {461; CHECK-LABEL: modify32_shl_by_complemented:462; CHECK: // %bb.0:463; CHECK-NEXT: ldr w8, [x0]464; CHECK-NEXT: mvn w9, w1465; CHECK-NEXT: lsl w8, w8, w9466; CHECK-NEXT: str w8, [x0]467; CHECK-NEXT: ret468 %val = load i32, ptr %valptr469 %negshamt = sub i32 31, %shamt470 %shifted = shl i32 %val, %negshamt471 store i32 %shifted, ptr %valptr472 ret void473}474define void @modify32_shl_by_complemented_multi_use(ptr %valptr, i32 %shamt, ptr %shamtptr) nounwind {475; CHECK-LABEL: modify32_shl_by_complemented_multi_use:476; CHECK: // %bb.0:477; CHECK-NEXT: ldr w8, [x0]478; CHECK-NEXT: mvn w9, w1479; CHECK-NEXT: lsl w8, w8, w9480; CHECK-NEXT: mov w9, #31 // =0x1f481; CHECK-NEXT: sub w9, w9, w1482; CHECK-NEXT: str w8, [x0]483; CHECK-NEXT: str w9, [x2]484; CHECK-NEXT: ret485 %val = load i32, ptr %valptr486 %negshamt = sub i32 31, %shamt487 %shifted = shl i32 %val, %negshamt488 store i32 %shifted, ptr %valptr489 store i32 %negshamt, ptr %shamtptr490 ret void491}492 493define i64 @reg64_shl_by_complemented(i64 %val, i64 %shamt) nounwind {494; CHECK-LABEL: reg64_shl_by_complemented:495; CHECK: // %bb.0:496; CHECK-NEXT: mvn x8, x1497; CHECK-NEXT: lsl x0, x0, x8498; CHECK-NEXT: ret499 %negshamt = sub i64 63, %shamt500 %shifted = shl i64 %val, %negshamt501 ret i64 %shifted502}503define i64 @load64_shl_by_complemented(ptr %valptr, i64 %shamt) nounwind {504; CHECK-LABEL: load64_shl_by_complemented:505; CHECK: // %bb.0:506; CHECK-NEXT: ldr x8, [x0]507; CHECK-NEXT: mvn x9, x1508; CHECK-NEXT: lsl x0, x8, x9509; CHECK-NEXT: ret510 %val = load i64, ptr %valptr511 %negshamt = sub i64 63, %shamt512 %shifted = shl i64 %val, %negshamt513 ret i64 %shifted514}515define void @store64_shl_by_complemented(i64 %val, ptr %dstptr, i64 %shamt) nounwind {516; CHECK-LABEL: store64_shl_by_complemented:517; CHECK: // %bb.0:518; CHECK-NEXT: mvn x8, x2519; CHECK-NEXT: lsl x8, x0, x8520; CHECK-NEXT: str x8, [x1]521; CHECK-NEXT: ret522 %negshamt = sub i64 63, %shamt523 %shifted = shl i64 %val, %negshamt524 store i64 %shifted, ptr %dstptr525 ret void526}527define void @modify64_shl_by_complemented(ptr %valptr, i64 %shamt) nounwind {528; CHECK-LABEL: modify64_shl_by_complemented:529; CHECK: // %bb.0:530; CHECK-NEXT: ldr x8, [x0]531; CHECK-NEXT: mvn x9, x1532; CHECK-NEXT: lsl x8, x8, x9533; CHECK-NEXT: str x8, [x0]534; CHECK-NEXT: ret535 %val = load i64, ptr %valptr536 %negshamt = sub i64 63, %shamt537 %shifted = shl i64 %val, %negshamt538 store i64 %shifted, ptr %valptr539 ret void540}541define void @modify64_shl_by_complemented_multi_use(ptr %valptr, i64 %shamt, ptr %shamtptr) nounwind {542; CHECK-LABEL: modify64_shl_by_complemented_multi_use:543; CHECK: // %bb.0:544; CHECK-NEXT: ldr x8, [x0]545; CHECK-NEXT: mvn x9, x1546; CHECK-NEXT: lsl x8, x8, x9547; CHECK-NEXT: mov w9, #63 // =0x3f548; CHECK-NEXT: sub x9, x9, x1549; CHECK-NEXT: str x8, [x0]550; CHECK-NEXT: str x9, [x2]551; CHECK-NEXT: ret552 %val = load i64, ptr %valptr553 %negshamt = sub i64 63, %shamt554 %shifted = shl i64 %val, %negshamt555 store i64 %shifted, ptr %valptr556 store i64 %negshamt, ptr %shamtptr557 ret void558}559 560; logical shift right561;------------------------------------------------------------------------------;562 563define i32 @reg32_lshr_by_complemented(i32 %val, i32 %shamt) nounwind {564; CHECK-LABEL: reg32_lshr_by_complemented:565; CHECK: // %bb.0:566; CHECK-NEXT: mvn w8, w1567; CHECK-NEXT: lsr w0, w0, w8568; CHECK-NEXT: ret569 %negshamt = sub i32 31, %shamt570 %shifted = lshr i32 %val, %negshamt571 ret i32 %shifted572}573define i32 @load32_lshr_by_complemented(ptr %valptr, i32 %shamt) nounwind {574; CHECK-LABEL: load32_lshr_by_complemented:575; CHECK: // %bb.0:576; CHECK-NEXT: ldr w8, [x0]577; CHECK-NEXT: mvn w9, w1578; CHECK-NEXT: lsr w0, w8, w9579; CHECK-NEXT: ret580 %val = load i32, ptr %valptr581 %negshamt = sub i32 31, %shamt582 %shifted = lshr i32 %val, %negshamt583 ret i32 %shifted584}585define void @store32_lshr_by_complemented(i32 %val, ptr %dstptr, i32 %shamt) nounwind {586; CHECK-LABEL: store32_lshr_by_complemented:587; CHECK: // %bb.0:588; CHECK-NEXT: mvn w8, w2589; CHECK-NEXT: lsr w8, w0, w8590; CHECK-NEXT: str w8, [x1]591; CHECK-NEXT: ret592 %negshamt = sub i32 31, %shamt593 %shifted = lshr i32 %val, %negshamt594 store i32 %shifted, ptr %dstptr595 ret void596}597define void @modify32_lshr_by_complemented(ptr %valptr, i32 %shamt) nounwind {598; CHECK-LABEL: modify32_lshr_by_complemented:599; CHECK: // %bb.0:600; CHECK-NEXT: ldr w8, [x0]601; CHECK-NEXT: mvn w9, w1602; CHECK-NEXT: lsr w8, w8, w9603; CHECK-NEXT: str w8, [x0]604; CHECK-NEXT: ret605 %val = load i32, ptr %valptr606 %negshamt = sub i32 31, %shamt607 %shifted = lshr i32 %val, %negshamt608 store i32 %shifted, ptr %valptr609 ret void610}611define void @modify32_lshr_by_complemented_multi_use(ptr %valptr, i32 %shamt, ptr %shamtptr) nounwind {612; CHECK-LABEL: modify32_lshr_by_complemented_multi_use:613; CHECK: // %bb.0:614; CHECK-NEXT: ldr w8, [x0]615; CHECK-NEXT: mvn w9, w1616; CHECK-NEXT: lsr w8, w8, w9617; CHECK-NEXT: mov w9, #31 // =0x1f618; CHECK-NEXT: sub w9, w9, w1619; CHECK-NEXT: str w8, [x0]620; CHECK-NEXT: str w9, [x2]621; CHECK-NEXT: ret622 %val = load i32, ptr %valptr623 %negshamt = sub i32 31, %shamt624 %shifted = lshr i32 %val, %negshamt625 store i32 %shifted, ptr %valptr626 store i32 %negshamt, ptr %shamtptr627 ret void628}629 630define i64 @reg64_lshr_by_complemented(i64 %val, i64 %shamt) nounwind {631; CHECK-LABEL: reg64_lshr_by_complemented:632; CHECK: // %bb.0:633; CHECK-NEXT: mvn x8, x1634; CHECK-NEXT: lsr x0, x0, x8635; CHECK-NEXT: ret636 %negshamt = sub i64 63, %shamt637 %shifted = lshr i64 %val, %negshamt638 ret i64 %shifted639}640define i64 @load64_lshr_by_complemented(ptr %valptr, i64 %shamt) nounwind {641; CHECK-LABEL: load64_lshr_by_complemented:642; CHECK: // %bb.0:643; CHECK-NEXT: ldr x8, [x0]644; CHECK-NEXT: mvn x9, x1645; CHECK-NEXT: lsr x0, x8, x9646; CHECK-NEXT: ret647 %val = load i64, ptr %valptr648 %negshamt = sub i64 63, %shamt649 %shifted = lshr i64 %val, %negshamt650 ret i64 %shifted651}652define void @store64_lshr_by_complemented(i64 %val, ptr %dstptr, i64 %shamt) nounwind {653; CHECK-LABEL: store64_lshr_by_complemented:654; CHECK: // %bb.0:655; CHECK-NEXT: mvn x8, x2656; CHECK-NEXT: lsr x8, x0, x8657; CHECK-NEXT: str x8, [x1]658; CHECK-NEXT: ret659 %negshamt = sub i64 63, %shamt660 %shifted = lshr i64 %val, %negshamt661 store i64 %shifted, ptr %dstptr662 ret void663}664define void @modify64_lshr_by_complemented(ptr %valptr, i64 %shamt) nounwind {665; CHECK-LABEL: modify64_lshr_by_complemented:666; CHECK: // %bb.0:667; CHECK-NEXT: ldr x8, [x0]668; CHECK-NEXT: mvn x9, x1669; CHECK-NEXT: lsr x8, x8, x9670; CHECK-NEXT: str x8, [x0]671; CHECK-NEXT: ret672 %val = load i64, ptr %valptr673 %negshamt = sub i64 63, %shamt674 %shifted = lshr i64 %val, %negshamt675 store i64 %shifted, ptr %valptr676 ret void677}678define void @modify64_lshr_by_complemented_multi_use(ptr %valptr, i64 %shamt, ptr %shamtptr) nounwind {679; CHECK-LABEL: modify64_lshr_by_complemented_multi_use:680; CHECK: // %bb.0:681; CHECK-NEXT: ldr x8, [x0]682; CHECK-NEXT: mvn x9, x1683; CHECK-NEXT: lsr x8, x8, x9684; CHECK-NEXT: mov w9, #63 // =0x3f685; CHECK-NEXT: sub x9, x9, x1686; CHECK-NEXT: str x8, [x0]687; CHECK-NEXT: str x9, [x2]688; CHECK-NEXT: ret689 %val = load i64, ptr %valptr690 %negshamt = sub i64 63, %shamt691 %shifted = lshr i64 %val, %negshamt692 store i64 %shifted, ptr %valptr693 store i64 %negshamt, ptr %shamtptr694 ret void695}696 697; arithmetic shift right698;------------------------------------------------------------------------------;699 700define i32 @reg32_ashr_by_complemented(i32 %val, i32 %shamt) nounwind {701; CHECK-LABEL: reg32_ashr_by_complemented:702; CHECK: // %bb.0:703; CHECK-NEXT: mvn w8, w1704; CHECK-NEXT: asr w0, w0, w8705; CHECK-NEXT: ret706 %negshamt = sub i32 31, %shamt707 %shifted = ashr i32 %val, %negshamt708 ret i32 %shifted709}710define i32 @load32_ashr_by_complemented(ptr %valptr, i32 %shamt) nounwind {711; CHECK-LABEL: load32_ashr_by_complemented:712; CHECK: // %bb.0:713; CHECK-NEXT: ldr w8, [x0]714; CHECK-NEXT: mvn w9, w1715; CHECK-NEXT: asr w0, w8, w9716; CHECK-NEXT: ret717 %val = load i32, ptr %valptr718 %negshamt = sub i32 31, %shamt719 %shifted = ashr i32 %val, %negshamt720 ret i32 %shifted721}722define void @store32_ashr_by_complemented(i32 %val, ptr %dstptr, i32 %shamt) nounwind {723; CHECK-LABEL: store32_ashr_by_complemented:724; CHECK: // %bb.0:725; CHECK-NEXT: mvn w8, w2726; CHECK-NEXT: asr w8, w0, w8727; CHECK-NEXT: str w8, [x1]728; CHECK-NEXT: ret729 %negshamt = sub i32 31, %shamt730 %shifted = ashr i32 %val, %negshamt731 store i32 %shifted, ptr %dstptr732 ret void733}734define void @modify32_ashr_by_complemented(ptr %valptr, i32 %shamt) nounwind {735; CHECK-LABEL: modify32_ashr_by_complemented:736; CHECK: // %bb.0:737; CHECK-NEXT: ldr w8, [x0]738; CHECK-NEXT: mvn w9, w1739; CHECK-NEXT: asr w8, w8, w9740; CHECK-NEXT: str w8, [x0]741; CHECK-NEXT: ret742 %val = load i32, ptr %valptr743 %negshamt = sub i32 31, %shamt744 %shifted = ashr i32 %val, %negshamt745 store i32 %shifted, ptr %valptr746 ret void747}748define void @modify32_ashr_by_complemented_multi_use(ptr %valptr, i32 %shamt, ptr %shamtptr) nounwind {749; CHECK-LABEL: modify32_ashr_by_complemented_multi_use:750; CHECK: // %bb.0:751; CHECK-NEXT: ldr w8, [x0]752; CHECK-NEXT: mvn w9, w1753; CHECK-NEXT: asr w8, w8, w9754; CHECK-NEXT: mov w9, #31 // =0x1f755; CHECK-NEXT: sub w9, w9, w1756; CHECK-NEXT: str w8, [x0]757; CHECK-NEXT: str w9, [x2]758; CHECK-NEXT: ret759 %val = load i32, ptr %valptr760 %negshamt = sub i32 31, %shamt761 %shifted = ashr i32 %val, %negshamt762 store i32 %shifted, ptr %valptr763 store i32 %negshamt, ptr %shamtptr764 ret void765}766 767define i64 @reg64_ashr_by_complemented(i64 %val, i64 %shamt) nounwind {768; CHECK-LABEL: reg64_ashr_by_complemented:769; CHECK: // %bb.0:770; CHECK-NEXT: mvn x8, x1771; CHECK-NEXT: asr x0, x0, x8772; CHECK-NEXT: ret773 %negshamt = sub i64 63, %shamt774 %shifted = ashr i64 %val, %negshamt775 ret i64 %shifted776}777define i64 @load64_ashr_by_complemented(ptr %valptr, i64 %shamt) nounwind {778; CHECK-LABEL: load64_ashr_by_complemented:779; CHECK: // %bb.0:780; CHECK-NEXT: ldr x8, [x0]781; CHECK-NEXT: mvn x9, x1782; CHECK-NEXT: asr x0, x8, x9783; CHECK-NEXT: ret784 %val = load i64, ptr %valptr785 %negshamt = sub i64 63, %shamt786 %shifted = ashr i64 %val, %negshamt787 ret i64 %shifted788}789define void @store64_ashr_by_complemented(i64 %val, ptr %dstptr, i64 %shamt) nounwind {790; CHECK-LABEL: store64_ashr_by_complemented:791; CHECK: // %bb.0:792; CHECK-NEXT: mvn x8, x2793; CHECK-NEXT: asr x8, x0, x8794; CHECK-NEXT: str x8, [x1]795; CHECK-NEXT: ret796 %negshamt = sub i64 63, %shamt797 %shifted = ashr i64 %val, %negshamt798 store i64 %shifted, ptr %dstptr799 ret void800}801define void @modify64_ashr_by_complemented(ptr %valptr, i64 %shamt) nounwind {802; CHECK-LABEL: modify64_ashr_by_complemented:803; CHECK: // %bb.0:804; CHECK-NEXT: ldr x8, [x0]805; CHECK-NEXT: mvn x9, x1806; CHECK-NEXT: asr x8, x8, x9807; CHECK-NEXT: str x8, [x0]808; CHECK-NEXT: ret809 %val = load i64, ptr %valptr810 %negshamt = sub i64 63, %shamt811 %shifted = ashr i64 %val, %negshamt812 store i64 %shifted, ptr %valptr813 ret void814}815define void @modify64_ashr_by_complemented_multi_use(ptr %valptr, i64 %shamt, ptr %shamtptr) nounwind {816; CHECK-LABEL: modify64_ashr_by_complemented_multi_use:817; CHECK: // %bb.0:818; CHECK-NEXT: ldr x8, [x0]819; CHECK-NEXT: mvn x9, x1820; CHECK-NEXT: asr x8, x8, x9821; CHECK-NEXT: mov w9, #63 // =0x3f822; CHECK-NEXT: sub x9, x9, x1823; CHECK-NEXT: str x8, [x0]824; CHECK-NEXT: str x9, [x2]825; CHECK-NEXT: ret826 %val = load i64, ptr %valptr827 %negshamt = sub i64 63, %shamt828 %shifted = ashr i64 %val, %negshamt829 store i64 %shifted, ptr %valptr830 store i64 %negshamt, ptr %shamtptr831 ret void832}833 834;||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||;835; next let's only test simple reg pattern, and only lshr.836;||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||;837 838;==============================================================================;839; subtraction from negated shift amount840 841define i32 @reg32_lshr_by_sub_from_negated(i32 %val, i32 %a, i32 %b) nounwind {842; CHECK-LABEL: reg32_lshr_by_sub_from_negated:843; CHECK: // %bb.0:844; CHECK-NEXT: add w8, w1, w2845; CHECK-NEXT: neg w8, w8846; CHECK-NEXT: lsr w0, w0, w8847; CHECK-NEXT: ret848 %nega = sub i32 32, %a849 %negasubb = sub i32 %nega, %b850 %shifted = lshr i32 %val, %negasubb851 ret i32 %shifted852}853define i64 @reg64_lshr_by_sub_from_negated(i64 %val, i64 %a, i64 %b) nounwind {854; CHECK-LABEL: reg64_lshr_by_sub_from_negated:855; CHECK: // %bb.0:856; CHECK-NEXT: add x8, x1, x2857; CHECK-NEXT: neg x8, x8858; CHECK-NEXT: lsr x0, x0, x8859; CHECK-NEXT: ret860 %nega = sub i64 64, %a861 %negasubb = sub i64 %nega, %b862 %shifted = lshr i64 %val, %negasubb863 ret i64 %shifted864}865 866;==============================================================================;867; subtraction of negated shift amount868 869define i32 @reg32_lshr_by_sub_of_negated(i32 %val, i32 %a, i32 %b) nounwind {870; CHECK-LABEL: reg32_lshr_by_sub_of_negated:871; CHECK: // %bb.0:872; CHECK-NEXT: add w8, w1, w2873; CHECK-NEXT: lsr w0, w0, w8874; CHECK-NEXT: ret875 %nega = sub i32 32, %a876 %negasubb = sub i32 %b, %nega877 %shifted = lshr i32 %val, %negasubb878 ret i32 %shifted879}880define i64 @reg64_lshr_by_sub_of_negated(i64 %val, i64 %a, i64 %b) nounwind {881; CHECK-LABEL: reg64_lshr_by_sub_of_negated:882; CHECK: // %bb.0:883; CHECK-NEXT: add x8, x1, x2884; CHECK-NEXT: lsr x0, x0, x8885; CHECK-NEXT: ret886 %nega = sub i64 64, %a887 %negasubb = sub i64 %b, %nega888 %shifted = lshr i64 %val, %negasubb889 ret i64 %shifted890}891 892;==============================================================================;893; add to negated shift amount894;895 896define i32 @reg32_lshr_by_add_to_negated(i32 %val, i32 %a, i32 %b) nounwind {897; CHECK-LABEL: reg32_lshr_by_add_to_negated:898; CHECK: // %bb.0:899; CHECK-NEXT: sub w8, w2, w1900; CHECK-NEXT: lsr w0, w0, w8901; CHECK-NEXT: ret902 %nega = sub i32 32, %a903 %negasubb = add i32 %nega, %b904 %shifted = lshr i32 %val, %negasubb905 ret i32 %shifted906}907define i64 @reg64_lshr_by_add_to_negated(i64 %val, i64 %a, i64 %b) nounwind {908; CHECK-LABEL: reg64_lshr_by_add_to_negated:909; CHECK: // %bb.0:910; CHECK-NEXT: sub x8, x2, x1911; CHECK-NEXT: lsr x0, x0, x8912; CHECK-NEXT: ret913 %nega = sub i64 64, %a914 %negasubb = add i64 %nega, %b915 %shifted = lshr i64 %val, %negasubb916 ret i64 %shifted917}918 919;==============================================================================;920; subtraction of negated shift amounts921 922define i32 @reg32_lshr_by_sub_of_negated_amts(i32 %val, i32 %a, i32 %b) nounwind {923; CHECK-LABEL: reg32_lshr_by_sub_of_negated_amts:924; CHECK: // %bb.0:925; CHECK-NEXT: sub w8, w2, w1926; CHECK-NEXT: lsr w0, w0, w8927; CHECK-NEXT: ret928 %nega = sub i32 32, %a929 %negb = sub i32 32, %b930 %negasubnegb = sub i32 %nega, %negb931 %shifted = lshr i32 %val, %negasubnegb932 ret i32 %shifted933}934define i64 @reg64_lshr_by_sub_of_negated_amts(i64 %val, i64 %a, i64 %b) nounwind {935; CHECK-LABEL: reg64_lshr_by_sub_of_negated_amts:936; CHECK: // %bb.0:937; CHECK-NEXT: sub x8, x2, x1938; CHECK-NEXT: lsr x0, x0, x8939; CHECK-NEXT: ret940 %nega = sub i64 64, %a941 %negb = sub i64 64, %b942 %negasubnegb = sub i64 %nega, %negb943 %shifted = lshr i64 %val, %negasubnegb944 ret i64 %shifted945}946 947;==============================================================================;948; addition of negated shift amounts949 950define i32 @reg32_lshr_by_add_of_negated_amts(i32 %val, i32 %a, i32 %b) nounwind {951; CHECK-LABEL: reg32_lshr_by_add_of_negated_amts:952; CHECK: // %bb.0:953; CHECK-NEXT: add w8, w1, w2954; CHECK-NEXT: neg w8, w8955; CHECK-NEXT: lsr w0, w0, w8956; CHECK-NEXT: ret957 %nega = sub i32 32, %a958 %negb = sub i32 32, %b959 %negasubnegb = add i32 %nega, %negb960 %shifted = lshr i32 %val, %negasubnegb961 ret i32 %shifted962}963define i64 @reg64_lshr_by_add_of_negated_amts(i64 %val, i64 %a, i64 %b) nounwind {964; CHECK-LABEL: reg64_lshr_by_add_of_negated_amts:965; CHECK: // %bb.0:966; CHECK-NEXT: add x8, x1, x2967; CHECK-NEXT: neg x8, x8968; CHECK-NEXT: lsr x0, x0, x8969; CHECK-NEXT: ret970 %nega = sub i64 64, %a971 %negb = sub i64 64, %b972 %negasubnegb = add i64 %nega, %negb973 %shifted = lshr i64 %val, %negasubnegb974 ret i64 %shifted975}976 977;==============================================================================;978; and patterns with an actual negation+addition979 980define i32 @reg32_lshr_by_negated_unfolded(i32 %val, i32 %shamt) nounwind {981; CHECK-LABEL: reg32_lshr_by_negated_unfolded:982; CHECK: // %bb.0:983; CHECK-NEXT: neg w8, w1984; CHECK-NEXT: lsr w0, w0, w8985; CHECK-NEXT: ret986 %negshamt = sub i32 0, %shamt987 %negaaddbitwidth = add i32 %negshamt, 32988 %shifted = lshr i32 %val, %negaaddbitwidth989 ret i32 %shifted990}991define i64 @reg64_lshr_by_negated_unfolded(i64 %val, i64 %shamt) nounwind {992; CHECK-LABEL: reg64_lshr_by_negated_unfolded:993; CHECK: // %bb.0:994; CHECK-NEXT: neg x8, x1995; CHECK-NEXT: lsr x0, x0, x8996; CHECK-NEXT: ret997 %negshamt = sub i64 0, %shamt998 %negaaddbitwidth = add i64 %negshamt, 64999 %shifted = lshr i64 %val, %negaaddbitwidth1000 ret i64 %shifted1001}1002 1003define i32 @reg32_lshr_by_negated_unfolded_sub_b(i32 %val, i32 %a, i32 %b) nounwind {1004; CHECK-LABEL: reg32_lshr_by_negated_unfolded_sub_b:1005; CHECK: // %bb.0:1006; CHECK-NEXT: add w8, w1, w21007; CHECK-NEXT: neg w8, w81008; CHECK-NEXT: lsr w0, w0, w81009; CHECK-NEXT: ret1010 %nega = sub i32 0, %a1011 %negaaddbitwidth = add i32 %nega, 321012 %negaaddbitwidthsubb = sub i32 %negaaddbitwidth, %b1013 %shifted = lshr i32 %val, %negaaddbitwidthsubb1014 ret i32 %shifted1015}1016define i64 @reg64_lshr_by_negated_unfolded_sub_b(i64 %val, i64 %a, i64 %b) nounwind {1017; CHECK-LABEL: reg64_lshr_by_negated_unfolded_sub_b:1018; CHECK: // %bb.0:1019; CHECK-NEXT: add x8, x1, x21020; CHECK-NEXT: neg x8, x81021; CHECK-NEXT: lsr x0, x0, x81022; CHECK-NEXT: ret1023 %nega = sub i64 0, %a1024 %negaaddbitwidth = add i64 %nega, 641025 %negaaddbitwidthsubb = sub i64 %negaaddbitwidth, %b1026 %shifted = lshr i64 %val, %negaaddbitwidthsubb1027 ret i64 %shifted1028}1029 1030define i32 @reg32_lshr_by_b_sub_negated_unfolded(i32 %val, i32 %a, i32 %b) nounwind {1031; CHECK-LABEL: reg32_lshr_by_b_sub_negated_unfolded:1032; CHECK: // %bb.0:1033; CHECK-NEXT: add w8, w2, w11034; CHECK-NEXT: lsr w0, w0, w81035; CHECK-NEXT: ret1036 %nega = sub i32 0, %a1037 %negaaddbitwidth = add i32 %nega, 321038 %negaaddbitwidthsubb = sub i32 %b, %negaaddbitwidth1039 %shifted = lshr i32 %val, %negaaddbitwidthsubb1040 ret i32 %shifted1041}1042define i64 @reg64_lshr_by_b_sub_negated_unfolded(i64 %val, i64 %a, i64 %b) nounwind {1043; CHECK-LABEL: reg64_lshr_by_b_sub_negated_unfolded:1044; CHECK: // %bb.0:1045; CHECK-NEXT: add x8, x2, x11046; CHECK-NEXT: lsr x0, x0, x81047; CHECK-NEXT: ret1048 %nega = sub i64 0, %a1049 %negaaddbitwidth = add i64 %nega, 641050 %negaaddbitwidthsubb = sub i64 %b, %negaaddbitwidth1051 %shifted = lshr i64 %val, %negaaddbitwidthsubb1052 ret i64 %shifted1053}1054 1055define i32 @reg32_lshr_by_negated_unfolded_add_b(i32 %val, i32 %a, i32 %b) nounwind {1056; CHECK-LABEL: reg32_lshr_by_negated_unfolded_add_b:1057; CHECK: // %bb.0:1058; CHECK-NEXT: sub w8, w2, w11059; CHECK-NEXT: lsr w0, w0, w81060; CHECK-NEXT: ret1061 %nega = sub i32 0, %a1062 %negaaddbitwidth = add i32 %nega, 321063 %negaaddbitwidthaddb = add i32 %negaaddbitwidth, %b1064 %shifted = lshr i32 %val, %negaaddbitwidthaddb1065 ret i32 %shifted1066}1067define i64 @reg64_lshr_by_negated_unfolded_add_b(i64 %val, i64 %a, i64 %b) nounwind {1068; CHECK-LABEL: reg64_lshr_by_negated_unfolded_add_b:1069; CHECK: // %bb.0:1070; CHECK-NEXT: sub x8, x2, x11071; CHECK-NEXT: lsr x0, x0, x81072; CHECK-NEXT: ret1073 %nega = sub i64 0, %a1074 %negaaddbitwidth = add i64 %nega, 641075 %negaaddbitwidthaddb = add i64 %negaaddbitwidth, %b1076 %shifted = lshr i64 %val, %negaaddbitwidthaddb1077 ret i64 %shifted1078}1079 1080;==============================================================================;1081; and patterns with an actual negation+mask1082 1083define i32 @reg32_lshr_by_masked_negated_unfolded(i32 %val, i32 %shamt) nounwind {1084; CHECK-LABEL: reg32_lshr_by_masked_negated_unfolded:1085; CHECK: // %bb.0:1086; CHECK-NEXT: neg w8, w11087; CHECK-NEXT: lsr w0, w0, w81088; CHECK-NEXT: ret1089 %negshamt = sub i32 0, %shamt1090 %negaaddbitwidth = and i32 %negshamt, 311091 %shifted = lshr i32 %val, %negaaddbitwidth1092 ret i32 %shifted1093}1094define i64 @reg64_lshr_by_masked_negated_unfolded(i64 %val, i64 %shamt) nounwind {1095; CHECK-LABEL: reg64_lshr_by_masked_negated_unfolded:1096; CHECK: // %bb.0:1097; CHECK-NEXT: neg w8, w11098; CHECK-NEXT: lsr x0, x0, x81099; CHECK-NEXT: ret1100 %negshamt = sub i64 0, %shamt1101 %negaaddbitwidth = and i64 %negshamt, 631102 %shifted = lshr i64 %val, %negaaddbitwidth1103 ret i64 %shifted1104}1105 1106define i32 @reg32_lshr_by_masked_negated_unfolded_sub_b(i32 %val, i32 %a, i32 %b) nounwind {1107; CHECK-LABEL: reg32_lshr_by_masked_negated_unfolded_sub_b:1108; CHECK: // %bb.0:1109; CHECK-NEXT: neg w8, w11110; CHECK-NEXT: and w8, w8, #0x1f1111; CHECK-NEXT: sub w8, w8, w21112; CHECK-NEXT: lsr w0, w0, w81113; CHECK-NEXT: ret1114 %nega = sub i32 0, %a1115 %negaaddbitwidth = and i32 %nega, 311116 %negaaddbitwidthsubb = sub i32 %negaaddbitwidth, %b1117 %shifted = lshr i32 %val, %negaaddbitwidthsubb1118 ret i32 %shifted1119}1120define i64 @reg64_lshr_by_masked_negated_unfolded_sub_b(i64 %val, i64 %a, i64 %b) nounwind {1121; CHECK-LABEL: reg64_lshr_by_masked_negated_unfolded_sub_b:1122; CHECK: // %bb.0:1123; CHECK-NEXT: neg w8, w11124; CHECK-NEXT: and x8, x8, #0x3f1125; CHECK-NEXT: sub x8, x8, x21126; CHECK-NEXT: lsr x0, x0, x81127; CHECK-NEXT: ret1128 %nega = sub i64 0, %a1129 %negaaddbitwidth = and i64 %nega, 631130 %negaaddbitwidthsubb = sub i64 %negaaddbitwidth, %b1131 %shifted = lshr i64 %val, %negaaddbitwidthsubb1132 ret i64 %shifted1133}1134 1135define i32 @reg32_lshr_by_masked_b_sub_negated_unfolded(i32 %val, i32 %a, i32 %b) nounwind {1136; CHECK-LABEL: reg32_lshr_by_masked_b_sub_negated_unfolded:1137; CHECK: // %bb.0:1138; CHECK-NEXT: neg w8, w11139; CHECK-NEXT: and w8, w8, #0x1f1140; CHECK-NEXT: sub w8, w2, w81141; CHECK-NEXT: lsr w0, w0, w81142; CHECK-NEXT: ret1143 %nega = sub i32 0, %a1144 %negaaddbitwidth = and i32 %nega, 311145 %negaaddbitwidthsubb = sub i32 %b, %negaaddbitwidth1146 %shifted = lshr i32 %val, %negaaddbitwidthsubb1147 ret i32 %shifted1148}1149define i64 @reg64_lshr_by_masked_b_sub_negated_unfolded(i64 %val, i64 %a, i64 %b) nounwind {1150; CHECK-LABEL: reg64_lshr_by_masked_b_sub_negated_unfolded:1151; CHECK: // %bb.0:1152; CHECK-NEXT: neg w8, w11153; CHECK-NEXT: and x8, x8, #0x3f1154; CHECK-NEXT: sub x8, x2, x81155; CHECK-NEXT: lsr x0, x0, x81156; CHECK-NEXT: ret1157 %nega = sub i64 0, %a1158 %negaaddbitwidth = and i64 %nega, 631159 %negaaddbitwidthsubb = sub i64 %b, %negaaddbitwidth1160 %shifted = lshr i64 %val, %negaaddbitwidthsubb1161 ret i64 %shifted1162}1163 1164define i32 @reg32_lshr_by_masked_negated_unfolded_add_b(i32 %val, i32 %a, i32 %b) nounwind {1165; CHECK-LABEL: reg32_lshr_by_masked_negated_unfolded_add_b:1166; CHECK: // %bb.0:1167; CHECK-NEXT: neg w8, w11168; CHECK-NEXT: and w8, w8, #0x1f1169; CHECK-NEXT: add w8, w8, w21170; CHECK-NEXT: lsr w0, w0, w81171; CHECK-NEXT: ret1172 %nega = sub i32 0, %a1173 %negaaddbitwidth = and i32 %nega, 311174 %negaaddbitwidthaddb = add i32 %negaaddbitwidth, %b1175 %shifted = lshr i32 %val, %negaaddbitwidthaddb1176 ret i32 %shifted1177}1178define i64 @reg64_lshr_by_masked_negated_unfolded_add_b(i64 %val, i64 %a, i64 %b) nounwind {1179; CHECK-LABEL: reg64_lshr_by_masked_negated_unfolded_add_b:1180; CHECK: // %bb.0:1181; CHECK-NEXT: neg w8, w11182; CHECK-NEXT: and x8, x8, #0x3f1183; CHECK-NEXT: add x8, x8, x21184; CHECK-NEXT: lsr x0, x0, x81185; CHECK-NEXT: ret1186 %nega = sub i64 0, %a1187 %negaaddbitwidth = and i64 %nega, 631188 %negaaddbitwidthaddb = add i64 %negaaddbitwidth, %b1189 %shifted = lshr i64 %val, %negaaddbitwidthaddb1190 ret i64 %shifted1191}1192 1193define i32 @t(i64 %x) {1194; CHECK-LABEL: t:1195; CHECK: // %bb.0:1196; CHECK-NEXT: ubfx x0, x0, #17, #281197; CHECK-NEXT: // kill: def $w0 killed $w0 killed $x01198; CHECK-NEXT: ret1199 %s = lshr i64 %x, 131200 %t = trunc i64 %s to i321201 %r = lshr i32 %t, 41202 ret i32 %r1203}1204