295 lines · plain
1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py2; RUN: llc < %s -mtriple=aarch64-- | FileCheck %s3; RUN: llc < %s -mtriple=aarch64-- -global-isel -global-isel-abort=1 | FileCheck %s --check-prefix=CHECK-GISEL4 5define i8 @shl_and(i8 %x, i8 %y) nounwind {6; CHECK-LABEL: shl_and:7; CHECK: // %bb.0:8; CHECK-NEXT: lsl w8, w0, #59; CHECK-NEXT: and w0, w8, w1, lsl #210; CHECK-NEXT: ret11;12; CHECK-GISEL-LABEL: shl_and:13; CHECK-GISEL: // %bb.0:14; CHECK-GISEL-NEXT: lsl w8, w1, #215; CHECK-GISEL-NEXT: and w0, w8, w0, lsl #516; CHECK-GISEL-NEXT: ret17 %sh0 = shl i8 %x, 318 %r = and i8 %sh0, %y19 %sh1 = shl i8 %r, 220 ret i8 %sh121}22 23define i16 @shl_or(i16 %x, i16 %y) nounwind {24; CHECK-LABEL: shl_or:25; CHECK: // %bb.0:26; CHECK-NEXT: lsl w8, w0, #1227; CHECK-NEXT: orr w0, w8, w1, lsl #728; CHECK-NEXT: ret29;30; CHECK-GISEL-LABEL: shl_or:31; CHECK-GISEL: // %bb.0:32; CHECK-GISEL-NEXT: lsl w8, w1, #733; CHECK-GISEL-NEXT: orr w0, w8, w0, lsl #1234; CHECK-GISEL-NEXT: ret35 %sh0 = shl i16 %x, 536 %r = or i16 %y, %sh037 %sh1 = shl i16 %r, 738 ret i16 %sh139}40 41define i32 @shl_xor(i32 %x, i32 %y) nounwind {42; CHECK-LABEL: shl_xor:43; CHECK: // %bb.0:44; CHECK-NEXT: lsl w8, w0, #1245; CHECK-NEXT: eor w0, w8, w1, lsl #746; CHECK-NEXT: ret47;48; CHECK-GISEL-LABEL: shl_xor:49; CHECK-GISEL: // %bb.0:50; CHECK-GISEL-NEXT: lsl w8, w1, #751; CHECK-GISEL-NEXT: eor w0, w8, w0, lsl #1252; CHECK-GISEL-NEXT: ret53 %sh0 = shl i32 %x, 554 %r = xor i32 %sh0, %y55 %sh1 = shl i32 %r, 756 ret i32 %sh157}58 59define i64 @lshr_and(i64 %x, i64 %y) nounwind {60; CHECK-LABEL: lshr_and:61; CHECK: // %bb.0:62; CHECK-NEXT: lsr x8, x0, #1263; CHECK-NEXT: and x0, x8, x1, lsr #764; CHECK-NEXT: ret65;66; CHECK-GISEL-LABEL: lshr_and:67; CHECK-GISEL: // %bb.0:68; CHECK-GISEL-NEXT: lsr x8, x1, #769; CHECK-GISEL-NEXT: and x0, x8, x0, lsr #1270; CHECK-GISEL-NEXT: ret71 %sh0 = lshr i64 %x, 572 %r = and i64 %y, %sh073 %sh1 = lshr i64 %r, 774 ret i64 %sh175}76 77define <4 x i32> @lshr_or(<4 x i32> %x, <4 x i32> %y) nounwind {78; CHECK-LABEL: lshr_or:79; CHECK: // %bb.0:80; CHECK-NEXT: ushr v1.4s, v1.4s, #781; CHECK-NEXT: ushr v0.4s, v0.4s, #1282; CHECK-NEXT: orr v0.16b, v0.16b, v1.16b83; CHECK-NEXT: ret84;85; CHECK-GISEL-LABEL: lshr_or:86; CHECK-GISEL: // %bb.0:87; CHECK-GISEL-NEXT: ushr v0.4s, v0.4s, #588; CHECK-GISEL-NEXT: orr v0.16b, v0.16b, v1.16b89; CHECK-GISEL-NEXT: ushr v0.4s, v0.4s, #790; CHECK-GISEL-NEXT: ret91 %sh0 = lshr <4 x i32> %x, <i32 5, i32 5, i32 5, i32 5>92 %r = or <4 x i32> %sh0, %y93 %sh1 = lshr <4 x i32> %r, <i32 7, i32 7, i32 7, i32 7>94 ret <4 x i32> %sh195}96 97define <8 x i16> @lshr_xor(<8 x i16> %x, <8 x i16> %y) nounwind {98; CHECK-LABEL: lshr_xor:99; CHECK: // %bb.0:100; CHECK-NEXT: ushr v1.8h, v1.8h, #7101; CHECK-NEXT: ushr v0.8h, v0.8h, #12102; CHECK-NEXT: eor v0.16b, v0.16b, v1.16b103; CHECK-NEXT: ret104;105; CHECK-GISEL-LABEL: lshr_xor:106; CHECK-GISEL: // %bb.0:107; CHECK-GISEL-NEXT: ushr v0.8h, v0.8h, #5108; CHECK-GISEL-NEXT: eor v0.16b, v1.16b, v0.16b109; CHECK-GISEL-NEXT: ushr v0.8h, v0.8h, #7110; CHECK-GISEL-NEXT: ret111 %sh0 = lshr <8 x i16> %x, <i16 5, i16 5, i16 5, i16 5, i16 5, i16 5, i16 5, i16 5>112 %r = xor <8 x i16> %y, %sh0113 %sh1 = lshr <8 x i16> %r, <i16 7, i16 7, i16 7, i16 7, i16 7, i16 7, i16 7, i16 7>114 ret <8 x i16> %sh1115}116 117 118define <16 x i8> @ashr_and(<16 x i8> %x, <16 x i8> %y) nounwind {119; CHECK-LABEL: ashr_and:120; CHECK: // %bb.0:121; CHECK-NEXT: sshr v1.16b, v1.16b, #2122; CHECK-NEXT: sshr v0.16b, v0.16b, #5123; CHECK-NEXT: and v0.16b, v0.16b, v1.16b124; CHECK-NEXT: ret125;126; CHECK-GISEL-LABEL: ashr_and:127; CHECK-GISEL: // %bb.0:128; CHECK-GISEL-NEXT: sshr v0.16b, v0.16b, #3129; CHECK-GISEL-NEXT: and v0.16b, v1.16b, v0.16b130; CHECK-GISEL-NEXT: sshr v0.16b, v0.16b, #2131; CHECK-GISEL-NEXT: ret132 %sh0 = ashr <16 x i8> %x, <i8 3, i8 3, i8 3, i8 3, i8 3, i8 3, i8 3, i8 3, i8 3, i8 3, i8 3, i8 3, i8 3, i8 3, i8 3, i8 3>133 %r = and <16 x i8> %y, %sh0134 %sh1 = ashr <16 x i8> %r, <i8 2, i8 2, i8 2, i8 2, i8 2, i8 2, i8 2, i8 2, i8 2, i8 2, i8 2, i8 2, i8 2, i8 2, i8 2, i8 2>135 ret <16 x i8> %sh1136}137 138define <2 x i64> @ashr_or(<2 x i64> %x, <2 x i64> %y) nounwind {139; CHECK-LABEL: ashr_or:140; CHECK: // %bb.0:141; CHECK-NEXT: sshr v1.2d, v1.2d, #7142; CHECK-NEXT: sshr v0.2d, v0.2d, #12143; CHECK-NEXT: orr v0.16b, v0.16b, v1.16b144; CHECK-NEXT: ret145;146; CHECK-GISEL-LABEL: ashr_or:147; CHECK-GISEL: // %bb.0:148; CHECK-GISEL-NEXT: sshr v0.2d, v0.2d, #5149; CHECK-GISEL-NEXT: orr v0.16b, v0.16b, v1.16b150; CHECK-GISEL-NEXT: sshr v0.2d, v0.2d, #7151; CHECK-GISEL-NEXT: ret152 %sh0 = ashr <2 x i64> %x, <i64 5, i64 5>153 %r = or <2 x i64> %sh0, %y154 %sh1 = ashr <2 x i64> %r, <i64 7, i64 7>155 ret <2 x i64> %sh1156}157 158define i32 @ashr_xor(i32 %x, i32 %y) nounwind {159; CHECK-LABEL: ashr_xor:160; CHECK: // %bb.0:161; CHECK-NEXT: asr w8, w0, #12162; CHECK-NEXT: eor w0, w8, w1, asr #7163; CHECK-NEXT: ret164;165; CHECK-GISEL-LABEL: ashr_xor:166; CHECK-GISEL: // %bb.0:167; CHECK-GISEL-NEXT: asr w8, w1, #7168; CHECK-GISEL-NEXT: eor w0, w8, w0, asr #12169; CHECK-GISEL-NEXT: ret170 %sh0 = ashr i32 %x, 5171 %r = xor i32 %y, %sh0172 %sh1 = ashr i32 %r, 7173 ret i32 %sh1174}175 176define i32 @shr_mismatch_xor(i32 %x, i32 %y) nounwind {177; CHECK-LABEL: shr_mismatch_xor:178; CHECK: // %bb.0:179; CHECK-NEXT: eor w8, w1, w0, asr #5180; CHECK-NEXT: lsr w0, w8, #7181; CHECK-NEXT: ret182;183; CHECK-GISEL-LABEL: shr_mismatch_xor:184; CHECK-GISEL: // %bb.0:185; CHECK-GISEL-NEXT: eor w8, w1, w0, asr #5186; CHECK-GISEL-NEXT: lsr w0, w8, #7187; CHECK-GISEL-NEXT: ret188 %sh0 = ashr i32 %x, 5189 %r = xor i32 %y, %sh0190 %sh1 = lshr i32 %r, 7191 ret i32 %sh1192}193 194define i32 @ashr_overshift_xor(i32 %x, i32 %y) nounwind {195; CHECK-LABEL: ashr_overshift_xor:196; CHECK: // %bb.0:197; CHECK-NEXT: eor w8, w1, w0, asr #15198; CHECK-NEXT: asr w0, w8, #17199; CHECK-NEXT: ret200;201; CHECK-GISEL-LABEL: ashr_overshift_xor:202; CHECK-GISEL: // %bb.0:203; CHECK-GISEL-NEXT: eor w8, w1, w0, asr #15204; CHECK-GISEL-NEXT: asr w0, w8, #17205; CHECK-GISEL-NEXT: ret206 %sh0 = ashr i32 %x, 15207 %r = xor i32 %y, %sh0208 %sh1 = ashr i32 %r, 17209 ret i32 %sh1210}211 212define i32 @lshr_or_extra_use(i32 %x, i32 %y, ptr %p) nounwind {213; CHECK-LABEL: lshr_or_extra_use:214; CHECK: // %bb.0:215; CHECK-NEXT: orr w8, w1, w0, lsr #5216; CHECK-NEXT: lsr w0, w8, #7217; CHECK-NEXT: str w8, [x2]218; CHECK-NEXT: ret219;220; CHECK-GISEL-LABEL: lshr_or_extra_use:221; CHECK-GISEL: // %bb.0:222; CHECK-GISEL-NEXT: orr w8, w1, w0, lsr #5223; CHECK-GISEL-NEXT: lsr w0, w8, #7224; CHECK-GISEL-NEXT: str w8, [x2]225; CHECK-GISEL-NEXT: ret226 %sh0 = lshr i32 %x, 5227 %r = or i32 %sh0, %y228 store i32 %r, ptr %p229 %sh1 = lshr i32 %r, 7230 ret i32 %sh1231}232 233define i64 @desirable_to_commute1(i64 %x) {234; CHECK-LABEL: desirable_to_commute1:235; CHECK: // %bb.0:236; CHECK-NEXT: and x0, x0, #0x7fff8237; CHECK-NEXT: ret238;239; CHECK-GISEL-LABEL: desirable_to_commute1:240; CHECK-GISEL: // %bb.0:241; CHECK-GISEL-NEXT: ubfx x8, x0, #3, #16242; CHECK-GISEL-NEXT: lsl x0, x8, #3243; CHECK-GISEL-NEXT: ret244 %s1 = lshr i64 %x, 3245 %a = and i64 %s1, 65535246 %s2 = shl i64 %a, 3247 ret i64 %s2248}249 250define i64 @desirable_to_commute2(ptr %p, i64 %i) {251; CHECK-LABEL: desirable_to_commute2:252; CHECK: // %bb.0:253; CHECK-NEXT: and x8, x1, #0x1ff8254; CHECK-NEXT: ldr x0, [x0, x8]255; CHECK-NEXT: ret256;257; CHECK-GISEL-LABEL: desirable_to_commute2:258; CHECK-GISEL: // %bb.0:259; CHECK-GISEL-NEXT: ubfx x8, x1, #3, #10260; CHECK-GISEL-NEXT: ldr x0, [x0, x8, lsl #3]261; CHECK-GISEL-NEXT: ret262 %lshr = lshr i64 %i, 3263 %and = and i64 %lshr, 1023264 %pidx = getelementptr i64, ptr %p, i64 %and265 %r = load i64, ptr %pidx266 ret i64 %r267}268 269; Shrink demanded op will shrink the shl to i32,270; Lshr and shl will have different shift amount type.271; Compare apint will cause crash when type is different.272define void @apint_type_mismatch(i16 %a, ptr %p) {273; CHECK-LABEL: apint_type_mismatch:274; CHECK: // %bb.0: // %entry275; CHECK-NEXT: and w8, w0, #0x7f8276; CHECK-NEXT: str w8, [x1]277; CHECK-NEXT: ret278;279; CHECK-GISEL-LABEL: apint_type_mismatch:280; CHECK-GISEL: // %bb.0: // %entry281; CHECK-GISEL-NEXT: ubfx w8, w0, #3, #13282; CHECK-GISEL-NEXT: and w8, w8, #0xff283; CHECK-GISEL-NEXT: lsl w8, w8, #3284; CHECK-GISEL-NEXT: str w8, [x1]285; CHECK-GISEL-NEXT: ret286entry:287 %lshr = lshr i16 %a, 3288 %and = and i16 %lshr, 255289 %zext = zext i16 %and to i64290 %shl = shl i64 %zext, 3291 %trunc = trunc i64 %shl to i32292 store i32 %trunc, ptr %p293 ret void294}295