239 lines · plain
1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 52; RUN: llc < %s -mtriple=aarch64 | FileCheck %s3 4define <2 x i8> @test_v16i8_v2i32_824(<16 x i8> %a, <16 x i8> %b) {5; CHECK-LABEL: test_v16i8_v2i32_824:6; CHECK: // %bb.0:7; CHECK-NEXT: mov b0, v0.b[8]8; CHECK-NEXT: mov v0.b[4], v1.b[8]9; CHECK-NEXT: add v0.2s, v0.2s, v0.2s10; CHECK-NEXT: ret11 %c = shufflevector <16 x i8> %a, <16 x i8> %b, <2 x i32> <i32 8, i32 24>12 %d = add <2 x i8> %c, %c13 ret <2 x i8> %d14}15 16define <2 x i8> @test_v16i8_v2i32_016(<16 x i8> %a, <16 x i8> %b) {17; CHECK-LABEL: test_v16i8_v2i32_016:18; CHECK: // %bb.0:19; CHECK-NEXT: mov b0, v0.b[0]20; CHECK-NEXT: mov v0.b[4], v1.b[0]21; CHECK-NEXT: add v0.2s, v0.2s, v0.2s22; CHECK-NEXT: ret23 %c = shufflevector <16 x i8> %a, <16 x i8> %b, <2 x i32> <i32 0, i32 16>24 %d = add <2 x i8> %c, %c25 ret <2 x i8> %d26}27 28define <2 x i8> @test_v8i8_v2i32_08(<8 x i8> %a, <8 x i8> %b) {29; CHECK-LABEL: test_v8i8_v2i32_08:30; CHECK: // %bb.0:31; CHECK-NEXT: // kill: def $d0 killed $d0 def $q032; CHECK-NEXT: // kill: def $d1 killed $d1 def $q133; CHECK-NEXT: mov b0, v0.b[0]34; CHECK-NEXT: mov v0.b[4], v1.b[0]35; CHECK-NEXT: add v0.2s, v0.2s, v0.2s36; CHECK-NEXT: ret37 %c = shufflevector <8 x i8> %a, <8 x i8> %b, <2 x i32> <i32 0, i32 8>38 %d = add <2 x i8> %c, %c39 ret <2 x i8> %d40}41 42define <2 x i16> @test_v8i16_v2i32_08(<8 x i16> %a, <8 x i16> %b) {43; CHECK-LABEL: test_v8i16_v2i32_08:44; CHECK: // %bb.0:45; CHECK-NEXT: mov h0, v0.h[0]46; CHECK-NEXT: mov v0.h[2], v1.h[0]47; CHECK-NEXT: add v0.2s, v0.2s, v0.2s48; CHECK-NEXT: ret49 %c = shufflevector <8 x i16> %a, <8 x i16> %b, <2 x i32> <i32 0, i32 8>50 %d = add <2 x i16> %c, %c51 ret <2 x i16> %d52}53 54define <2 x i16> @test_v4i16_v2i32_04(<4 x i16> %a, <4 x i16> %b) {55; CHECK-LABEL: test_v4i16_v2i32_04:56; CHECK: // %bb.0:57; CHECK-NEXT: // kill: def $d0 killed $d0 def $q058; CHECK-NEXT: // kill: def $d1 killed $d1 def $q159; CHECK-NEXT: mov h0, v0.h[0]60; CHECK-NEXT: mov v0.h[2], v1.h[0]61; CHECK-NEXT: add v0.2s, v0.2s, v0.2s62; CHECK-NEXT: ret63 %c = shufflevector <4 x i16> %a, <4 x i16> %b, <2 x i32> <i32 0, i32 4>64 %d = add <2 x i16> %c, %c65 ret <2 x i16> %d66}67 68 69define <4 x i8> @test_v16i8_v4i16_824(<16 x i8> %a, <16 x i8> %b) {70; CHECK-LABEL: test_v16i8_v4i16_824:71; CHECK: // %bb.0:72; CHECK-NEXT: mov b2, v0.b[8]73; CHECK-NEXT: mov v2.b[2], v1.b[8]74; CHECK-NEXT: mov v2.b[4], v0.b[0]75; CHECK-NEXT: mov v2.b[6], v1.b[0]76; CHECK-NEXT: add v0.4h, v2.4h, v2.4h77; CHECK-NEXT: ret78 %c = shufflevector <16 x i8> %a, <16 x i8> %b, <4 x i32> <i32 8, i32 24, i32 0, i32 16>79 %d = add <4 x i8> %c, %c80 ret <4 x i8> %d81}82 83define <4 x i8> @test_v16i8_v4i16_016(<16 x i8> %a, <16 x i8> %b) {84; CHECK-LABEL: test_v16i8_v4i16_016:85; CHECK: // %bb.0:86; CHECK-NEXT: mov b2, v0.b[0]87; CHECK-NEXT: mov v2.b[2], v1.b[0]88; CHECK-NEXT: mov v2.b[4], v0.b[4]89; CHECK-NEXT: mov v2.b[6], v1.b[4]90; CHECK-NEXT: add v0.4h, v2.4h, v2.4h91; CHECK-NEXT: ret92 %c = shufflevector <16 x i8> %a, <16 x i8> %b, <4 x i32> <i32 0, i32 16, i32 4, i32 20>93 %d = add <4 x i8> %c, %c94 ret <4 x i8> %d95}96 97define <4 x i8> @test_v8i8_v4i16_08(<8 x i8> %a, <8 x i8> %b) {98; CHECK-LABEL: test_v8i8_v4i16_08:99; CHECK: // %bb.0:100; CHECK-NEXT: // kill: def $d0 killed $d0 def $q0101; CHECK-NEXT: mov b2, v0.b[0]102; CHECK-NEXT: // kill: def $d1 killed $d1 def $q1103; CHECK-NEXT: mov v2.b[2], v1.b[0]104; CHECK-NEXT: mov v2.b[4], v0.b[4]105; CHECK-NEXT: mov v2.b[6], v1.b[4]106; CHECK-NEXT: add v0.4h, v2.4h, v2.4h107; CHECK-NEXT: ret108 %c = shufflevector <8 x i8> %a, <8 x i8> %b, <4 x i32> <i32 0, i32 8, i32 4, i32 12>109 %d = add <4 x i8> %c, %c110 ret <4 x i8> %d111}112 113define <4 x i16> @test_v8i16_v4i16_08(<8 x i16> %a, <8 x i16> %b) {114; CHECK-LABEL: test_v8i16_v4i16_08:115; CHECK: // %bb.0:116; CHECK-NEXT: adrp x8, .LCPI8_0117; CHECK-NEXT: // kill: def $q1 killed $q1 killed $q0_q1 def $q0_q1118; CHECK-NEXT: ldr q2, [x8, :lo12:.LCPI8_0]119; CHECK-NEXT: // kill: def $q0 killed $q0 killed $q0_q1 def $q0_q1120; CHECK-NEXT: tbl v0.16b, { v0.16b, v1.16b }, v2.16b121; CHECK-NEXT: add v0.4h, v0.4h, v0.4h122; CHECK-NEXT: ret123 %c = shufflevector <8 x i16> %a, <8 x i16> %b, <4 x i32> <i32 0, i32 7, i32 6, i32 12>124 %d = add <4 x i16> %c, %c125 ret <4 x i16> %d126}127 128define <4 x i16> @test_v4i16_v4i16_04(<4 x i16> %a, <4 x i16> %b) {129; CHECK-LABEL: test_v4i16_v4i16_04:130; CHECK: // %bb.0:131; CHECK-NEXT: ext v1.8b, v1.8b, v0.8b, #2132; CHECK-NEXT: trn2 v0.4h, v1.4h, v0.4h133; CHECK-NEXT: ext v0.8b, v0.8b, v1.8b, #4134; CHECK-NEXT: add v0.4h, v0.4h, v0.4h135; CHECK-NEXT: ret136 %c = shufflevector <4 x i16> %a, <4 x i16> %b, <4 x i32> <i32 0, i32 3, i32 5, i32 6>137 %d = add <4 x i16> %c, %c138 ret <4 x i16> %d139}140 141 142define i1 @test1(ptr %add.ptr, ptr %result, <2 x i64> %hi, <2 x i64> %lo) {143; CHECK-LABEL: test1:144; CHECK: // %bb.0:145; CHECK-NEXT: ldr q2, [x0]146; CHECK-NEXT: movi v3.16b, #1147; CHECK-NEXT: mov w12, #1 // =0x1148; CHECK-NEXT: cmgt v0.2d, v2.2d, v0.2d149; CHECK-NEXT: cmgt v4.2d, v1.2d, v2.2d150; CHECK-NEXT: and v0.16b, v0.16b, v3.16b151; CHECK-NEXT: and v3.16b, v4.16b, v3.16b152; CHECK-NEXT: umov w8, v0.b[8]153; CHECK-NEXT: umov w9, v3.b[8]154; CHECK-NEXT: umov w10, v0.b[0]155; CHECK-NEXT: umov w11, v3.b[0]156; CHECK-NEXT: sub v0.2d, v2.2d, v1.2d157; CHECK-NEXT: dup v1.2d, x12158; CHECK-NEXT: orr w8, w8, w9159; CHECK-NEXT: add v0.2d, v0.2d, v1.2d160; CHECK-NEXT: orr w8, w10, w8, lsl #1161; CHECK-NEXT: orr w8, w8, w11162; CHECK-NEXT: str q0, [x1]163; CHECK-NEXT: tst w8, #0x3164; CHECK-NEXT: cset w0, eq165; CHECK-NEXT: ret166 %19 = load <2 x i64>, ptr %add.ptr, align 8167 %cmp = icmp sgt <2 x i64> %19, %hi168 %sext = sext <2 x i1> %cmp to <2 x i64>169 %20 = bitcast <2 x i64> %sext to <16 x i8>170 %21 = and <16 x i8> %20, <i8 1, i8 poison, i8 poison, i8 poison, i8 poison, i8 poison, i8 poison, i8 poison, i8 1, i8 poison, i8 poison, i8 poison, i8 poison, i8 poison, i8 poison, i8 poison>171 %storedv = extractelement <16 x i8> %21, i64 0172 %storedv.1 = extractelement <16 x i8> %21, i64 8173 %22 = shl nuw nsw i8 %storedv.1, 1174 %or.111 = or disjoint i8 %22, %storedv175 %cmp101 = icmp slt <2 x i64> %19, %lo176 %sext102 = sext <2 x i1> %cmp101 to <2 x i64>177 %23 = bitcast <2 x i64> %sext102 to <16 x i8>178 %24 = and <16 x i8> %23, <i8 1, i8 poison, i8 poison, i8 poison, i8 poison, i8 poison, i8 poison, i8 poison, i8 1, i8 poison, i8 poison, i8 poison, i8 poison, i8 poison, i8 poison, i8 poison>179 %storedv104 = extractelement <16 x i8> %24, i64 0180 %storedv.1105 = extractelement <16 x i8> %24, i64 8181 %25 = shl nuw nsw i8 %storedv.1105, 1182 %or.111106 = or disjoint i8 %25, %storedv104183 %reass.sub = sub <2 x i64> %19, %lo184 %add = add <2 x i64> %reass.sub, splat (i64 1)185 store <2 x i64> %add, ptr %result, align 8186 %or118 = or i8 %or.111, %or.111106187 %cmp24.not = icmp eq i8 %or118, 0188 ret i1 %cmp24.not189}190 191define i1 @test2(ptr %add.ptr, ptr %result, <2 x i64> %hi, <2 x i64> %lo) {192; CHECK-LABEL: test2:193; CHECK: // %bb.0:194; CHECK-NEXT: ldr q2, [x0]195; CHECK-NEXT: movi v3.16b, #1196; CHECK-NEXT: mov w9, #1 // =0x1197; CHECK-NEXT: cmgt v0.2d, v2.2d, v0.2d198; CHECK-NEXT: cmgt v4.2d, v1.2d, v2.2d199; CHECK-NEXT: sub v1.2d, v2.2d, v1.2d200; CHECK-NEXT: dup v2.2d, x9201; CHECK-NEXT: and v0.16b, v0.16b, v3.16b202; CHECK-NEXT: and v3.16b, v4.16b, v3.16b203; CHECK-NEXT: mov b5, v0.b[8]204; CHECK-NEXT: mov b0, v0.b[0]205; CHECK-NEXT: mov v5.b[4], v3.b[8]206; CHECK-NEXT: mov v0.b[4], v3.b[0]207; CHECK-NEXT: add v3.2s, v5.2s, v5.2s208; CHECK-NEXT: orr v0.8b, v3.8b, v0.8b209; CHECK-NEXT: mov w8, v0.s[1]210; CHECK-NEXT: fmov w9, s0211; CHECK-NEXT: add v0.2d, v1.2d, v2.2d212; CHECK-NEXT: str q0, [x1]213; CHECK-NEXT: orr w8, w9, w8214; CHECK-NEXT: tst w8, #0xff215; CHECK-NEXT: cset w0, eq216; CHECK-NEXT: ret217 %1 = load <2 x i64>, ptr %add.ptr, align 8218 %cmp = icmp sgt <2 x i64> %1, %hi219 %sext = sext <2 x i1> %cmp to <2 x i64>220 %2 = bitcast <2 x i64> %sext to <16 x i8>221 %3 = and <16 x i8> %2, <i8 1, i8 poison, i8 poison, i8 poison, i8 poison, i8 poison, i8 poison, i8 poison, i8 1, i8 poison, i8 poison, i8 poison, i8 poison, i8 poison, i8 poison, i8 poison>222 %cmp101 = icmp slt <2 x i64> %1, %lo223 %sext102 = sext <2 x i1> %cmp101 to <2 x i64>224 %4 = bitcast <2 x i64> %sext102 to <16 x i8>225 %5 = and <16 x i8> %4, <i8 1, i8 poison, i8 poison, i8 poison, i8 poison, i8 poison, i8 poison, i8 poison, i8 1, i8 poison, i8 poison, i8 poison, i8 poison, i8 poison, i8 poison, i8 poison>226 %6 = shufflevector <16 x i8> %3, <16 x i8> %5, <2 x i32> <i32 8, i32 24>227 %7 = shl nuw nsw <2 x i8> %6, splat (i8 1)228 %8 = shufflevector <16 x i8> %3, <16 x i8> %5, <2 x i32> <i32 0, i32 16>229 %9 = or disjoint <2 x i8> %7, %8230 %reass.sub = sub <2 x i64> %1, %lo231 %add = add <2 x i64> %reass.sub, splat (i64 1)232 store <2 x i64> %add, ptr %result, align 8233 %10 = extractelement <2 x i8> %9, i32 0234 %11 = extractelement <2 x i8> %9, i32 1235 %or118 = or i8 %10, %11236 %cmp24.not = icmp eq i8 %or118, 0237 ret i1 %cmp24.not238}239