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1# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py UTC_ARGS: --version 42# RUN: llc --run-pass=machine-sink %s -o - | FileCheck %s3 4# Test that the "killed" flags are cleared in the ORRWrs and SUBSWrr instructions5# in 'f and @g, respectively6 7--- |8 source_filename = "crash.ll"9 target datalayout = "e-m:e-i8:8:32-i16:16:32-i64:64-i128:128-n32:64-S128"10 target triple = "aarch64-linux"11 12 define i32 @f(ptr %image, i32 %i) {13 entry:14 %add = add i32 %i, 115 %idx = zext i32 %add to i6416 br label %A17 18 A: ; preds = %B, %A, %entry19 %sunkaddr = getelementptr i8, ptr %image, i64 %idx20 %0 = load i8, ptr %sunkaddr, align 121 %cmp153 = icmp eq i8 %0, 022 br i1 %cmp153, label %B, label %A23 24 B: ; preds = %A25 store i32 0, ptr %image, align 126 br label %A27 }28 29 define i32 @g(i32 %i, i32 %j) {30 entry:31 %add = add i32 %i, %j32 %neg = sub i32 0, %i33 br label %A34 35 A: ; preds = %B, %A, %entry36 %0 = call i8 @h(i32 %add)37 %c = icmp eq i8 %0, 038 br i1 %c, label %B, label %A39 40 B: ; preds = %A41 %1 = call i8 @h(i32 %neg)42 br label %A43 }44 45 declare i8 @h(i32)46 47...48---49name: f50alignment: 451tracksRegLiveness: true52registers:53 - { id: 0, class: gpr64, preferred-register: '' }54 - { id: 1, class: gpr64common, preferred-register: '' }55 - { id: 2, class: gpr32common, preferred-register: '' }56 - { id: 3, class: gpr32common, preferred-register: '' }57 - { id: 4, class: gpr32, preferred-register: '' }58 - { id: 5, class: gpr32, preferred-register: '' }59 - { id: 6, class: gpr32, preferred-register: '' }60liveins:61 - { reg: '$x0', virtual-reg: '%1' }62 - { reg: '$w1', virtual-reg: '%2' }63body: |64 ; CHECK-LABEL: name: f65 ; CHECK: bb.0.entry:66 ; CHECK-NEXT: successors: %bb.1(0x80000000)67 ; CHECK-NEXT: liveins: $x0, $w168 ; CHECK-NEXT: {{ $}}69 ; CHECK-NEXT: [[COPY:%[0-9]+]]:gpr32common = COPY $w170 ; CHECK-NEXT: [[COPY1:%[0-9]+]]:gpr64common = COPY $x071 ; CHECK-NEXT: [[ADDWri:%[0-9]+]]:gpr32common = ADDWri [[COPY]], 1, 072 ; CHECK-NEXT: [[ORRWrs:%[0-9]+]]:gpr32 = ORRWrs $wzr, [[ADDWri]], 073 ; CHECK-NEXT: {{ $}}74 ; CHECK-NEXT: bb.1.A:75 ; CHECK-NEXT: successors: %bb.2(0x30000000), %bb.1(0x50000000)76 ; CHECK-NEXT: {{ $}}77 ; CHECK-NEXT: [[LDRBBroW:%[0-9]+]]:gpr32 = LDRBBroW [[COPY1]], [[ADDWri]], 0, 0 :: (load (s8) from %ir.sunkaddr)78 ; CHECK-NEXT: CBNZW killed [[LDRBBroW]], %bb.179 ; CHECK-NEXT: B %bb.280 ; CHECK-NEXT: {{ $}}81 ; CHECK-NEXT: bb.2.B:82 ; CHECK-NEXT: successors: %bb.1(0x80000000)83 ; CHECK-NEXT: {{ $}}84 ; CHECK-NEXT: [[COPY2:%[0-9]+]]:gpr32 = COPY $wzr85 ; CHECK-NEXT: STRWui [[COPY2]], [[COPY1]], 0 :: (store (s32) into %ir.image, align 1)86 ; CHECK-NEXT: B %bb.187 bb.0.entry:88 successors: %bb.1(0x80000000)89 liveins: $x0, $w190 91 %2:gpr32common = COPY $w192 %1:gpr64common = COPY $x093 %3:gpr32common = ADDWri %2, 1, 094 %4:gpr32 = ORRWrs $wzr, killed %3, 095 %0:gpr64 = SUBREG_TO_REG 0, killed %4, %subreg.sub_3296 97 bb.1.A:98 successors: %bb.2(0x30000000), %bb.1(0x50000000)99 100 %5:gpr32 = LDRBBroX %1, %0, 0, 0 :: (load (s8) from %ir.sunkaddr)101 CBNZW killed %5, %bb.1102 B %bb.2103 104 bb.2.B:105 successors: %bb.1(0x80000000)106 107 %6:gpr32 = COPY $wzr108 STRWui %6, %1, 0 :: (store (s32) into %ir.image, align 1)109 B %bb.1110...111---112name: g113alignment: 4114registers:115 - { id: 0, class: gpr32all, preferred-register: '' }116 - { id: 1, class: gpr32all, preferred-register: '' }117 - { id: 2, class: gpr32, preferred-register: '' }118 - { id: 3, class: gpr32, preferred-register: '' }119 - { id: 4, class: gpr32, preferred-register: '' }120 - { id: 5, class: gpr32, preferred-register: '' }121 - { id: 6, class: gpr32, preferred-register: '' }122 - { id: 7, class: gpr32, preferred-register: '' }123 - { id: 8, class: gpr32common, preferred-register: '' }124 - { id: 9, class: gpr32all, preferred-register: '' }125liveins:126 - { reg: '$w0', virtual-reg: '%2' }127 - { reg: '$w1', virtual-reg: '%3' }128body: |129 ; CHECK-LABEL: name: g130 ; CHECK: bb.0.entry:131 ; CHECK-NEXT: successors: %bb.1(0x80000000)132 ; CHECK-NEXT: liveins: $w0, $w1133 ; CHECK-NEXT: {{ $}}134 ; CHECK-NEXT: [[COPY:%[0-9]+]]:gpr32 = COPY $w1135 ; CHECK-NEXT: [[COPY1:%[0-9]+]]:gpr32 = COPY $w0136 ; CHECK-NEXT: [[COPY2:%[0-9]+]]:gpr32 = COPY $wzr137 ; CHECK-NEXT: [[SUBSWrr:%[0-9]+]]:gpr32 = SUBSWrr [[COPY2]], [[COPY1]], implicit-def dead $nzcv138 ; CHECK-NEXT: [[COPY3:%[0-9]+]]:gpr32all = COPY [[SUBSWrr]]139 ; CHECK-NEXT: {{ $}}140 ; CHECK-NEXT: bb.1.A:141 ; CHECK-NEXT: successors: %bb.2(0x30000000), %bb.1(0x50000000)142 ; CHECK-NEXT: {{ $}}143 ; CHECK-NEXT: ADJCALLSTACKDOWN 0, 0, implicit-def dead $sp, implicit $sp144 ; CHECK-NEXT: $w0 = ADDWrr [[COPY1]], [[COPY]]145 ; CHECK-NEXT: BL @h, csr_aarch64_aapcs, implicit-def dead $lr, implicit $sp, implicit $w0, implicit-def $sp, implicit-def $w0146 ; CHECK-NEXT: ADJCALLSTACKUP 0, 0, implicit-def dead $sp, implicit $sp147 ; CHECK-NEXT: [[COPY4:%[0-9]+]]:gpr32 = COPY $w0148 ; CHECK-NEXT: $wzr = ANDSWri [[COPY4]], 7, implicit-def $nzcv149 ; CHECK-NEXT: Bcc 1, %bb.1, implicit $nzcv150 ; CHECK-NEXT: B %bb.2151 ; CHECK-NEXT: {{ $}}152 ; CHECK-NEXT: bb.2.B:153 ; CHECK-NEXT: successors: %bb.1(0x80000000)154 ; CHECK-NEXT: {{ $}}155 ; CHECK-NEXT: ADJCALLSTACKDOWN 0, 0, implicit-def dead $sp, implicit $sp156 ; CHECK-NEXT: $w0 = COPY [[COPY3]]157 ; CHECK-NEXT: BL @h, csr_aarch64_aapcs, implicit-def dead $lr, implicit $sp, implicit $w0, implicit-def $sp, implicit-def $w0158 ; CHECK-NEXT: ADJCALLSTACKUP 0, 0, implicit-def dead $sp, implicit $sp159 ; CHECK-NEXT: B %bb.1160 bb.0.entry:161 successors: %bb.1(0x80000000)162 liveins: $w0, $w1163 164 %3:gpr32 = COPY $w1165 %2:gpr32 = COPY $w0166 %4:gpr32 = ADDWrr %2, killed %3167 %0:gpr32all = COPY %4168 %5:gpr32 = COPY $wzr169 %6:gpr32 = SUBSWrr %5, killed %2, implicit-def dead $nzcv170 %1:gpr32all = COPY %6171 172 bb.1.A:173 successors: %bb.2(0x30000000), %bb.1(0x50000000)174 175 ADJCALLSTACKDOWN 0, 0, implicit-def dead $sp, implicit $sp176 $w0 = COPY %0177 BL @h, csr_aarch64_aapcs, implicit-def dead $lr, implicit $sp, implicit $w0, implicit-def $sp, implicit-def $w0178 ADJCALLSTACKUP 0, 0, implicit-def dead $sp, implicit $sp179 %7:gpr32 = COPY $w0180 $wzr = ANDSWri %7, 7, implicit-def $nzcv181 Bcc 1, %bb.1, implicit $nzcv182 B %bb.2183 184 bb.2.B:185 successors: %bb.1(0x80000000)186 187 ADJCALLSTACKDOWN 0, 0, implicit-def dead $sp, implicit $sp188 $w0 = COPY %1189 BL @h, csr_aarch64_aapcs, implicit-def dead $lr, implicit $sp, implicit $w0, implicit-def $sp, implicit-def $w0190 ADJCALLSTACKUP 0, 0, implicit-def dead $sp, implicit $sp191 B %bb.1192 193...194