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1# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py UTC_ARGS: --version 32# RUN: llc --run-pass=machine-sink --aarch64-enable-sink-fold=true %s -o - | FileCheck %s3--- |4 source_filename = "../llvm/test/CodeGen/AArch64/GlobalISel/sink-and-fold-illegal-shift.ll"5 target datalayout = "e-m:e-i8:8:32-i16:16:32-i64:64-i128:128-n32:64-S128"6 target triple = "aarch64-linux"7 8 define void @f(ptr %p, i64 %i) #0 {9 %d = ashr i64 %i, 3210 %a = getelementptr i8, ptr %p, i64 %d11 store i8 0, ptr %a, align 112 ret void13 }14 15 attributes #0 = { optsize }16 17...18---19name: f20alignment: 421exposesReturnsTwice: false22legalized: true23regBankSelected: true24selected: true25failedISel: false26tracksRegLiveness: true27hasWinCFI: false28callsEHReturn: false29callsUnwindInit: false30hasEHContTarget: false31hasEHScopes: false32hasEHFunclets: false33isOutlined: false34debugInstrRef: false35failsVerification: false36tracksDebugUserValues: false37registers:38 - { id: 0, class: gpr64, preferred-register: '' }39 - { id: 1, class: gpr64, preferred-register: '' }40 - { id: 2, class: gpr, preferred-register: '' }41 - { id: 3, class: gpr, preferred-register: '' }42 - { id: 4, class: gpr64common, preferred-register: '' }43 - { id: 5, class: _, preferred-register: '' }44 - { id: 6, class: gpr, preferred-register: '' }45 - { id: 7, class: gpr64, preferred-register: '' }46liveins:47 - { reg: '$x0', virtual-reg: '' }48 - { reg: '$x1', virtual-reg: '' }49frameInfo:50 isFrameAddressTaken: false51 isReturnAddressTaken: false52 hasStackMap: false53 hasPatchPoint: false54 stackSize: 055 offsetAdjustment: 056 maxAlignment: 157 adjustsStack: false58 hasCalls: false59 stackProtector: ''60 functionContext: ''61 maxCallFrameSize: 062 cvBytesOfCalleeSavedRegisters: 063 hasOpaqueSPAdjustment: false64 hasVAStart: false65 hasMustTailInVarArgFunc: false66 hasTailCall: false67 localFrameSize: 068 savePoint: []69 restorePoint: []70fixedStack: []71stack: []72entry_values: []73callSites: []74debugValueSubstitutions: []75constants: []76machineFunctionInfo: {}77body: |78 bb.1 (%ir-block.0):79 liveins: $x0, $x180 81 ; CHECK-LABEL: name: f82 ; CHECK: liveins: $x0, $x183 ; CHECK-NEXT: {{ $}}84 ; CHECK-NEXT: [[COPY:%[0-9]+]]:gpr64 = COPY $x085 ; CHECK-NEXT: [[COPY1:%[0-9]+]]:gpr64 = COPY $x186 ; CHECK-NEXT: [[ADDXrs:%[0-9]+]]:gpr64common = ADDXrs [[COPY]], [[COPY1]], 16087 ; CHECK-NEXT: STRBBui $wzr, [[ADDXrs]], 0 :: (store (s8) into %ir.a)88 ; CHECK-NEXT: RET_ReallyLR89 %0:gpr64 = COPY $x090 %1:gpr64 = COPY $x191 %4:gpr64common = ADDXrs %0, %1, 16092 STRBBui $wzr, %4, 0 :: (store (s8) into %ir.a)93 RET_ReallyLR94 95...96