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1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py2; RUN: llc -O0 -mtriple=aarch64 -mattr=+sve < %s | FileCheck %s --check-prefixes=CHECK,CHECK-O03; RUN: llc -O3 -mtriple=aarch64 -mattr=+sve < %s | FileCheck %s --check-prefixes=CHECK,CHECK-O34 5;6; Test simple loads, stores and return.7;8define target("aarch64.svcount") @test_load(ptr %ptr) nounwind {9; CHECK-LABEL: test_load:10; CHECK: // %bb.0:11; CHECK-NEXT: ldr p0, [x0]12; CHECK-NEXT: ret13 %res = load target("aarch64.svcount"), ptr %ptr14 ret target("aarch64.svcount") %res15}16 17define void @test_store(ptr %ptr, target("aarch64.svcount") %val) nounwind {18; CHECK-LABEL: test_store:19; CHECK: // %bb.0:20; CHECK-NEXT: str p0, [x0]21; CHECK-NEXT: ret22 store target("aarch64.svcount") %val, ptr %ptr23 ret void24}25 26define target("aarch64.svcount") @test_alloca_store_reload(target("aarch64.svcount") %val) nounwind {27; CHECK-O0-LABEL: test_alloca_store_reload:28; CHECK-O0: // %bb.0:29; CHECK-O0-NEXT: str x29, [sp, #-16]! // 8-byte Folded Spill30; CHECK-O0-NEXT: addvl sp, sp, #-131; CHECK-O0-NEXT: str p0, [sp, #7, mul vl]32; CHECK-O0-NEXT: ldr p0, [sp, #7, mul vl]33; CHECK-O0-NEXT: addvl sp, sp, #134; CHECK-O0-NEXT: ldr x29, [sp], #16 // 8-byte Folded Reload35; CHECK-O0-NEXT: ret36;37; CHECK-O3-LABEL: test_alloca_store_reload:38; CHECK-O3: // %bb.0:39; CHECK-O3-NEXT: str x29, [sp, #-16]! // 8-byte Folded Spill40; CHECK-O3-NEXT: addvl sp, sp, #-141; CHECK-O3-NEXT: str p0, [sp, #7, mul vl]42; CHECK-O3-NEXT: addvl sp, sp, #143; CHECK-O3-NEXT: ldr x29, [sp], #16 // 8-byte Folded Reload44; CHECK-O3-NEXT: ret45 %ptr = alloca target("aarch64.svcount"), align 146 store target("aarch64.svcount") %val, ptr %ptr47 %res = load target("aarch64.svcount"), ptr %ptr48 ret target("aarch64.svcount") %res49}50 51;52; Test passing as arguments (from perspective of callee)53;54 55define target("aarch64.svcount") @test_return_arg1(target("aarch64.svcount") %arg0, target("aarch64.svcount") %arg1) nounwind {56; CHECK-LABEL: test_return_arg1:57; CHECK: // %bb.0:58; CHECK-NEXT: mov p0.b, p1.b59; CHECK-NEXT: ret60 ret target("aarch64.svcount") %arg161}62 63define target("aarch64.svcount") @test_return_arg4(target("aarch64.svcount") %arg0, target("aarch64.svcount") %arg1, target("aarch64.svcount") %arg2, target("aarch64.svcount") %arg3, target("aarch64.svcount") %arg4) nounwind {64; CHECK-LABEL: test_return_arg4:65; CHECK: // %bb.0:66; CHECK-NEXT: ldr p0, [x0]67; CHECK-NEXT: ret68 ret target("aarch64.svcount") %arg469}70 71;72; Test passing as arguments (from perspective of caller)73;74 75declare void @take_svcount_1(target("aarch64.svcount") %arg)76define void @test_pass_1arg(target("aarch64.svcount") %arg) nounwind {77; CHECK-LABEL: test_pass_1arg:78; CHECK: // %bb.0:79; CHECK-NEXT: str x30, [sp, #-16]! // 8-byte Folded Spill80; CHECK-NEXT: bl take_svcount_181; CHECK-NEXT: ldr x30, [sp], #16 // 8-byte Folded Reload82; CHECK-NEXT: ret83 call void @take_svcount_1(target("aarch64.svcount") %arg)84 ret void85}86 87declare void @take_svcount_5(target("aarch64.svcount") %arg0, target("aarch64.svcount") %arg1, target("aarch64.svcount") %arg2, target("aarch64.svcount") %arg3, target("aarch64.svcount") %arg4)88define void @test_pass_5args(target("aarch64.svcount") %arg) nounwind {89; CHECK-O0-LABEL: test_pass_5args:90; CHECK-O0: // %bb.0:91; CHECK-O0-NEXT: stp x29, x30, [sp, #-16]! // 16-byte Folded Spill92; CHECK-O0-NEXT: addvl sp, sp, #-193; CHECK-O0-NEXT: mov p3.b, p0.b94; CHECK-O0-NEXT: str p3, [sp, #7, mul vl]95; CHECK-O0-NEXT: addpl x0, sp, #796; CHECK-O0-NEXT: mov p0.b, p3.b97; CHECK-O0-NEXT: mov p1.b, p3.b98; CHECK-O0-NEXT: mov p2.b, p3.b99; CHECK-O0-NEXT: bl take_svcount_5100; CHECK-O0-NEXT: addvl sp, sp, #1101; CHECK-O0-NEXT: ldp x29, x30, [sp], #16 // 16-byte Folded Reload102; CHECK-O0-NEXT: ret103;104; CHECK-O3-LABEL: test_pass_5args:105; CHECK-O3: // %bb.0:106; CHECK-O3-NEXT: stp x29, x30, [sp, #-16]! // 16-byte Folded Spill107; CHECK-O3-NEXT: addvl sp, sp, #-1108; CHECK-O3-NEXT: mov p1.b, p0.b109; CHECK-O3-NEXT: addpl x0, sp, #7110; CHECK-O3-NEXT: str p0, [sp, #7, mul vl]111; CHECK-O3-NEXT: mov p2.b, p0.b112; CHECK-O3-NEXT: mov p3.b, p0.b113; CHECK-O3-NEXT: bl take_svcount_5114; CHECK-O3-NEXT: addvl sp, sp, #1115; CHECK-O3-NEXT: ldp x29, x30, [sp], #16 // 16-byte Folded Reload116; CHECK-O3-NEXT: ret117 call void @take_svcount_5(target("aarch64.svcount") %arg, target("aarch64.svcount") %arg, target("aarch64.svcount") %arg, target("aarch64.svcount") %arg, target("aarch64.svcount") %arg)118 ret void119}120 121define target("aarch64.svcount") @test_sel(target("aarch64.svcount") %x, target("aarch64.svcount") %y, i1 %cmp) {122; CHECK-O0-LABEL: test_sel:123; CHECK-O0: // %bb.0:124; CHECK-O0-NEXT: mov p2.b, p1.b125; CHECK-O0-NEXT: mov p1.b, p0.b126; CHECK-O0-NEXT: // implicit-def: $x8127; CHECK-O0-NEXT: mov w8, w0128; CHECK-O0-NEXT: sbfx x9, x8, #0, #1129; CHECK-O0-NEXT: mov x8, xzr130; CHECK-O0-NEXT: whilelo p0.b, x8, x9131; CHECK-O0-NEXT: sel p0.b, p0, p1.b, p2.b132; CHECK-O0-NEXT: ret133;134; CHECK-O3-LABEL: test_sel:135; CHECK-O3: // %bb.0:136; CHECK-O3-NEXT: // kill: def $w0 killed $w0 def $x0137; CHECK-O3-NEXT: sbfx x8, x0, #0, #1138; CHECK-O3-NEXT: whilelo p2.b, xzr, x8139; CHECK-O3-NEXT: sel p0.b, p2, p0.b, p1.b140; CHECK-O3-NEXT: ret141 %x.y = select i1 %cmp, target("aarch64.svcount") %x, target("aarch64.svcount") %y142 ret target("aarch64.svcount") %x.y143}144 145define target("aarch64.svcount") @test_sel_cc(target("aarch64.svcount") %x, target("aarch64.svcount") %y, i32 %k) {146; CHECK-O0-LABEL: test_sel_cc:147; CHECK-O0: // %bb.0:148; CHECK-O0-NEXT: mov p2.b, p1.b149; CHECK-O0-NEXT: mov p1.b, p0.b150; CHECK-O0-NEXT: subs w8, w0, #42151; CHECK-O0-NEXT: cset w9, gt152; CHECK-O0-NEXT: // implicit-def: $x8153; CHECK-O0-NEXT: mov w8, w9154; CHECK-O0-NEXT: sbfx x9, x8, #0, #1155; CHECK-O0-NEXT: mov x8, xzr156; CHECK-O0-NEXT: whilelo p0.b, x8, x9157; CHECK-O0-NEXT: sel p0.b, p0, p1.b, p2.b158; CHECK-O0-NEXT: ret159;160; CHECK-O3-LABEL: test_sel_cc:161; CHECK-O3: // %bb.0:162; CHECK-O3-NEXT: cmp w0, #42163; CHECK-O3-NEXT: cset w8, gt164; CHECK-O3-NEXT: sbfx x8, x8, #0, #1165; CHECK-O3-NEXT: whilelo p2.b, xzr, x8166; CHECK-O3-NEXT: sel p0.b, p2, p0.b, p1.b167; CHECK-O3-NEXT: ret168 %cmp = icmp sgt i32 %k, 42169 %x.y = select i1 %cmp, target("aarch64.svcount") %x, target("aarch64.svcount") %y170 ret target("aarch64.svcount") %x.y171}172