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1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 42; RUN: llc -mtriple=aarch64 -O0 -mattr=+sme < %s | FileCheck %s3 4target triple = "aarch64-linux-gnu"5 6declare void @llvm.trap() #07 8; This test checks that we don't assert/crash due to not being able to reach the9; emergency spill slot by ensuring that we use a BP for streaming functions.10 11define void @quux() #1 {12; CHECK-LABEL: quux:13; CHECK:       // %bb.0: // %prelude14; CHECK-NEXT:    stp x29, x30, [sp, #-96]! // 16-byte Folded Spill15; CHECK-NEXT:    stp x28, x27, [sp, #16] // 16-byte Folded Spill16; CHECK-NEXT:    stp x26, x25, [sp, #32] // 16-byte Folded Spill17; CHECK-NEXT:    stp x24, x23, [sp, #48] // 16-byte Folded Spill18; CHECK-NEXT:    stp x22, x21, [sp, #64] // 16-byte Folded Spill19; CHECK-NEXT:    stp x20, x19, [sp, #80] // 16-byte Folded Spill20; CHECK-NEXT:    mov x29, sp21; CHECK-NEXT:    sub sp, sp, #38422; CHECK-NEXT:    .cfi_def_cfa w29, 9623; CHECK-NEXT:    .cfi_offset w19, -824; CHECK-NEXT:    .cfi_offset w20, -1625; CHECK-NEXT:    .cfi_offset w21, -2426; CHECK-NEXT:    .cfi_offset w22, -3227; CHECK-NEXT:    .cfi_offset w23, -4028; CHECK-NEXT:    .cfi_offset w24, -4829; CHECK-NEXT:    .cfi_offset w25, -5630; CHECK-NEXT:    .cfi_offset w26, -6431; CHECK-NEXT:    .cfi_offset w27, -7232; CHECK-NEXT:    .cfi_offset w28, -8033; CHECK-NEXT:    .cfi_offset w30, -8834; CHECK-NEXT:    .cfi_offset w29, -9635; CHECK-NEXT:    rdsvl x8, #136; CHECK-NEXT:    mrs x8, TPIDR2_EL037; CHECK-NEXT:    cbz x8, .LBB0_238; CHECK-NEXT:    b .LBB0_139; CHECK-NEXT:  .LBB0_1: // %save.za40; CHECK-NEXT:    bl __arm_tpidr2_save41; CHECK-NEXT:    mov x8, xzr42; CHECK-NEXT:    msr TPIDR2_EL0, x843; CHECK-NEXT:    b .LBB0_244; CHECK-NEXT:  .LBB0_2: // %bb45; CHECK-NEXT:    smstart za46; CHECK-NEXT:    zero {za}47; CHECK-NEXT:    mov w9, #15 // =0xf48; CHECK-NEXT:    // implicit-def: $x849; CHECK-NEXT:    mov w8, w950; CHECK-NEXT:    mov x9, x851; CHECK-NEXT:    incd x952; CHECK-NEXT:    mov w0, w953; CHECK-NEXT:    // implicit-def: $x954; CHECK-NEXT:    mov w9, w055; CHECK-NEXT:    and x14, x9, #0x7056; CHECK-NEXT:    sub x9, x29, #12057; CHECK-NEXT:    stur x14, [x9, #-256] // 8-byte Folded Spill58; CHECK-NEXT:    mov x9, sp59; CHECK-NEXT:    subs x9, x9, x1460; CHECK-NEXT:    mov sp, x961; CHECK-NEXT:    sub x10, x29, #11262; CHECK-NEXT:    stur x9, [x10, #-256] // 8-byte Folded Spill63; CHECK-NEXT:    mov x9, sp64; CHECK-NEXT:    subs x9, x9, x1465; CHECK-NEXT:    mov sp, x966; CHECK-NEXT:    sub x10, x29, #10467; CHECK-NEXT:    stur x9, [x10, #-256] // 8-byte Folded Spill68; CHECK-NEXT:    mov x9, x869; CHECK-NEXT:    incb x970; CHECK-NEXT:    mov w0, w971; CHECK-NEXT:    // implicit-def: $x972; CHECK-NEXT:    mov w9, w073; CHECK-NEXT:    and x10, x9, #0x3f074; CHECK-NEXT:    sub x9, x29, #9675; CHECK-NEXT:    stur x10, [x9, #-256] // 8-byte Folded Spill76; CHECK-NEXT:    mov x9, sp77; CHECK-NEXT:    subs x9, x9, x1078; CHECK-NEXT:    mov sp, x979; CHECK-NEXT:    sub x11, x29, #8880; CHECK-NEXT:    stur x9, [x11, #-256] // 8-byte Folded Spill81; CHECK-NEXT:    mov x9, sp82; CHECK-NEXT:    subs x9, x9, x1083; CHECK-NEXT:    mov sp, x984; CHECK-NEXT:    sub x11, x29, #8085; CHECK-NEXT:    stur x9, [x11, #-256] // 8-byte Folded Spill86; CHECK-NEXT:    mov x9, sp87; CHECK-NEXT:    subs x9, x9, x1488; CHECK-NEXT:    mov sp, x989; CHECK-NEXT:    sub x11, x29, #7290; CHECK-NEXT:    stur x9, [x11, #-256] // 8-byte Folded Spill91; CHECK-NEXT:    mov x9, sp92; CHECK-NEXT:    subs x9, x9, x1493; CHECK-NEXT:    mov sp, x994; CHECK-NEXT:    sub x11, x29, #6495; CHECK-NEXT:    stur x9, [x11, #-256] // 8-byte Folded Spill96; CHECK-NEXT:    mov x9, sp97; CHECK-NEXT:    subs x9, x9, x1098; CHECK-NEXT:    mov sp, x999; CHECK-NEXT:    sub x11, x29, #56100; CHECK-NEXT:    stur x9, [x11, #-256] // 8-byte Folded Spill101; CHECK-NEXT:    mov x9, sp102; CHECK-NEXT:    subs x9, x9, x10103; CHECK-NEXT:    mov sp, x9104; CHECK-NEXT:    sub x11, x29, #48105; CHECK-NEXT:    stur x9, [x11, #-256] // 8-byte Folded Spill106; CHECK-NEXT:    mov x9, sp107; CHECK-NEXT:    subs x9, x9, x14108; CHECK-NEXT:    mov sp, x9109; CHECK-NEXT:    sub x11, x29, #40110; CHECK-NEXT:    stur x9, [x11, #-256] // 8-byte Folded Spill111; CHECK-NEXT:    mov x9, sp112; CHECK-NEXT:    subs x9, x9, x14113; CHECK-NEXT:    mov sp, x9114; CHECK-NEXT:    sub x11, x29, #32115; CHECK-NEXT:    stur x9, [x11, #-256] // 8-byte Folded Spill116; CHECK-NEXT:    mov x9, sp117; CHECK-NEXT:    subs x9, x9, x10118; CHECK-NEXT:    mov sp, x9119; CHECK-NEXT:    sub x11, x29, #24120; CHECK-NEXT:    stur x9, [x11, #-256] // 8-byte Folded Spill121; CHECK-NEXT:    mov x9, sp122; CHECK-NEXT:    subs x9, x9, x10123; CHECK-NEXT:    mov sp, x9124; CHECK-NEXT:    sub x11, x29, #16125; CHECK-NEXT:    stur x9, [x11, #-256] // 8-byte Folded Spill126; CHECK-NEXT:    mov x9, sp127; CHECK-NEXT:    subs x9, x9, x14128; CHECK-NEXT:    mov sp, x9129; CHECK-NEXT:    sub x11, x29, #8130; CHECK-NEXT:    stur x9, [x11, #-256] // 8-byte Folded Spill131; CHECK-NEXT:    mov x9, sp132; CHECK-NEXT:    subs x9, x9, x14133; CHECK-NEXT:    mov sp, x9134; CHECK-NEXT:    stur x9, [x29, #-256] // 8-byte Folded Spill135; CHECK-NEXT:    mov x9, sp136; CHECK-NEXT:    subs x9, x9, x10137; CHECK-NEXT:    mov sp, x9138; CHECK-NEXT:    stur x9, [x29, #-248] // 8-byte Folded Spill139; CHECK-NEXT:    mov x9, sp140; CHECK-NEXT:    subs x9, x9, x10141; CHECK-NEXT:    mov sp, x9142; CHECK-NEXT:    stur x9, [x29, #-240] // 8-byte Folded Spill143; CHECK-NEXT:    mov x9, sp144; CHECK-NEXT:    subs x9, x9, #16145; CHECK-NEXT:    mov sp, x9146; CHECK-NEXT:    mov x9, sp147; CHECK-NEXT:    subs x9, x9, #16148; CHECK-NEXT:    mov sp, x9149; CHECK-NEXT:    mov x9, sp150; CHECK-NEXT:    subs x9, x9, #16151; CHECK-NEXT:    mov sp, x9152; CHECK-NEXT:    mov x9, sp153; CHECK-NEXT:    subs x9, x9, #16154; CHECK-NEXT:    mov sp, x9155; CHECK-NEXT:    mov x9, sp156; CHECK-NEXT:    subs x9, x9, #16157; CHECK-NEXT:    mov sp, x9158; CHECK-NEXT:    mov x9, sp159; CHECK-NEXT:    subs x9, x9, x14160; CHECK-NEXT:    mov sp, x9161; CHECK-NEXT:    mov x9, sp162; CHECK-NEXT:    subs x9, x9, #16163; CHECK-NEXT:    mov sp, x9164; CHECK-NEXT:    mov x9, x8165; CHECK-NEXT:    incb x9, all, mul #2166; CHECK-NEXT:    mov w0, w9167; CHECK-NEXT:    // implicit-def: $x9168; CHECK-NEXT:    mov w9, w0169; CHECK-NEXT:    and x9, x9, #0x7f0170; CHECK-NEXT:    mov x10, sp171; CHECK-NEXT:    subs x10, x10, x9172; CHECK-NEXT:    and x10, x10, #0xffffffffffffffe0173; CHECK-NEXT:    mov sp, x10174; CHECK-NEXT:    mov x2, sp175; CHECK-NEXT:    subs x10, x2, #16176; CHECK-NEXT:    mov sp, x10177; CHECK-NEXT:    stur x10, [x29, #-232] // 8-byte Folded Spill178; CHECK-NEXT:    mov x10, sp179; CHECK-NEXT:    subs x11, x10, x14180; CHECK-NEXT:    mov sp, x11181; CHECK-NEXT:    mov x10, x11182; CHECK-NEXT:    stur x10, [x29, #-224] // 8-byte Folded Spill183; CHECK-NEXT:    mov x0, sp184; CHECK-NEXT:    subs x10, x0, #16185; CHECK-NEXT:    mov sp, x10186; CHECK-NEXT:    stur x10, [x29, #-216] // 8-byte Folded Spill187; CHECK-NEXT:    mov x17, sp188; CHECK-NEXT:    subs x10, x17, #16189; CHECK-NEXT:    mov sp, x10190; CHECK-NEXT:    stur x10, [x29, #-208] // 8-byte Folded Spill191; CHECK-NEXT:    mov x10, sp192; CHECK-NEXT:    subs x10, x10, x14193; CHECK-NEXT:    stur x10, [x29, #-32] // 8-byte Folded Spill194; CHECK-NEXT:    mov sp, x10195; CHECK-NEXT:    stur x10, [x29, #-200] // 8-byte Folded Spill196; CHECK-NEXT:    mov x15, sp197; CHECK-NEXT:    subs x10, x15, #16198; CHECK-NEXT:    mov sp, x10199; CHECK-NEXT:    stur x10, [x29, #-192] // 8-byte Folded Spill200; CHECK-NEXT:    mov x13, sp201; CHECK-NEXT:    subs x10, x13, #16202; CHECK-NEXT:    mov sp, x10203; CHECK-NEXT:    stur x10, [x29, #-184] // 8-byte Folded Spill204; CHECK-NEXT:    incw x8205; CHECK-NEXT:    mov w1, w8206; CHECK-NEXT:    // implicit-def: $x8207; CHECK-NEXT:    mov w8, w1208; CHECK-NEXT:    and x12, x8, #0xf0209; CHECK-NEXT:    mov x8, sp210; CHECK-NEXT:    subs x10, x8, x12211; CHECK-NEXT:    mov sp, x10212; CHECK-NEXT:    mov x8, x10213; CHECK-NEXT:    stur x8, [x29, #-176] // 8-byte Folded Spill214; CHECK-NEXT:    mov x8, sp215; CHECK-NEXT:    subs x8, x8, x12216; CHECK-NEXT:    stur x8, [x29, #-24] // 8-byte Folded Spill217; CHECK-NEXT:    mov sp, x8218; CHECK-NEXT:    stur x8, [x29, #-168] // 8-byte Folded Spill219; CHECK-NEXT:    mov x8, sp220; CHECK-NEXT:    subs x8, x8, x9221; CHECK-NEXT:    and x8, x8, #0xffffffffffffffe0222; CHECK-NEXT:    mov sp, x8223; CHECK-NEXT:    stur x8, [x29, #-160] // 8-byte Folded Spill224; CHECK-NEXT:    mov x8, sp225; CHECK-NEXT:    subs x8, x8, x9226; CHECK-NEXT:    and x8, x8, #0xffffffffffffffe0227; CHECK-NEXT:    mov sp, x8228; CHECK-NEXT:    stur x8, [x29, #-152] // 8-byte Folded Spill229; CHECK-NEXT:    mov x8, sp230; CHECK-NEXT:    stur x8, [x29, #-56] // 8-byte Folded Spill231; CHECK-NEXT:    subs x8, x8, #16232; CHECK-NEXT:    mov sp, x8233; CHECK-NEXT:    mov x8, sp234; CHECK-NEXT:    stur x8, [x29, #-48] // 8-byte Folded Spill235; CHECK-NEXT:    subs x8, x8, #16236; CHECK-NEXT:    mov sp, x8237; CHECK-NEXT:    mov x24, sp238; CHECK-NEXT:    subs x8, x24, #16239; CHECK-NEXT:    mov sp, x8240; CHECK-NEXT:    mov x7, sp241; CHECK-NEXT:    subs x8, x7, #16242; CHECK-NEXT:    mov sp, x8243; CHECK-NEXT:    mov x27, sp244; CHECK-NEXT:    subs x8, x27, #16245; CHECK-NEXT:    mov sp, x8246; CHECK-NEXT:    mov x26, sp247; CHECK-NEXT:    subs x8, x26, #16248; CHECK-NEXT:    mov sp, x8249; CHECK-NEXT:    mov x1, sp250; CHECK-NEXT:    subs x8, x1, #16251; CHECK-NEXT:    mov sp, x8252; CHECK-NEXT:    mov x9, sp253; CHECK-NEXT:    subs x8, x9, #16254; CHECK-NEXT:    mov sp, x8255; CHECK-NEXT:    mov x20, sp256; CHECK-NEXT:    subs x8, x20, #16257; CHECK-NEXT:    mov sp, x8258; CHECK-NEXT:    mov x16, sp259; CHECK-NEXT:    subs x8, x16, #16260; CHECK-NEXT:    mov sp, x8261; CHECK-NEXT:    mov x8, sp262; CHECK-NEXT:    stur x8, [x29, #-144] // 8-byte Folded Spill263; CHECK-NEXT:    subs x8, x8, #16264; CHECK-NEXT:    mov sp, x8265; CHECK-NEXT:    mov x5, sp266; CHECK-NEXT:    subs x8, x5, #16267; CHECK-NEXT:    mov sp, x8268; CHECK-NEXT:    mov x12, sp269; CHECK-NEXT:    subs x8, x12, #16270; CHECK-NEXT:    mov sp, x8271; CHECK-NEXT:    mov x22, sp272; CHECK-NEXT:    subs x8, x22, #16273; CHECK-NEXT:    mov sp, x8274; CHECK-NEXT:    mov x25, sp275; CHECK-NEXT:    subs x8, x25, #16276; CHECK-NEXT:    mov sp, x8277; CHECK-NEXT:    mov x30, sp278; CHECK-NEXT:    subs x8, x30, #16279; CHECK-NEXT:    mov sp, x8280; CHECK-NEXT:    mov x8, sp281; CHECK-NEXT:    stur x8, [x29, #-96] // 8-byte Folded Spill282; CHECK-NEXT:    subs x8, x8, #16283; CHECK-NEXT:    mov sp, x8284; CHECK-NEXT:    mov x8, sp285; CHECK-NEXT:    stur x8, [x29, #-64] // 8-byte Folded Spill286; CHECK-NEXT:    subs x8, x8, #16287; CHECK-NEXT:    mov sp, x8288; CHECK-NEXT:    mov x8, sp289; CHECK-NEXT:    stur x8, [x29, #-128] // 8-byte Folded Spill290; CHECK-NEXT:    subs x8, x8, #16291; CHECK-NEXT:    mov sp, x8292; CHECK-NEXT:    mov x8, sp293; CHECK-NEXT:    stur x8, [x29, #-136] // 8-byte Folded Spill294; CHECK-NEXT:    subs x8, x8, #16295; CHECK-NEXT:    mov sp, x8296; CHECK-NEXT:    mov x8, sp297; CHECK-NEXT:    stur x8, [x29, #-120] // 8-byte Folded Spill298; CHECK-NEXT:    subs x8, x8, #16299; CHECK-NEXT:    mov sp, x8300; CHECK-NEXT:    mov x8, sp301; CHECK-NEXT:    stur x8, [x29, #-80] // 8-byte Folded Spill302; CHECK-NEXT:    subs x8, x8, #16303; CHECK-NEXT:    mov sp, x8304; CHECK-NEXT:    mov x8, sp305; CHECK-NEXT:    stur x8, [x29, #-112] // 8-byte Folded Spill306; CHECK-NEXT:    subs x8, x8, #16307; CHECK-NEXT:    mov sp, x8308; CHECK-NEXT:    mov x8, sp309; CHECK-NEXT:    stur x8, [x29, #-88] // 8-byte Folded Spill310; CHECK-NEXT:    subs x8, x8, #16311; CHECK-NEXT:    mov sp, x8312; CHECK-NEXT:    mov x6, sp313; CHECK-NEXT:    subs x8, x6, #16314; CHECK-NEXT:    mov sp, x8315; CHECK-NEXT:    mov x21, sp316; CHECK-NEXT:    subs x8, x21, #16317; CHECK-NEXT:    mov sp, x8318; CHECK-NEXT:    mov x8, sp319; CHECK-NEXT:    stur x8, [x29, #-40] // 8-byte Folded Spill320; CHECK-NEXT:    subs x8, x8, #16321; CHECK-NEXT:    mov sp, x8322; CHECK-NEXT:    mov x28, sp323; CHECK-NEXT:    subs x8, x28, #16324; CHECK-NEXT:    mov sp, x8325; CHECK-NEXT:    mov x8, sp326; CHECK-NEXT:    subs x4, x8, x14327; CHECK-NEXT:    mov sp, x4328; CHECK-NEXT:    mov x8, sp329; CHECK-NEXT:    subs x3, x8, x14330; CHECK-NEXT:    mov sp, x3331; CHECK-NEXT:    mov x23, sp332; CHECK-NEXT:    subs x8, x23, #16333; CHECK-NEXT:    mov sp, x8334; CHECK-NEXT:    mov x18, sp335; CHECK-NEXT:    subs x8, x18, #16336; CHECK-NEXT:    mov sp, x8337; CHECK-NEXT:    mov x14, sp338; CHECK-NEXT:    subs x8, x14, #16339; CHECK-NEXT:    mov sp, x8340; CHECK-NEXT:    mov w8, wzr341; CHECK-NEXT:    sturb w8, [x9, #-16]342; CHECK-NEXT:    ldur x9, [x29, #-144] // 8-byte Folded Reload343; CHECK-NEXT:    sturb w8, [x9, #-16]344; CHECK-NEXT:    ldur x9, [x29, #-96] // 8-byte Folded Reload345; CHECK-NEXT:    sturb w8, [x30, #-16]346; CHECK-NEXT:    mov x8, xzr347; CHECK-NEXT:    stur x8, [x29, #-16] // 8-byte Folded Spill348; CHECK-NEXT:    stur x8, [x9, #-16]349; CHECK-NEXT:    ldur x8, [x20, #-16]350; CHECK-NEXT:    ldur x9, [x27, #-16]351; CHECK-NEXT:    add x30, x8, x9, lsl #2352; CHECK-NEXT:    ldur x8, [x1, #-16]353; CHECK-NEXT:    subs x8, x8, #1354; CHECK-NEXT:    ldur x9, [x16, #-16]355; CHECK-NEXT:    mul x8, x8, x9356; CHECK-NEXT:    ldur x9, [x29, #-64] // 8-byte Folded Reload357; CHECK-NEXT:    add x30, x30, x8, lsl #2358; CHECK-NEXT:    ldur x8, [x29, #-96] // 8-byte Folded Reload359; CHECK-NEXT:    stur x30, [x8, #-16]360; CHECK-NEXT:    ldur x8, [x29, #-16] // 8-byte Folded Reload361; CHECK-NEXT:    stur x8, [x9, #-16]362; CHECK-NEXT:    ldur x8, [x5, #-16]363; CHECK-NEXT:    ldur x9, [x26, #-16]364; CHECK-NEXT:    add x30, x8, x9, lsl #2365; CHECK-NEXT:    ldur x8, [x1, #-16]366; CHECK-NEXT:    subs x8, x8, #1367; CHECK-NEXT:    ldur x9, [x12, #-16]368; CHECK-NEXT:    mul x8, x8, x9369; CHECK-NEXT:    ldur x9, [x29, #-128] // 8-byte Folded Reload370; CHECK-NEXT:    add x30, x30, x8, lsl #2371; CHECK-NEXT:    ldur x8, [x29, #-64] // 8-byte Folded Reload372; CHECK-NEXT:    stur x30, [x8, #-16]373; CHECK-NEXT:    ldur x8, [x29, #-16] // 8-byte Folded Reload374; CHECK-NEXT:    stur x8, [x9, #-16]375; CHECK-NEXT:    ldur x8, [x22, #-16]376; CHECK-NEXT:    ldur x9, [x27, #-16]377; CHECK-NEXT:    add x30, x8, x9, lsl #2378; CHECK-NEXT:    ldur x8, [x26, #-16]379; CHECK-NEXT:    subs x8, x8, #1380; CHECK-NEXT:    ldur x9, [x25, #-16]381; CHECK-NEXT:    mul x8, x8, x9382; CHECK-NEXT:    ldur x9, [x29, #-136] // 8-byte Folded Reload383; CHECK-NEXT:    add x30, x30, x8, lsl #2384; CHECK-NEXT:    ldur x8, [x29, #-128] // 8-byte Folded Reload385; CHECK-NEXT:    stur x30, [x8, #-16]386; CHECK-NEXT:    ldur x8, [x29, #-120] // 8-byte Folded Reload387; CHECK-NEXT:    mov w30, #32 // =0x20388; CHECK-NEXT:    // kill: def $lr killed $w30389; CHECK-NEXT:    stur x30, [x9, #-16]390; CHECK-NEXT:    ldur x9, [x29, #-80] // 8-byte Folded Reload391; CHECK-NEXT:    stur x30, [x8, #-16]392; CHECK-NEXT:    ldur x8, [x29, #-16] // 8-byte Folded Reload393; CHECK-NEXT:    stur x8, [x9, #-16]394; CHECK-NEXT:    ldur x8, [x1, #-16]395; CHECK-NEXT:    lsl x8, x8, #5396; CHECK-NEXT:    stur x8, [x9, #-16]397; CHECK-NEXT:    ldur x9, [x29, #-112] // 8-byte Folded Reload398; CHECK-NEXT:    ldur x8, [x29, #-16] // 8-byte Folded Reload399; CHECK-NEXT:    stur x30, [x16, #-16]400; CHECK-NEXT:    stur x8, [x9, #-16]401; CHECK-NEXT:    ldur x8, [x27, #-16]402; CHECK-NEXT:    subs x8, x8, #1403; CHECK-NEXT:    lsr x8, x8, #5404; CHECK-NEXT:    add x8, x8, #1405; CHECK-NEXT:    stur x8, [x9, #-16]406; CHECK-NEXT:    ldur x8, [x20, #-16]407; CHECK-NEXT:    stur x8, [x29, #-104] // 8-byte Folded Spill408; CHECK-NEXT:    ldur x8, [x29, #-80] // 8-byte Folded Reload409; CHECK-NEXT:    ldur x9, [x9, #-16]410; CHECK-NEXT:    ldur x8, [x8, #-16]411; CHECK-NEXT:    mul x9, x9, x8412; CHECK-NEXT:    ldur x8, [x29, #-104] // 8-byte Folded Reload413; CHECK-NEXT:    add x8, x8, x9, lsl #2414; CHECK-NEXT:    ldur x9, [x29, #-96] // 8-byte Folded Reload415; CHECK-NEXT:    stur x8, [x9, #-16]416; CHECK-NEXT:    ldur x9, [x29, #-88] // 8-byte Folded Reload417; CHECK-NEXT:    ldur x8, [x29, #-16] // 8-byte Folded Reload418; CHECK-NEXT:    stur x30, [x12, #-16]419; CHECK-NEXT:    stur x8, [x9, #-16]420; CHECK-NEXT:    ldur x8, [x26, #-16]421; CHECK-NEXT:    subs x8, x8, #1422; CHECK-NEXT:    lsr x8, x8, #5423; CHECK-NEXT:    add x8, x8, #1424; CHECK-NEXT:    stur x8, [x9, #-16]425; CHECK-NEXT:    ldur x8, [x5, #-16]426; CHECK-NEXT:    stur x8, [x29, #-72] // 8-byte Folded Spill427; CHECK-NEXT:    ldur x8, [x29, #-80] // 8-byte Folded Reload428; CHECK-NEXT:    ldur x9, [x9, #-16]429; CHECK-NEXT:    ldur x8, [x8, #-16]430; CHECK-NEXT:    mul x9, x9, x8431; CHECK-NEXT:    ldur x8, [x29, #-72] // 8-byte Folded Reload432; CHECK-NEXT:    add x8, x8, x9, lsl #2433; CHECK-NEXT:    ldur x9, [x29, #-64] // 8-byte Folded Reload434; CHECK-NEXT:    stur x8, [x9, #-16]435; CHECK-NEXT:    ldur x9, [x29, #-40] // 8-byte Folded Reload436; CHECK-NEXT:    ldur x8, [x29, #-16] // 8-byte Folded Reload437; CHECK-NEXT:    stur x8, [x6, #-16]438; CHECK-NEXT:    stur x8, [x6, #-16]439; CHECK-NEXT:    stur x8, [x21, #-16]440; CHECK-NEXT:    stur x8, [x21, #-16]441; CHECK-NEXT:    stur x8, [x9, #-16]442; CHECK-NEXT:    ldur x8, [x27, #-16]443; CHECK-NEXT:    ldur x9, [x21, #-16]444; CHECK-NEXT:    subs x8, x8, x9445; CHECK-NEXT:    ldur x9, [x29, #-56] // 8-byte Folded Reload446; CHECK-NEXT:    stur x8, [x9, #-16]447; CHECK-NEXT:    ldur x8, [x29, #-48] // 8-byte Folded Reload448; CHECK-NEXT:    stur x30, [x8, #-16]449; CHECK-NEXT:    ldur x8, [x29, #-40] // 8-byte Folded Reload450; CHECK-NEXT:    ldur x9, [x9, #-16]451; CHECK-NEXT:    stur x9, [x8, #-16]452; CHECK-NEXT:    ldur x8, [x29, #-16] // 8-byte Folded Reload453; CHECK-NEXT:    stur x8, [x28, #-16]454; CHECK-NEXT:    ldur x8, [x26, #-16]455; CHECK-NEXT:    ldur x9, [x6, #-16]456; CHECK-NEXT:    subs x8, x8, x9457; CHECK-NEXT:    ldur x9, [x29, #-32] // 8-byte Folded Reload458; CHECK-NEXT:    stur x8, [x24, #-16]459; CHECK-NEXT:    ldur x8, [x29, #-24] // 8-byte Folded Reload460; CHECK-NEXT:    stur x30, [x7, #-16]461; CHECK-NEXT:    ldur x7, [x29, #-16] // 8-byte Folded Reload462; CHECK-NEXT:    ldur x24, [x24, #-16]463; CHECK-NEXT:    stur x24, [x28, #-16]464; CHECK-NEXT:    ldur x24, [x21, #-16]465; CHECK-NEXT:    ldur x27, [x27, #-16]466; CHECK-NEXT:    whilelt pn8.s, x24, x27, vlx2467; CHECK-NEXT:    str pn8, [x4]468; CHECK-NEXT:    ldur x24, [x6, #-16]469; CHECK-NEXT:    ldur x26, [x26, #-16]470; CHECK-NEXT:    whilelt pn8.s, x24, x26, vlx2471; CHECK-NEXT:    str pn8, [x3]472; CHECK-NEXT:    stur x7, [x23, #-16]473; CHECK-NEXT:    ldur x22, [x22, #-16]474; CHECK-NEXT:    ldur x24, [x21, #-16]475; CHECK-NEXT:    add x22, x22, x24, lsl #2476; CHECK-NEXT:    ldur x24, [x6, #-16]477; CHECK-NEXT:    ldur x25, [x25, #-16]478; CHECK-NEXT:    mul x24, x24, x25479; CHECK-NEXT:    add x22, x22, x24, lsl #2480; CHECK-NEXT:    stur x22, [x23, #-16]481; CHECK-NEXT:    zero {za}482; CHECK-NEXT:    stur x7, [x18, #-16]483; CHECK-NEXT:    ldur x20, [x20, #-16]484; CHECK-NEXT:    ldur x21, [x21, #-16]485; CHECK-NEXT:    ldur x22, [x1, #-16]486; CHECK-NEXT:    mul x21, x21, x22487; CHECK-NEXT:    add x20, x20, x21, lsl #2488; CHECK-NEXT:    stur x20, [x18, #-16]489; CHECK-NEXT:    stur x7, [x14, #-16]490; CHECK-NEXT:    ldur x5, [x5, #-16]491; CHECK-NEXT:    ldur x6, [x6, #-16]492; CHECK-NEXT:    ldur x7, [x1, #-16]493; CHECK-NEXT:    mul x6, x6, x7494; CHECK-NEXT:    add x5, x5, x6, lsl #2495; CHECK-NEXT:    stur x5, [x14, #-16]496; CHECK-NEXT:    ldur x1, [x1, #-16]497; CHECK-NEXT:    ldr p1, [x4]498; CHECK-NEXT:    ldur x18, [x18, #-16]499; CHECK-NEXT:    ldur x16, [x16, #-16]500; CHECK-NEXT:    lsr x16, x16, #2501; CHECK-NEXT:    ldr p0, [x3]502; CHECK-NEXT:    ldur x14, [x14, #-16]503; CHECK-NEXT:    ldur x12, [x12, #-16]504; CHECK-NEXT:    lsr x12, x12, #2505; CHECK-NEXT:    stur x1, [x2, #-16]506; CHECK-NEXT:    str p1, [x11]507; CHECK-NEXT:    stur x18, [x0, #-16]508; CHECK-NEXT:    stur x16, [x17, #-16]509; CHECK-NEXT:    str p0, [x9]510; CHECK-NEXT:    stur x14, [x15, #-16]511; CHECK-NEXT:    stur x12, [x13, #-16]512; CHECK-NEXT:    ldr p0, [x11]513; CHECK-NEXT:    mov p8.b, p0.b514; CHECK-NEXT:    pext { p3.s, p4.s }, pn8[0]515; CHECK-NEXT:    mov p0.b, p3.b516; CHECK-NEXT:    ptrue p2.s517; CHECK-NEXT:    and p0.b, p0/z, p0.b, p2.b518; CHECK-NEXT:    mov p1.b, p4.b519; CHECK-NEXT:    and p1.b, p1/z, p1.b, p2.b520; CHECK-NEXT:    mov x11, x10521; CHECK-NEXT:    incd x11522; CHECK-NEXT:    str p1, [x11]523; CHECK-NEXT:    str p0, [x10]524; CHECK-NEXT:    ldr p0, [x9]525; CHECK-NEXT:    mov p8.b, p0.b526; CHECK-NEXT:    pext { p3.s, p4.s }, pn8[0]527; CHECK-NEXT:    mov p0.b, p3.b528; CHECK-NEXT:    and p0.b, p0/z, p0.b, p2.b529; CHECK-NEXT:    mov p1.b, p4.b530; CHECK-NEXT:    and p1.b, p1/z, p1.b, p2.b531; CHECK-NEXT:    mov x9, x8532; CHECK-NEXT:    incd x9533; CHECK-NEXT:    str p1, [x9]534; CHECK-NEXT:    str p0, [x8]535; CHECK-NEXT:    b .LBB0_3536; CHECK-NEXT:  .LBB0_3: // %bb178537; CHECK-NEXT:    // =>This Inner Loop Header: Depth=1538; CHECK-NEXT:    ldur x9, [x29, #-232] // 8-byte Folded Reload539; CHECK-NEXT:    sub x8, x29, #80540; CHECK-NEXT:    ldur x8, [x8, #-256] // 8-byte Folded Reload541; CHECK-NEXT:    sub x10, x29, #88542; CHECK-NEXT:    ldur x10, [x10, #-256] // 8-byte Folded Reload543; CHECK-NEXT:    sub x11, x29, #104544; CHECK-NEXT:    ldur x11, [x11, #-256] // 8-byte Folded Reload545; CHECK-NEXT:    sub x12, x29, #112546; CHECK-NEXT:    ldur x12, [x12, #-256] // 8-byte Folded Reload547; CHECK-NEXT:    ldur x13, [x29, #-152] // 8-byte Folded Reload548; CHECK-NEXT:    ldur x14, [x29, #-160] // 8-byte Folded Reload549; CHECK-NEXT:    sub x15, x29, #48550; CHECK-NEXT:    ldur x17, [x15, #-256] // 8-byte Folded Reload551; CHECK-NEXT:    sub x15, x29, #56552; CHECK-NEXT:    ldur x18, [x15, #-256] // 8-byte Folded Reload553; CHECK-NEXT:    sub x15, x29, #64554; CHECK-NEXT:    ldur x0, [x15, #-256] // 8-byte Folded Reload555; CHECK-NEXT:    sub x15, x29, #72556; CHECK-NEXT:    ldur x1, [x15, #-256] // 8-byte Folded Reload557; CHECK-NEXT:    ldur x15, [x29, #-168] // 8-byte Folded Reload558; CHECK-NEXT:    ldur x2, [x29, #-176] // 8-byte Folded Reload559; CHECK-NEXT:    sub x16, x29, #16560; CHECK-NEXT:    ldur x3, [x16, #-256] // 8-byte Folded Reload561; CHECK-NEXT:    sub x16, x29, #24562; CHECK-NEXT:    ldur x4, [x16, #-256] // 8-byte Folded Reload563; CHECK-NEXT:    sub x16, x29, #32564; CHECK-NEXT:    ldur x5, [x16, #-256] // 8-byte Folded Reload565; CHECK-NEXT:    sub x16, x29, #40566; CHECK-NEXT:    ldur x6, [x16, #-256] // 8-byte Folded Reload567; CHECK-NEXT:    ldur x16, [x29, #-240] // 8-byte Folded Reload568; CHECK-NEXT:    ldur x7, [x29, #-248] // 8-byte Folded Reload569; CHECK-NEXT:    ldur x20, [x29, #-256] // 8-byte Folded Reload570; CHECK-NEXT:    sub x21, x29, #8571; CHECK-NEXT:    ldur x21, [x21, #-256] // 8-byte Folded Reload572; CHECK-NEXT:    ldur x23, [x29, #-192] // 8-byte Folded Reload573; CHECK-NEXT:    ldur x22, [x29, #-184] // 8-byte Folded Reload574; CHECK-NEXT:    ldur x24, [x29, #-200] // 8-byte Folded Reload575; CHECK-NEXT:    ldur x26, [x29, #-216] // 8-byte Folded Reload576; CHECK-NEXT:    ldur x25, [x29, #-208] // 8-byte Folded Reload577; CHECK-NEXT:    ldur x27, [x29, #-224] // 8-byte Folded Reload578; CHECK-NEXT:    ldr p0, [x27]579; CHECK-NEXT:    ldr x27, [x26]580; CHECK-NEXT:    mov p8.b, p0.b581; CHECK-NEXT:    ld1w { z16.s, z24.s }, pn8/z, [x27]582; CHECK-NEXT:    mov z0.d, z16.d583; CHECK-NEXT:    mov z1.d, z24.d584; CHECK-NEXT:    str z1, [x14, #1, mul vl]585; CHECK-NEXT:    str z0, [x14]586; CHECK-NEXT:    ldr x27, [x25]587; CHECK-NEXT:    ldr x25, [x26]588; CHECK-NEXT:    add x25, x25, x27, lsl #2589; CHECK-NEXT:    str x25, [x26]590; CHECK-NEXT:    ldr p0, [x24]591; CHECK-NEXT:    ldr x24, [x23]592; CHECK-NEXT:    mov p8.b, p0.b593; CHECK-NEXT:    ld1w { z16.s, z24.s }, pn8/z, [x24]594; CHECK-NEXT:    mov z0.d, z16.d595; CHECK-NEXT:    mov z1.d, z24.d596; CHECK-NEXT:    str z1, [x13, #1, mul vl]597; CHECK-NEXT:    str z0, [x13]598; CHECK-NEXT:    ldr x24, [x22]599; CHECK-NEXT:    ldr x22, [x23]600; CHECK-NEXT:    add x22, x22, x24, lsl #2601; CHECK-NEXT:    str x22, [x23]602; CHECK-NEXT:    ldr p1, [x2]603; CHECK-NEXT:    ldr p0, [x15]604; CHECK-NEXT:    ldr z1, [x14]605; CHECK-NEXT:    ldr z0, [x13]606; CHECK-NEXT:    str p1, [x21]607; CHECK-NEXT:    str p0, [x20]608; CHECK-NEXT:    str z1, [x7]609; CHECK-NEXT:    str z0, [x16]610; CHECK-NEXT:    ldr p0, [x21]611; CHECK-NEXT:    ldr p1, [x20]612; CHECK-NEXT:    ldr z0, [x7]613; CHECK-NEXT:    ldr z1, [x16]614; CHECK-NEXT:    fmopa za0.s, p0/m, p1/m, z0.s, z1.s615; CHECK-NEXT:    mov x16, x2616; CHECK-NEXT:    incd x16617; CHECK-NEXT:    ldr p1, [x16]618; CHECK-NEXT:    ldr p0, [x15]619; CHECK-NEXT:    ldr z1, [x14, #1, mul vl]620; CHECK-NEXT:    ldr z0, [x13]621; CHECK-NEXT:    str p1, [x6]622; CHECK-NEXT:    str p0, [x5]623; CHECK-NEXT:    str z1, [x4]624; CHECK-NEXT:    str z0, [x3]625; CHECK-NEXT:    ldr p0, [x6]626; CHECK-NEXT:    ldr p1, [x5]627; CHECK-NEXT:    ldr z0, [x4]628; CHECK-NEXT:    ldr z1, [x3]629; CHECK-NEXT:    fmopa za1.s, p0/m, p1/m, z0.s, z1.s630; CHECK-NEXT:    ldr p1, [x2]631; CHECK-NEXT:    incd x15632; CHECK-NEXT:    ldr p0, [x15]633; CHECK-NEXT:    ldr z1, [x14]634; CHECK-NEXT:    ldr z0, [x13, #1, mul vl]635; CHECK-NEXT:    str p1, [x1]636; CHECK-NEXT:    str p0, [x0]637; CHECK-NEXT:    str z1, [x18]638; CHECK-NEXT:    str z0, [x17]639; CHECK-NEXT:    ldr p0, [x1]640; CHECK-NEXT:    ldr p1, [x0]641; CHECK-NEXT:    ldr z0, [x18]642; CHECK-NEXT:    ldr z1, [x17]643; CHECK-NEXT:    fmopa za2.s, p0/m, p1/m, z0.s, z1.s644; CHECK-NEXT:    ldr p1, [x16]645; CHECK-NEXT:    ldr p0, [x15]646; CHECK-NEXT:    ldr z1, [x14, #1, mul vl]647; CHECK-NEXT:    ldr z0, [x13, #1, mul vl]648; CHECK-NEXT:    str p1, [x12]649; CHECK-NEXT:    str p0, [x11]650; CHECK-NEXT:    str z1, [x10]651; CHECK-NEXT:    str z0, [x8]652; CHECK-NEXT:    ldr p0, [x12]653; CHECK-NEXT:    ldr p1, [x11]654; CHECK-NEXT:    ldr z0, [x10]655; CHECK-NEXT:    ldr z1, [x8]656; CHECK-NEXT:    fmopa za3.s, p0/m, p1/m, z0.s, z1.s657; CHECK-NEXT:    ldr x8, [x9]658; CHECK-NEXT:    subs x8, x8, #1659; CHECK-NEXT:    str x8, [x9]660; CHECK-NEXT:    b .LBB0_3661bb:662  %alloca = alloca <vscale x 16 x i1>, align 2663  %alloca1 = alloca <vscale x 16 x i1>, align 2664  %alloca2 = alloca <vscale x 4 x float>, align 16665  %alloca3 = alloca <vscale x 4 x float>, align 16666  %alloca4 = alloca <vscale x 16 x i1>, align 2667  %alloca5 = alloca <vscale x 16 x i1>, align 2668  %alloca6 = alloca <vscale x 4 x float>, align 16669  %alloca7 = alloca <vscale x 4 x float>, align 16670  %alloca8 = alloca <vscale x 16 x i1>, align 2671  %alloca9 = alloca <vscale x 16 x i1>, align 2672  %alloca10 = alloca <vscale x 4 x float>, align 16673  %alloca11 = alloca <vscale x 4 x float>, align 16674  %alloca12 = alloca <vscale x 16 x i1>, align 2675  %alloca13 = alloca <vscale x 16 x i1>, align 2676  %alloca14 = alloca <vscale x 4 x float>, align 16677  %alloca15 = alloca <vscale x 4 x float>, align 16678  %alloca16 = alloca i64, align 8679  %alloca17 = alloca i64, align 8680  %alloca18 = alloca ptr, align 8681  %alloca19 = alloca i64, align 8682  %alloca20 = alloca i64, align 8683  %alloca21 = alloca target("aarch64.svcount"), align 2684  %alloca22 = alloca i32, align 4685  %alloca23 = alloca <vscale x 32 x i8>, align 16686  %alloca24 = alloca i64, align 8687  %alloca25 = alloca target("aarch64.svcount"), align 2688  %alloca26 = alloca ptr, align 8689  %alloca27 = alloca i64, align 8690  %alloca28 = alloca target("aarch64.svcount"), align 2691  %alloca29 = alloca ptr, align 8692  %alloca30 = alloca i64, align 8693  %alloca31 = alloca <vscale x 32 x i1>, align 2694  %alloca32 = alloca <vscale x 32 x i1>, align 2695  %alloca33 = alloca <vscale x 8 x float>, align 16696  %alloca34 = alloca <vscale x 8 x float>, align 16697  %alloca35 = alloca i64, align 8698  %alloca36 = alloca i64, align 8699  %alloca37 = alloca i64, align 8700  %alloca38 = alloca i64, align 8701  %alloca39 = alloca i64, align 8702  %alloca40 = alloca i64, align 8703  %alloca41 = alloca i64, align 8704  %alloca42 = alloca i8, align 1705  %alloca43 = alloca ptr, align 8706  %alloca44 = alloca i64, align 8707  %alloca45 = alloca i8, align 1708  %alloca46 = alloca ptr, align 8709  %alloca47 = alloca i64, align 8710  %alloca48 = alloca ptr, align 8711  %alloca49 = alloca i64, align 8712  %alloca50 = alloca i8, align 1713  %alloca51 = alloca ptr, align 8714  %alloca52 = alloca ptr, align 8715  %alloca53 = alloca ptr, align 8716  %alloca54 = alloca i64, align 8717  %alloca55 = alloca i64, align 8718  %alloca56 = alloca i64, align 8719  %alloca57 = alloca i64, align 8720  %alloca58 = alloca i64, align 8721  %alloca59 = alloca i64, align 8722  %alloca60 = alloca i64, align 8723  %alloca61 = alloca i64, align 8724  %alloca62 = alloca i64, align 8725  %alloca63 = alloca target("aarch64.svcount"), align 2726  %alloca64 = alloca target("aarch64.svcount"), align 2727  %alloca65 = alloca ptr, align 8728  %alloca66 = alloca ptr, align 8729  %alloca67 = alloca ptr, align 8730  store i8 0, ptr %alloca42, align 1731  store i8 0, ptr %alloca45, align 1732  store i8 0, ptr %alloca50, align 1733  store ptr null, ptr %alloca51, align 8734  %load = load ptr, ptr %alloca43, align 8735  %load68 = load i64, ptr %alloca39, align 8736  %getelementptr = getelementptr inbounds float, ptr %load, i64 %load68737  %load69 = load i64, ptr %alloca41, align 8738  %sub = sub i64 %load69, 1739  %load70 = load i64, ptr %alloca44, align 8740  %mul = mul i64 %sub, %load70741  %getelementptr71 = getelementptr inbounds float, ptr %getelementptr, i64 %mul742  store ptr %getelementptr71, ptr %alloca51, align 8743  store ptr null, ptr %alloca52, align 8744  %load72 = load ptr, ptr %alloca46, align 8745  %load73 = load i64, ptr %alloca40, align 8746  %getelementptr74 = getelementptr inbounds float, ptr %load72, i64 %load73747  %load75 = load i64, ptr %alloca41, align 8748  %sub76 = sub i64 %load75, 1749  %load77 = load i64, ptr %alloca47, align 8750  %mul78 = mul i64 %sub76, %load77751  %getelementptr79 = getelementptr inbounds float, ptr %getelementptr74, i64 %mul78752  store ptr %getelementptr79, ptr %alloca52, align 8753  store ptr null, ptr %alloca53, align 8754  %load80 = load ptr, ptr %alloca48, align 8755  %load81 = load i64, ptr %alloca39, align 8756  %getelementptr82 = getelementptr inbounds float, ptr %load80, i64 %load81757  %load83 = load i64, ptr %alloca40, align 8758  %sub84 = sub i64 %load83, 1759  %load85 = load i64, ptr %alloca49, align 8760  %mul86 = mul i64 %sub84, %load85761  %getelementptr87 = getelementptr inbounds float, ptr %getelementptr82, i64 %mul86762  store ptr %getelementptr87, ptr %alloca53, align 8763  store i64 32, ptr %alloca54, align 8764  store i64 32, ptr %alloca55, align 8765  store i64 0, ptr %alloca56, align 8766  %load88 = load i64, ptr %alloca41, align 8767  %mul89 = mul i64 32, %load88768  store i64 %mul89, ptr %alloca56, align 8769  %load90 = load i8, ptr %alloca42, align 1770  %trunc = trunc i8 %load90 to i1771  store i64 32, ptr %alloca44, align 8772  store i64 0, ptr %alloca57, align 8773  %load91 = load i64, ptr %alloca39, align 8774  %sub92 = sub i64 %load91, 1775  %udiv = udiv i64 %sub92, 32776  %add = add i64 %udiv, 1777  store i64 %add, ptr %alloca57, align 8778  %load93 = load ptr, ptr %alloca43, align 8779  %load94 = load i64, ptr %alloca57, align 8780  %load95 = load i64, ptr %alloca56, align 8781  %mul96 = mul i64 %load94, %load95782  %getelementptr97 = getelementptr inbounds float, ptr %load93, i64 %mul96783  store ptr %getelementptr97, ptr %alloca51, align 8784  %load98 = load i8, ptr %alloca45, align 1785  %trunc99 = trunc i8 %load98 to i1786  store i64 32, ptr %alloca47, align 8787  store i64 0, ptr %alloca58, align 8788  %load100 = load i64, ptr %alloca40, align 8789  %sub101 = sub i64 %load100, 1790  %udiv102 = udiv i64 %sub101, 32791  %add103 = add i64 %udiv102, 1792  store i64 %add103, ptr %alloca58, align 8793  %load104 = load ptr, ptr %alloca46, align 8794  %load105 = load i64, ptr %alloca58, align 8795  %load106 = load i64, ptr %alloca56, align 8796  %mul107 = mul i64 %load105, %load106797  %getelementptr108 = getelementptr inbounds float, ptr %load104, i64 %mul107798  store ptr %getelementptr108, ptr %alloca52, align 8799  store i64 0, ptr %alloca59, align 8800  store i64 0, ptr %alloca59, align 8801  %load109 = load i64, ptr %alloca59, align 8802  %load110 = load i64, ptr %alloca40, align 8803  %icmp = icmp ult i64 %load109, %load110804  store i64 0, ptr %alloca60, align 8805  store i64 0, ptr %alloca60, align 8806  %load111 = load i64, ptr %alloca60, align 8807  %load112 = load i64, ptr %alloca39, align 8808  %icmp113 = icmp ult i64 %load111, %load112809  store i64 0, ptr %alloca61, align 8810  %load114 = load i64, ptr %alloca39, align 8811  %load115 = load i64, ptr %alloca60, align 8812  %sub116 = sub i64 %load114, %load115813  store i64 %sub116, ptr %alloca35, align 8814  store i64 32, ptr %alloca36, align 8815  %load117 = load i64, ptr %alloca35, align 8816  %load118 = load i64, ptr %alloca36, align 8817  %icmp119 = icmp ult i64 %load117, %load118818  %load120 = load i64, ptr %alloca35, align 8819  store i64 %load120, ptr %alloca61, align 8820  store i64 0, ptr %alloca62, align 8821  %load121 = load i64, ptr %alloca40, align 8822  %load122 = load i64, ptr %alloca59, align 8823  %sub123 = sub i64 %load121, %load122824  store i64 %sub123, ptr %alloca37, align 8825  store i64 32, ptr %alloca38, align 8826  %load124 = load i64, ptr %alloca37, align 8827  %load125 = load i64, ptr %alloca38, align 8828  %icmp126 = icmp ult i64 %load124, %load125829  %load127 = load i64, ptr %alloca37, align 8830  store i64 %load127, ptr %alloca62, align 8831  %load128 = load i64, ptr %alloca60, align 8832  %load129 = load i64, ptr %alloca39, align 8833  %call = call target("aarch64.svcount") @llvm.aarch64.sve.whilelt.c32(i64 %load128, i64 %load129, i32 2)834  store target("aarch64.svcount") %call, ptr %alloca63, align 2835  %load130 = load i64, ptr %alloca59, align 8836  %load131 = load i64, ptr %alloca40, align 8837  %call132 = call target("aarch64.svcount") @llvm.aarch64.sve.whilelt.c32(i64 %load130, i64 %load131, i32 2)838  store target("aarch64.svcount") %call132, ptr %alloca64, align 2839  store ptr null, ptr %alloca65, align 8840  %load133 = load ptr, ptr %alloca48, align 8841  %load134 = load i64, ptr %alloca60, align 8842  %getelementptr135 = getelementptr inbounds float, ptr %load133, i64 %load134843  %load136 = load i64, ptr %alloca59, align 8844  %load137 = load i64, ptr %alloca49, align 8845  %mul138 = mul i64 %load136, %load137846  %getelementptr139 = getelementptr inbounds float, ptr %getelementptr135, i64 %mul138847  store ptr %getelementptr139, ptr %alloca65, align 8848  call void @llvm.aarch64.sme.zero(i32 255)849  store ptr null, ptr %alloca66, align 8850  %load140 = load i8, ptr %alloca42, align 1851  %trunc141 = trunc i8 %load140 to i1852  %load142 = load ptr, ptr %alloca43, align 8853  %load143 = load i64, ptr %alloca60, align 8854  %load144 = load i64, ptr %alloca41, align 8855  %mul145 = mul i64 %load143, %load144856  %getelementptr146 = getelementptr inbounds float, ptr %load142, i64 %mul145857  store ptr %getelementptr146, ptr %alloca66, align 8858  store ptr null, ptr %alloca67, align 8859  %load147 = load i8, ptr %alloca45, align 1860  %trunc148 = trunc i8 %load147 to i1861  %load149 = load ptr, ptr %alloca46, align 8862  %load150 = load i64, ptr %alloca59, align 8863  %load151 = load i64, ptr %alloca41, align 8864  %mul152 = mul i64 %load150, %load151865  %getelementptr153 = getelementptr inbounds float, ptr %load149, i64 %mul152866  store ptr %getelementptr153, ptr %alloca67, align 8867  %load154 = load i64, ptr %alloca41, align 8868  %load155 = load target("aarch64.svcount"), ptr %alloca63, align 2869  %load156 = load ptr, ptr %alloca66, align 8870  %load157 = load i64, ptr %alloca44, align 8871  %udiv158 = udiv i64 %load157, 4872  %load159 = load target("aarch64.svcount"), ptr %alloca64, align 2873  %load160 = load ptr, ptr %alloca67, align 8874  %load161 = load i64, ptr %alloca47, align 8875  %udiv162 = udiv i64 %load161, 4876  store i64 %load154, ptr %alloca24, align 8877  store target("aarch64.svcount") %load155, ptr %alloca25, align 2878  store ptr %load156, ptr %alloca26, align 8879  store i64 %udiv158, ptr %alloca27, align 8880  store target("aarch64.svcount") %load159, ptr %alloca28, align 2881  store ptr %load160, ptr %alloca29, align 8882  store i64 %udiv162, ptr %alloca30, align 8883  %load163 = load target("aarch64.svcount"), ptr %alloca25, align 2884  %call164 = call { <vscale x 4 x i1>, <vscale x 4 x i1> } @llvm.aarch64.sve.pext.x2.nxv4i1(target("aarch64.svcount") %load163, i32 0)885  %extractvalue = extractvalue { <vscale x 4 x i1>, <vscale x 4 x i1> } %call164, 0886  %call165 = call <vscale x 16 x i1> @llvm.aarch64.sve.convert.to.svbool.nxv4i1(<vscale x 4 x i1> %extractvalue)887  %call166 = call <vscale x 32 x i1> @llvm.vector.insert.nxv32i1.nxv16i1(<vscale x 32 x i1> poison, <vscale x 16 x i1> %call165, i64 0)888  %extractvalue167 = extractvalue { <vscale x 4 x i1>, <vscale x 4 x i1> } %call164, 1889  %call168 = call <vscale x 16 x i1> @llvm.aarch64.sve.convert.to.svbool.nxv4i1(<vscale x 4 x i1> %extractvalue167)890  %call169 = call <vscale x 32 x i1> @llvm.vector.insert.nxv32i1.nxv16i1(<vscale x 32 x i1> %call166, <vscale x 16 x i1> %call168, i64 16)891  store <vscale x 32 x i1> %call169, ptr %alloca31, align 2892  %load170 = load target("aarch64.svcount"), ptr %alloca28, align 2893  %call171 = call { <vscale x 4 x i1>, <vscale x 4 x i1> } @llvm.aarch64.sve.pext.x2.nxv4i1(target("aarch64.svcount") %load170, i32 0)894  %extractvalue172 = extractvalue { <vscale x 4 x i1>, <vscale x 4 x i1> } %call171, 0895  %call173 = call <vscale x 16 x i1> @llvm.aarch64.sve.convert.to.svbool.nxv4i1(<vscale x 4 x i1> %extractvalue172)896  %call174 = call <vscale x 32 x i1> @llvm.vector.insert.nxv32i1.nxv16i1(<vscale x 32 x i1> poison, <vscale x 16 x i1> %call173, i64 0)897  %extractvalue175 = extractvalue { <vscale x 4 x i1>, <vscale x 4 x i1> } %call171, 1898  %call176 = call <vscale x 16 x i1> @llvm.aarch64.sve.convert.to.svbool.nxv4i1(<vscale x 4 x i1> %extractvalue175)899  %call177 = call <vscale x 32 x i1> @llvm.vector.insert.nxv32i1.nxv16i1(<vscale x 32 x i1> %call174, <vscale x 16 x i1> %call176, i64 16)900  store <vscale x 32 x i1> %call177, ptr %alloca32, align 2901  br label %bb178902 903bb178:                                            ; preds = %bb178, %bb904  %load179 = load i64, ptr %alloca24, align 8905  %icmp180 = icmp ugt i64 %load179, 0906  %load181 = load target("aarch64.svcount"), ptr %alloca25, align 2907  %load182 = load ptr, ptr %alloca26, align 8908  %call183 = call { <vscale x 4 x float>, <vscale x 4 x float> } @llvm.aarch64.sve.ld1.pn.x2.nxv4f32(target("aarch64.svcount") %load181, ptr %load182)909  %extractvalue184 = extractvalue { <vscale x 4 x float>, <vscale x 4 x float> } %call183, 0910  %call185 = call <vscale x 8 x float> @llvm.vector.insert.nxv8f32.nxv4f32(<vscale x 8 x float> poison, <vscale x 4 x float> %extractvalue184, i64 0)911  %extractvalue186 = extractvalue { <vscale x 4 x float>, <vscale x 4 x float> } %call183, 1912  %call187 = call <vscale x 8 x float> @llvm.vector.insert.nxv8f32.nxv4f32(<vscale x 8 x float> %call185, <vscale x 4 x float> %extractvalue186, i64 4)913  store <vscale x 8 x float> %call187, ptr %alloca33, align 16914  %load188 = load i64, ptr %alloca27, align 8915  %load189 = load ptr, ptr %alloca26, align 8916  %getelementptr190 = getelementptr inbounds float, ptr %load189, i64 %load188917  store ptr %getelementptr190, ptr %alloca26, align 8918  %load191 = load target("aarch64.svcount"), ptr %alloca28, align 2919  %load192 = load ptr, ptr %alloca29, align 8920  %call193 = call { <vscale x 4 x float>, <vscale x 4 x float> } @llvm.aarch64.sve.ld1.pn.x2.nxv4f32(target("aarch64.svcount") %load191, ptr %load192)921  %extractvalue194 = extractvalue { <vscale x 4 x float>, <vscale x 4 x float> } %call193, 0922  %call195 = call <vscale x 8 x float> @llvm.vector.insert.nxv8f32.nxv4f32(<vscale x 8 x float> poison, <vscale x 4 x float> %extractvalue194, i64 0)923  %extractvalue196 = extractvalue { <vscale x 4 x float>, <vscale x 4 x float> } %call193, 1924  %call197 = call <vscale x 8 x float> @llvm.vector.insert.nxv8f32.nxv4f32(<vscale x 8 x float> %call195, <vscale x 4 x float> %extractvalue196, i64 4)925  store <vscale x 8 x float> %call197, ptr %alloca34, align 16926  %load198 = load i64, ptr %alloca30, align 8927  %load199 = load ptr, ptr %alloca29, align 8928  %getelementptr200 = getelementptr inbounds float, ptr %load199, i64 %load198929  store ptr %getelementptr200, ptr %alloca29, align 8930  %load201 = load <vscale x 32 x i1>, ptr %alloca31, align 2931  %call202 = call <vscale x 16 x i1> @llvm.vector.extract.nxv16i1.nxv32i1(<vscale x 32 x i1> %load201, i64 0)932  %load203 = load <vscale x 32 x i1>, ptr %alloca32, align 2933  %call204 = call <vscale x 16 x i1> @llvm.vector.extract.nxv16i1.nxv32i1(<vscale x 32 x i1> %load203, i64 0)934  %load205 = load <vscale x 8 x float>, ptr %alloca33, align 16935  %call206 = call <vscale x 4 x float> @llvm.vector.extract.nxv4f32.nxv8f32(<vscale x 8 x float> %load205, i64 0)936  %load207 = load <vscale x 8 x float>, ptr %alloca34, align 16937  %call208 = call <vscale x 4 x float> @llvm.vector.extract.nxv4f32.nxv8f32(<vscale x 8 x float> %load207, i64 0)938  store <vscale x 16 x i1> %call202, ptr %alloca12, align 2939  store <vscale x 16 x i1> %call204, ptr %alloca13, align 2940  store <vscale x 4 x float> %call206, ptr %alloca14, align 16941  store <vscale x 4 x float> %call208, ptr %alloca15, align 16942  %load209 = load <vscale x 16 x i1>, ptr %alloca12, align 2943  %load210 = load <vscale x 16 x i1>, ptr %alloca13, align 2944  %load211 = load <vscale x 4 x float>, ptr %alloca14, align 16945  %load212 = load <vscale x 4 x float>, ptr %alloca15, align 16946  %call213 = call <vscale x 4 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv4i1(<vscale x 16 x i1> %load209)947  %call214 = call <vscale x 4 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv4i1(<vscale x 16 x i1> %load210)948  call void @llvm.aarch64.sme.mopa.nxv4f32(i32 0, <vscale x 4 x i1> %call213, <vscale x 4 x i1> %call214, <vscale x 4 x float> %load211, <vscale x 4 x float> %load212)949  %load215 = load <vscale x 32 x i1>, ptr %alloca31, align 2950  %call216 = call <vscale x 16 x i1> @llvm.vector.extract.nxv16i1.nxv32i1(<vscale x 32 x i1> %load215, i64 16)951  %load217 = load <vscale x 32 x i1>, ptr %alloca32, align 2952  %call218 = call <vscale x 16 x i1> @llvm.vector.extract.nxv16i1.nxv32i1(<vscale x 32 x i1> %load217, i64 0)953  %load219 = load <vscale x 8 x float>, ptr %alloca33, align 16954  %call220 = call <vscale x 4 x float> @llvm.vector.extract.nxv4f32.nxv8f32(<vscale x 8 x float> %load219, i64 4)955  %load221 = load <vscale x 8 x float>, ptr %alloca34, align 16956  %call222 = call <vscale x 4 x float> @llvm.vector.extract.nxv4f32.nxv8f32(<vscale x 8 x float> %load221, i64 0)957  store <vscale x 16 x i1> %call216, ptr %alloca8, align 2958  store <vscale x 16 x i1> %call218, ptr %alloca9, align 2959  store <vscale x 4 x float> %call220, ptr %alloca10, align 16960  store <vscale x 4 x float> %call222, ptr %alloca11, align 16961  %load223 = load <vscale x 16 x i1>, ptr %alloca8, align 2962  %load224 = load <vscale x 16 x i1>, ptr %alloca9, align 2963  %load225 = load <vscale x 4 x float>, ptr %alloca10, align 16964  %load226 = load <vscale x 4 x float>, ptr %alloca11, align 16965  %call227 = call <vscale x 4 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv4i1(<vscale x 16 x i1> %load223)966  %call228 = call <vscale x 4 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv4i1(<vscale x 16 x i1> %load224)967  call void @llvm.aarch64.sme.mopa.nxv4f32(i32 1, <vscale x 4 x i1> %call227, <vscale x 4 x i1> %call228, <vscale x 4 x float> %load225, <vscale x 4 x float> %load226)968  %load229 = load <vscale x 32 x i1>, ptr %alloca31, align 2969  %call230 = call <vscale x 16 x i1> @llvm.vector.extract.nxv16i1.nxv32i1(<vscale x 32 x i1> %load229, i64 0)970  %load231 = load <vscale x 32 x i1>, ptr %alloca32, align 2971  %call232 = call <vscale x 16 x i1> @llvm.vector.extract.nxv16i1.nxv32i1(<vscale x 32 x i1> %load231, i64 16)972  %load233 = load <vscale x 8 x float>, ptr %alloca33, align 16973  %call234 = call <vscale x 4 x float> @llvm.vector.extract.nxv4f32.nxv8f32(<vscale x 8 x float> %load233, i64 0)974  %load235 = load <vscale x 8 x float>, ptr %alloca34, align 16975  %call236 = call <vscale x 4 x float> @llvm.vector.extract.nxv4f32.nxv8f32(<vscale x 8 x float> %load235, i64 4)976  store <vscale x 16 x i1> %call230, ptr %alloca4, align 2977  store <vscale x 16 x i1> %call232, ptr %alloca5, align 2978  store <vscale x 4 x float> %call234, ptr %alloca6, align 16979  store <vscale x 4 x float> %call236, ptr %alloca7, align 16980  %load237 = load <vscale x 16 x i1>, ptr %alloca4, align 2981  %load238 = load <vscale x 16 x i1>, ptr %alloca5, align 2982  %load239 = load <vscale x 4 x float>, ptr %alloca6, align 16983  %load240 = load <vscale x 4 x float>, ptr %alloca7, align 16984  %call241 = call <vscale x 4 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv4i1(<vscale x 16 x i1> %load237)985  %call242 = call <vscale x 4 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv4i1(<vscale x 16 x i1> %load238)986  call void @llvm.aarch64.sme.mopa.nxv4f32(i32 2, <vscale x 4 x i1> %call241, <vscale x 4 x i1> %call242, <vscale x 4 x float> %load239, <vscale x 4 x float> %load240)987  %load243 = load <vscale x 32 x i1>, ptr %alloca31, align 2988  %call244 = call <vscale x 16 x i1> @llvm.vector.extract.nxv16i1.nxv32i1(<vscale x 32 x i1> %load243, i64 16)989  %load245 = load <vscale x 32 x i1>, ptr %alloca32, align 2990  %call246 = call <vscale x 16 x i1> @llvm.vector.extract.nxv16i1.nxv32i1(<vscale x 32 x i1> %load245, i64 16)991  %load247 = load <vscale x 8 x float>, ptr %alloca33, align 16992  %call248 = call <vscale x 4 x float> @llvm.vector.extract.nxv4f32.nxv8f32(<vscale x 8 x float> %load247, i64 4)993  %load249 = load <vscale x 8 x float>, ptr %alloca34, align 16994  %call250 = call <vscale x 4 x float> @llvm.vector.extract.nxv4f32.nxv8f32(<vscale x 8 x float> %load249, i64 4)995  store <vscale x 16 x i1> %call244, ptr %alloca, align 2996  store <vscale x 16 x i1> %call246, ptr %alloca1, align 2997  store <vscale x 4 x float> %call248, ptr %alloca2, align 16998  store <vscale x 4 x float> %call250, ptr %alloca3, align 16999  %load251 = load <vscale x 16 x i1>, ptr %alloca, align 21000  %load252 = load <vscale x 16 x i1>, ptr %alloca1, align 21001  %load253 = load <vscale x 4 x float>, ptr %alloca2, align 161002  %load254 = load <vscale x 4 x float>, ptr %alloca3, align 161003  %call255 = call <vscale x 4 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv4i1(<vscale x 16 x i1> %load251)1004  %call256 = call <vscale x 4 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv4i1(<vscale x 16 x i1> %load252)1005  call void @llvm.aarch64.sme.mopa.nxv4f32(i32 3, <vscale x 4 x i1> %call255, <vscale x 4 x i1> %call256, <vscale x 4 x float> %load253, <vscale x 4 x float> %load254)1006  %load257 = load i64, ptr %alloca24, align 81007  %add258 = add i64 %load257, -11008  store i64 %add258, ptr %alloca24, align 81009  br label %bb1781010}1011 1012; Function Attrs: nocallback nofree nosync nounwind willreturn memory(none)1013declare target("aarch64.svcount") @llvm.aarch64.sve.whilelt.c32(i64, i64, i32 immarg) #21014 1015; Function Attrs: nocallback nofree nosync nounwind willreturn1016declare void @llvm.aarch64.sme.zero(i32 immarg) #31017 1018; Function Attrs: nocallback nofree nosync nounwind willreturn memory(none)1019declare { <vscale x 4 x i1>, <vscale x 4 x i1> } @llvm.aarch64.sve.pext.x2.nxv4i1(target("aarch64.svcount"), i32 immarg) #21020 1021; Function Attrs: nocallback nofree nosync nounwind willreturn memory(none)1022declare <vscale x 16 x i1> @llvm.aarch64.sve.convert.to.svbool.nxv4i1(<vscale x 4 x i1>) #21023 1024; Function Attrs: nocallback nofree nosync nounwind speculatable willreturn memory(none)1025declare <vscale x 32 x i1> @llvm.vector.insert.nxv32i1.nxv16i1(<vscale x 32 x i1>, <vscale x 16 x i1>, i64 immarg) #41026 1027; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: read)1028declare { <vscale x 4 x float>, <vscale x 4 x float> } @llvm.aarch64.sve.ld1.pn.x2.nxv4f32(target("aarch64.svcount"), ptr) #51029 1030; Function Attrs: nocallback nofree nosync nounwind speculatable willreturn memory(none)1031declare <vscale x 8 x float> @llvm.vector.insert.nxv8f32.nxv4f32(<vscale x 8 x float>, <vscale x 4 x float>, i64 immarg) #41032 1033; Function Attrs: nocallback nofree nosync nounwind speculatable willreturn memory(none)1034declare <vscale x 16 x i1> @llvm.vector.extract.nxv16i1.nxv32i1(<vscale x 32 x i1>, i64 immarg) #41035 1036; Function Attrs: nocallback nofree nosync nounwind speculatable willreturn memory(none)1037declare <vscale x 4 x float> @llvm.vector.extract.nxv4f32.nxv8f32(<vscale x 8 x float>, i64 immarg) #41038 1039; Function Attrs: nocallback nofree nosync nounwind willreturn memory(none)1040declare <vscale x 4 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv4i1(<vscale x 16 x i1>) #21041 1042; Function Attrs: nocallback nofree nosync nounwind willreturn1043declare void @llvm.aarch64.sme.mopa.nxv4f32(i32 immarg, <vscale x 4 x i1>, <vscale x 4 x i1>, <vscale x 4 x float>, <vscale x 4 x float>) #31044 1045; Function Attrs: nocallback nofree nosync nounwind willreturn memory(none)1046declare target("aarch64.svcount") @llvm.aarch64.sve.whilelt.c8(i64, i64, i32 immarg) #21047 1048; Function Attrs: nocallback nofree nosync nounwind willreturn1049declare { <vscale x 16 x i8>, <vscale x 16 x i8> } @llvm.aarch64.sme.read.hor.vg2.nxv16i8(i32, i32) #31050 1051; Function Attrs: nocallback nofree nosync nounwind speculatable willreturn memory(none)1052declare <vscale x 32 x i8> @llvm.vector.insert.nxv32i8.nxv16i8(<vscale x 32 x i8>, <vscale x 16 x i8>, i64 immarg) #41053 1054; Function Attrs: nocallback nofree nosync nounwind speculatable willreturn memory(none)1055declare <vscale x 16 x i8> @llvm.vector.extract.nxv16i8.nxv32i8(<vscale x 32 x i8>, i64 immarg) #41056 1057; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: write)1058declare void @llvm.aarch64.sve.st1.pn.x2.nxv16i8(<vscale x 16 x i8>, <vscale x 16 x i8>, target("aarch64.svcount"), ptr) #61059 1060attributes #0 = { cold noreturn nounwind }1061attributes #1 = { mustprogress noinline optnone ssp uwtable(sync) vscale_range(1,16) "aarch64_new_za" "aarch64_pstate_sm_enabled" "frame-pointer"="non-leaf" "target-features"="+fp-armv8,+fullfp16,+sme,+sme-f64f64,+sme2" }1062attributes #2 = { nocallback nofree nosync nounwind willreturn memory(none) }1063attributes #3 = { nocallback nofree nosync nounwind willreturn }1064attributes #4 = { nocallback nofree nosync nounwind speculatable willreturn memory(none) }1065attributes #5 = { nocallback nofree nosync nounwind willreturn memory(argmem: read) }1066attributes #6 = { nocallback nofree nosync nounwind willreturn memory(argmem: write) }1067