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1# RUN: llc --verify-machineinstrs -mtriple=aarch64 -mcpu=neoverse-n1 -o - %s -run-pass pipeliner -aarch64-enable-pipeliner -debug-only=pipeliner 2>&1 | FileCheck %s2# REQUIRES: asserts3 4# Check that instructions referencing NZCV are not pipelined5 6# CHECK: SU([[SU0:[0-9]+]]):   nofpexcept FCMPSri {{.*}}, implicit-def $nzcv, implicit $fpcr7# CHECK: SU([[SU1:[0-9]+]]):   {{.*}} = FCSELSrrr {{.*}}, {{.*}}, 1, implicit $nzcv8# CHECK: Do not pipeline SU([[SU0:[0-9]+]])9# CHECK: Do not pipeline SU([[SU1:[0-9]+]])10 11--- |12  define dso_local void @KERNEL(ptr noalias nocapture noundef writeonly %a, ptr nocapture noundef readonly %b, i32 noundef %n) local_unnamed_addr #0 {13  entry:14    %cmp19 = icmp sgt i32 %n, 015    br i1 %cmp19, label %for.body.preheader, label %for.cond.cleanup16 17  for.body.preheader:                               ; preds = %entry18    %wide.trip.count = zext nneg i32 %n to i6419    br label %for.body20 21  for.cond.cleanup:                                 ; preds = %for.body, %entry22    ret void23 24  for.body:                                         ; preds = %for.body.preheader, %for.body25    %lsr.iv24 = phi i64 [ %wide.trip.count, %for.body.preheader ], [ %lsr.iv.next, %for.body ]26    %lsr.iv22 = phi ptr [ %b, %for.body.preheader ], [ %scevgep23, %for.body ]27    %lsr.iv = phi ptr [ %a, %for.body.preheader ], [ %scevgep, %for.body ]28    %0 = load float, ptr %lsr.iv22, align 429    %tobool = fcmp une float %0, 0.000000e+0030    %. = select i1 %tobool, float 1.000000e+00, float 2.000000e+0031    %add = fadd float %0, %.32    store float %add, ptr %lsr.iv, align 433    %scevgep = getelementptr i8, ptr %lsr.iv, i64 434    %scevgep23 = getelementptr i8, ptr %lsr.iv22, i64 435    %lsr.iv.next = add nsw i64 %lsr.iv24, -136    %exitcond.not = icmp eq i64 %lsr.iv.next, 037    br i1 %exitcond.not, label %for.cond.cleanup, label %for.body38  }39 40...41---42name:            KERNEL43tracksRegLiveness: true44liveins:45  - { reg: '$x0', virtual-reg: '%7' }46  - { reg: '$x1', virtual-reg: '%8' }47  - { reg: '$w2', virtual-reg: '%9' }48body:             |49  bb.0.entry:50    successors: %bb.1(0x50000000), %bb.2(0x30000000)51    liveins: $x0, $x1, $w252 53    %9:gpr32common = COPY $w254    %8:gpr64 = COPY $x155    %7:gpr64 = COPY $x056    dead $wzr = SUBSWri %9, 1, 0, implicit-def $nzcv57    Bcc 11, %bb.2, implicit $nzcv58    B %bb.159 60  bb.1.for.body.preheader:61    %11:gpr32 = ORRWrs $wzr, %9, 062    %0:gpr64all = SUBREG_TO_REG 0, killed %11, %subreg.sub_3263    %14:fpr32 = FMOVSi 064    %15:fpr32 = FMOVSi 11265    B %bb.366 67  bb.2.for.cond.cleanup:68    RET_ReallyLR69 70  bb.3.for.body:71    successors: %bb.2(0x04000000), %bb.3(0x7c000000)72 73    %1:gpr64sp = PHI %0, %bb.1, %6, %bb.374    %2:gpr64sp = PHI %8, %bb.1, %5, %bb.375    %3:gpr64sp = PHI %7, %bb.1, %4, %bb.376    early-clobber %12:gpr64sp, %13:fpr32 = LDRSpost %2, 4 :: (load (s32) from %ir.lsr.iv22)77    nofpexcept FCMPSri %13, implicit-def $nzcv, implicit $fpcr78    %16:fpr32 = FCSELSrrr %15, %14, 1, implicit $nzcv79    %17:fpr32 = nofpexcept FADDSrr %13, killed %16, implicit $fpcr80    early-clobber %18:gpr64sp = STRSpost killed %17, %3, 4 :: (store (s32) into %ir.lsr.iv)81    %4:gpr64all = COPY %1882    %5:gpr64all = COPY %1283    %19:gpr64 = nsw SUBSXri %1, 1, 0, implicit-def $nzcv84    %6:gpr64all = COPY %1985    Bcc 0, %bb.2, implicit $nzcv86    B %bb.387 88...89