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1# RUN: llc --verify-machineinstrs -mtriple=aarch64 -o - %s -run-pass pipeliner -aarch64-enable-pipeliner -pipeliner-enable-copytophi=0 -debug-only=pipeliner 2>&1 | FileCheck %s2# REQUIRES: asserts3 4# Compare and branch instructions are not supported now.5# CHECK: Unable to analyzeLoop, can NOT pipeline Loop6 7# (if supported) Check that instructions for loop control are not pipelined when compare and branch is used.8# CHECK(if supported): SU([[SU0:[0-9]+]]): [[V0:%[0-9]+]]:gpr64common = SUBXri [[V1:%[0-9]+]]:gpr64common, 1, 09# CHECK(if supported): Do not pipeline SU([[SU0:[0-9]+]])10 11--- |12 define dso_local void @func(ptr noalias nocapture noundef writeonly %a, ptr nocapture noundef readonly %b, i32 noundef %n) local_unnamed_addr #0 {13 entry:14 %or.cond = icmp ult i32 %n, 215 br i1 %or.cond, label %for.end, label %for.body.preheader16 17 for.body.preheader: ; preds = %entry18 %i.07 = add i32 %n, -119 %0 = sext i32 %i.07 to i6420 br label %for.body21 22 for.body: ; preds = %for.body.preheader, %for.body23 %indvars.iv = phi i64 [ %0, %for.body.preheader ], [ %indvars.iv.next, %for.body ]24 %1 = shl nsw i64 %indvars.iv, 225 %scevgep = getelementptr i8, ptr %b, i64 %126 %2 = load float, ptr %scevgep, align 427 %add = fadd float %2, 1.000000e+0028 %3 = shl nsw i64 %indvars.iv, 229 %scevgep11 = getelementptr i8, ptr %a, i64 %330 store float %add, ptr %scevgep11, align 431 %indvars.iv.next = add nsw i64 %indvars.iv, -132 %4 = add i64 %indvars.iv, -133 %5 = and i64 %4, 429496729534 %tobool.not = icmp eq i64 %5, 035 br i1 %tobool.not, label %for.end, label %for.body36 37 for.end: ; preds = %for.body, %entry38 ret void39 }40 41...42---43name: func44tracksRegLiveness: true45liveins:46 - { reg: '$x0', virtual-reg: '%3' }47 - { reg: '$x1', virtual-reg: '%4' }48 - { reg: '$w2', virtual-reg: '%5' }49body: |50 bb.0.entry:51 liveins: $x0, $x1, $w252 53 %5:gpr32common = COPY $w254 %4:gpr64common = COPY $x155 %3:gpr64common = COPY $x056 dead $wzr = SUBSWri %5, 2, 0, implicit-def $nzcv57 Bcc 3, %bb.3, implicit $nzcv58 B %bb.159 60 bb.1.for.body.preheader:61 %7:gpr32common = SUBWri %5, 1, 062 %9:gpr64all = IMPLICIT_DEF63 %8:gpr64 = SUBREG_TO_REG 0, killed %7, %subreg.sub_3264 %10:gpr64 = SBFMXri killed %8, 0, 3165 %0:gpr64all = COPY %1066 %12:fpr32 = FMOVSi 11267 68 bb.2.for.body:69 successors: %bb.3(0x04000000), %bb.2(0x7c000000)70 71 %1:gpr64common = PHI %0, %bb.1, %2, %bb.272 %11:fpr32 = LDRSroX %4, %1, 0, 1 :: (load (s32) from %ir.scevgep)73 %13:fpr32 = nofpexcept FADDSrr killed %11, %12, implicit $fpcr74 STRSroX killed %13, %3, %1, 0, 1 :: (store (s32) into %ir.scevgep11)75 %14:gpr64common = SUBXri %1, 1, 076 %2:gpr64all = COPY %1477 %15:gpr32 = COPY %14.sub_3278 CBNZW killed %15, %bb.279 B %bb.380 81 bb.3.for.end:82 RET_ReallyLR83 84...85