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1# RUN: llc -verify-machineinstrs -mtriple=aarch64-none-linux-gnu \2# RUN: -start-before aarch64-sls-hardening -o - %s \3# RUN: -asm-verbose=0 \4# RUN: | FileCheck %s \5# RUN: --implicit-check-not=__llvm_slsblr_thunk_aa_x5_x8 \6# RUN: --implicit-check-not=__llvm_slsblr_thunk_ab_x5_x8 \7# RUN: --implicit-check-not=__llvm_slsblr_thunk_aaz_x5 \8# RUN: --implicit-check-not=__llvm_slsblr_thunk_abz_x59 10# Pointer Authentication extension introduces more branch-with-link-to-register11# instructions for the BLR SLS hardening to handle, namely BLRAA, BLRAB, BLRAAZ12# and BLRABZ. Unlike the non-authenticating BLR instruction, BLRAA and BLRAB13# accept two register operands (almost 900 combinations for each instruction).14# For that reason, it is not practical to create all possible thunks.15 16# Check that the BLR SLS hardening transforms BLRA* instructions into17# unconditional BL calls to the correct thunk functions.18# Check that only relevant thunk functions are generated.19--- |20 define void @test_instructions() #0 {21 entry:22 ret void23 }24 25 define void @test_no_redef() #0 {26 entry:27 ret void28 }29 30 define void @test_regs() #0 {31 entry:32 ret void33 }34 35 attributes #0 = { "target-features"="+pauth,+harden-sls-blr" }36...37 38# Test that all BLRA* instructions are handled.39---40name: test_instructions41tracksRegLiveness: true42body: |43 bb.0.entry:44 liveins: $lr, $x0, $x1, $x2, $x345 46 BLRAA $x0, $x1, implicit-def $lr, implicit $sp, implicit-def $sp, implicit-def $w047 BLRAB $x1, $x2, implicit-def $lr, implicit $sp, implicit-def $sp, implicit-def $w048 BLRAAZ $x2, implicit-def $lr, implicit $sp, implicit-def $sp, implicit-def $w049 BLRABZ $x3, implicit-def $lr, implicit $sp, implicit-def $sp, implicit-def $w050 RET undef $lr51...52 53# Test that the same thunk function is not created twice.54---55name: test_no_redef56tracksRegLiveness: true57body: |58 bb.0.entry:59 liveins: $lr, $x0, $x1, $x2, $x3, $x460 61 ; thunk used by @test_instructions62 BLRAB $x1, $x2, implicit-def $lr, implicit $sp, implicit-def $sp, implicit-def $w063 64 ; thunk used by this function twice65 BLRAB $x3, $x4, implicit-def $lr, implicit $sp, implicit-def $sp, implicit-def $w066 BLRAB $x3, $x4, implicit-def $lr, implicit $sp, implicit-def $sp, implicit-def $w067 68 RET undef $lr69...70 71# Test that all xN registers (except x16, x17, x30 and xzr) are handled.72---73name: test_regs74tracksRegLiveness: true75body: |76 bb.0.entry:77 liveins: $lr, $x0, $x1, $x2, $x3, $x4, $x5, $x6, $x7, $x8, $x9, $x10, $x11, $x12, $x13, $x14, $x15, $x16, $x17, $x18, $x19, $x20, $x21, $x22, $x23, $x24, $x25, $x26, $x27, $x28, $fp78 79 BLRAA $x0, $x1, implicit-def $lr, implicit $sp, implicit-def $sp, implicit-def $w080 BLRAA $x2, $x3, implicit-def $lr, implicit $sp, implicit-def $sp, implicit-def $w081 BLRAA $x4, $x5, implicit-def $lr, implicit $sp, implicit-def $sp, implicit-def $w082 BLRAA $x6, $x7, implicit-def $lr, implicit $sp, implicit-def $sp, implicit-def $w083 BLRAA $x8, $x9, implicit-def $lr, implicit $sp, implicit-def $sp, implicit-def $w084 BLRAA $x10, $x11, implicit-def $lr, implicit $sp, implicit-def $sp, implicit-def $w085 BLRAA $x12, $x13, implicit-def $lr, implicit $sp, implicit-def $sp, implicit-def $w086 BLRAA $x14, $x15, implicit-def $lr, implicit $sp, implicit-def $sp, implicit-def $w087 ; skipping x16 and x1788 BLRAA $x18, $x19, implicit-def $lr, implicit $sp, implicit-def $sp, implicit-def $w089 BLRAA $x20, $x21, implicit-def $lr, implicit $sp, implicit-def $sp, implicit-def $w090 BLRAA $x22, $x23, implicit-def $lr, implicit $sp, implicit-def $sp, implicit-def $w091 BLRAA $x24, $x25, implicit-def $lr, implicit $sp, implicit-def $sp, implicit-def $w092 BLRAA $x26, $x27, implicit-def $lr, implicit $sp, implicit-def $sp, implicit-def $w093 BLRAA $x28, $fp, implicit-def $lr, implicit $sp, implicit-def $sp, implicit-def $w094 RET undef $lr95...96 97# CHECK-LABEL: test_instructions:98# CHECK-NEXT: .cfi_startproc99# CHECK-NEXT: bl __llvm_slsblr_thunk_aa_x0_x1100# CHECK-NEXT: bl __llvm_slsblr_thunk_ab_x1_x2101# CHECK-NEXT: bl __llvm_slsblr_thunk_aaz_x2102# CHECK-NEXT: bl __llvm_slsblr_thunk_abz_x3103# CHECK-NEXT: ret104 105# CHECK-LABEL: test_no_redef:106# CHECK-NEXT: .cfi_startproc107# CHECK-NEXT: bl __llvm_slsblr_thunk_ab_x1_x2108# CHECK-NEXT: bl __llvm_slsblr_thunk_ab_x3_x4109# CHECK-NEXT: bl __llvm_slsblr_thunk_ab_x3_x4110# CHECK-NEXT: ret111 112# CHECK-LABEL: test_regs:113# CHECK-NEXT: .cfi_startproc114# CHECK-NEXT: bl __llvm_slsblr_thunk_aa_x0_x1115# CHECK-NEXT: bl __llvm_slsblr_thunk_aa_x2_x3116# CHECK-NEXT: bl __llvm_slsblr_thunk_aa_x4_x5117# CHECK-NEXT: bl __llvm_slsblr_thunk_aa_x6_x7118# CHECK-NEXT: bl __llvm_slsblr_thunk_aa_x8_x9119# CHECK-NEXT: bl __llvm_slsblr_thunk_aa_x10_x11120# CHECK-NEXT: bl __llvm_slsblr_thunk_aa_x12_x13121# CHECK-NEXT: bl __llvm_slsblr_thunk_aa_x14_x15122# skipping x16 and x17123# CHECK-NEXT: bl __llvm_slsblr_thunk_aa_x18_x19124# CHECK-NEXT: bl __llvm_slsblr_thunk_aa_x20_x21125# CHECK-NEXT: bl __llvm_slsblr_thunk_aa_x22_x23126# CHECK-NEXT: bl __llvm_slsblr_thunk_aa_x24_x25127# CHECK-NEXT: bl __llvm_slsblr_thunk_aa_x26_x27128# CHECK-NEXT: bl __llvm_slsblr_thunk_aa_x28_x29129# CHECK-NEXT: ret130 131# CHECK-LABEL: __llvm_slsblr_thunk_aa_x0_x1:132# CHECK-NEXT: mov x16, x0133# CHECK-NEXT: braa x16, x1134# CHECK-NEXT: dsb sy135# CHECK-NEXT: isb136 137# CHECK-LABEL: __llvm_slsblr_thunk_ab_x1_x2:138# CHECK-NEXT: mov x16, x1139# CHECK-NEXT: brab x16, x2140# CHECK-NEXT: dsb sy141# CHECK-NEXT: isb142 143# CHECK-LABEL: __llvm_slsblr_thunk_aaz_x2:144# CHECK-NEXT: mov x16, x2145# CHECK-NEXT: braaz x16146# CHECK-NEXT: dsb sy147# CHECK-NEXT: isb148 149# CHECK-LABEL: __llvm_slsblr_thunk_abz_x3:150# CHECK-NEXT: mov x16, x3151# CHECK-NEXT: brabz x16152# CHECK-NEXT: dsb sy153# CHECK-NEXT: isb154 155# The instruction *operands* should correspond to the thunk function *name*156# (check that the name is parsed correctly when populating the thunk).157 158# CHECK-LABEL: __llvm_slsblr_thunk_aa_x2_x3:159# CHECK-NEXT: mov x16, x2160# CHECK: braa x16, x3161 162# CHECK-LABEL: __llvm_slsblr_thunk_aa_x4_x5:163# CHECK-NEXT: mov x16, x4164# CHECK: braa x16, x5165 166# CHECK-LABEL: __llvm_slsblr_thunk_aa_x6_x7:167# CHECK-NEXT: mov x16, x6168# CHECK: braa x16, x7169 170# CHECK-LABEL: __llvm_slsblr_thunk_aa_x8_x9:171# CHECK-NEXT: mov x16, x8172# CHECK: braa x16, x9173 174# CHECK-LABEL: __llvm_slsblr_thunk_aa_x10_x11:175# CHECK-NEXT: mov x16, x10176# CHECK: braa x16, x11177 178# CHECK-LABEL: __llvm_slsblr_thunk_aa_x12_x13:179# CHECK-NEXT: mov x16, x12180# CHECK: braa x16, x13181 182# CHECK-LABEL: __llvm_slsblr_thunk_aa_x14_x15:183# CHECK-NEXT: mov x16, x14184# CHECK: braa x16, x15185 186# skipping x16 and x17187 188# CHECK-LABEL: __llvm_slsblr_thunk_aa_x18_x19:189# CHECK-NEXT: mov x16, x18190# CHECK: braa x16, x19191 192# CHECK-LABEL: __llvm_slsblr_thunk_aa_x20_x21:193# CHECK-NEXT: mov x16, x20194# CHECK: braa x16, x21195 196# CHECK-LABEL: __llvm_slsblr_thunk_aa_x22_x23:197# CHECK-NEXT: mov x16, x22198# CHECK: braa x16, x23199 200# CHECK-LABEL: __llvm_slsblr_thunk_aa_x24_x25:201# CHECK-NEXT: mov x16, x24202# CHECK: braa x16, x25203 204# CHECK-LABEL: __llvm_slsblr_thunk_aa_x26_x27:205# CHECK-NEXT: mov x16, x26206# CHECK: braa x16, x27207 208# CHECK-LABEL: __llvm_slsblr_thunk_aa_x28_x29:209# CHECK-NEXT: mov x16, x28210# CHECK: braa x16, x29211