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1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 42; RUN: llc < %s -debug-only=legalize-types 2>&1 | FileCheck %s --check-prefix=CHECK-LEGALIZATION3; RUN: llc < %s | FileCheck %s4; REQUIRES: asserts5 6target triple = "aarch64-unknown-linux-gnu"7attributes #0 = {"target-features"="+sve" uwtable}8 9declare <vscale x 2 x i64> @llvm.vector.insert.nxv2i64.v8i64(<vscale x 2 x i64>, <8 x i64>, i64)10declare <vscale x 2 x double> @llvm.vector.insert.nxv2f64.v8f64(<vscale x 2 x double>, <8 x double>, i64)11 12define <vscale x 2 x i64> @test_nxv2i64_v8i64(<vscale x 2 x i64> %a, <8 x i64> %b) #0 {13; CHECK-LEGALIZATION-LABEL: test_nxv2i64_v8i64:14; CHECK-LEGALIZATION: // %bb.0:15; CHECK-LEGALIZATION-NEXT: str x29, [sp, #-16]! // 8-byte Folded Spill16; CHECK-LEGALIZATION-NEXT: .cfi_def_cfa_offset 1617; CHECK-LEGALIZATION-NEXT: .cfi_offset w29, -1618; CHECK-LEGALIZATION-NEXT: addvl sp, sp, #-319; CHECK-LEGALIZATION-NEXT: .cfi_escape 0x0f, 0x08, 0x8f, 0x10, 0x92, 0x2e, 0x00, 0x48, 0x1e, 0x22 // sp + 16 + 24 * VG20; CHECK-LEGALIZATION-NEXT: cntd x821; CHECK-LEGALIZATION-NEXT: ptrue p0.d, vl222; CHECK-LEGALIZATION-NEXT: mov w9, #2 // =0x223; CHECK-LEGALIZATION-NEXT: sub x8, x8, #224; CHECK-LEGALIZATION-NEXT: // kill: def $q1 killed $q1 def $z125; CHECK-LEGALIZATION-NEXT: mov x10, sp26; CHECK-LEGALIZATION-NEXT: cmp x8, #227; CHECK-LEGALIZATION-NEXT: mov z0.d, p0/m, z1.d28; CHECK-LEGALIZATION-NEXT: csel x9, x8, x9, lo29; CHECK-LEGALIZATION-NEXT: cmp x8, #430; CHECK-LEGALIZATION-NEXT: lsl x9, x9, #331; CHECK-LEGALIZATION-NEXT: str z0, [sp]32; CHECK-LEGALIZATION-NEXT: str q2, [x10, x9]33; CHECK-LEGALIZATION-NEXT: mov w9, #4 // =0x434; CHECK-LEGALIZATION-NEXT: addvl x10, sp, #135; CHECK-LEGALIZATION-NEXT: ldr z0, [sp]36; CHECK-LEGALIZATION-NEXT: csel x9, x8, x9, lo37; CHECK-LEGALIZATION-NEXT: cmp x8, #638; CHECK-LEGALIZATION-NEXT: lsl x9, x9, #339; CHECK-LEGALIZATION-NEXT: str z0, [sp, #1, mul vl]40; CHECK-LEGALIZATION-NEXT: str q3, [x10, x9]41; CHECK-LEGALIZATION-NEXT: mov w9, #6 // =0x642; CHECK-LEGALIZATION-NEXT: ldr z0, [sp, #1, mul vl]43; CHECK-LEGALIZATION-NEXT: csel x8, x8, x9, lo44; CHECK-LEGALIZATION-NEXT: addvl x9, sp, #245; CHECK-LEGALIZATION-NEXT: lsl x8, x8, #346; CHECK-LEGALIZATION-NEXT: str z0, [sp, #2, mul vl]47; CHECK-LEGALIZATION-NEXT: str q4, [x9, x8]48; CHECK-LEGALIZATION-NEXT: ldr z0, [sp, #2, mul vl]49; CHECK-LEGALIZATION-NEXT: addvl sp, sp, #350; CHECK-LEGALIZATION-NEXT: .cfi_def_cfa wsp, 1651; CHECK-LEGALIZATION-NEXT: ldr x29, [sp], #16 // 8-byte Folded Reload52; CHECK-LEGALIZATION-NEXT: .cfi_def_cfa_offset 053; CHECK-LEGALIZATION-NEXT: .cfi_restore w2954; CHECK-LEGALIZATION-NEXT: ret55;56; CHECK-LABEL: test_nxv2i64_v8i64:57; CHECK: // %bb.0:58; CHECK-NEXT: str x29, [sp, #-16]! // 8-byte Folded Spill59; CHECK-NEXT: .cfi_def_cfa_offset 1660; CHECK-NEXT: .cfi_offset w29, -1661; CHECK-NEXT: addvl sp, sp, #-362; CHECK-NEXT: .cfi_escape 0x0f, 0x08, 0x8f, 0x10, 0x92, 0x2e, 0x00, 0x48, 0x1e, 0x22 // sp + 16 + 24 * VG63; CHECK-NEXT: cntd x864; CHECK-NEXT: ptrue p0.d, vl265; CHECK-NEXT: mov w9, #2 // =0x266; CHECK-NEXT: sub x8, x8, #267; CHECK-NEXT: // kill: def $q1 killed $q1 def $z168; CHECK-NEXT: mov x10, sp69; CHECK-NEXT: cmp x8, #270; CHECK-NEXT: mov z0.d, p0/m, z1.d71; CHECK-NEXT: csel x9, x8, x9, lo72; CHECK-NEXT: cmp x8, #473; CHECK-NEXT: lsl x9, x9, #374; CHECK-NEXT: str z0, [sp]75; CHECK-NEXT: str q2, [x10, x9]76; CHECK-NEXT: mov w9, #4 // =0x477; CHECK-NEXT: addvl x10, sp, #178; CHECK-NEXT: ldr z0, [sp]79; CHECK-NEXT: csel x9, x8, x9, lo80; CHECK-NEXT: cmp x8, #681; CHECK-NEXT: lsl x9, x9, #382; CHECK-NEXT: str z0, [sp, #1, mul vl]83; CHECK-NEXT: str q3, [x10, x9]84; CHECK-NEXT: mov w9, #6 // =0x685; CHECK-NEXT: ldr z0, [sp, #1, mul vl]86; CHECK-NEXT: csel x8, x8, x9, lo87; CHECK-NEXT: addvl x9, sp, #288; CHECK-NEXT: lsl x8, x8, #389; CHECK-NEXT: str z0, [sp, #2, mul vl]90; CHECK-NEXT: str q4, [x9, x8]91; CHECK-NEXT: ldr z0, [sp, #2, mul vl]92; CHECK-NEXT: addvl sp, sp, #393; CHECK-NEXT: .cfi_def_cfa wsp, 1694; CHECK-NEXT: ldr x29, [sp], #16 // 8-byte Folded Reload95; CHECK-NEXT: .cfi_def_cfa_offset 096; CHECK-NEXT: .cfi_restore w2997; CHECK-NEXT: ret98 99 100 101 102 103 %r = call <vscale x 2 x i64> @llvm.vector.insert.nxv2i64.v8i64(<vscale x 2 x i64> %a, <8 x i64> %b, i64 0)104 ret <vscale x 2 x i64> %r105}106 107define <vscale x 2 x double> @test_nxv2f64_v8f64(<vscale x 2 x double> %a, <8 x double> %b) #0 {108; CHECK-LEGALIZATION-LABEL: test_nxv2f64_v8f64:109; CHECK-LEGALIZATION: // %bb.0:110; CHECK-LEGALIZATION-NEXT: str x29, [sp, #-16]! // 8-byte Folded Spill111; CHECK-LEGALIZATION-NEXT: .cfi_def_cfa_offset 16112; CHECK-LEGALIZATION-NEXT: .cfi_offset w29, -16113; CHECK-LEGALIZATION-NEXT: addvl sp, sp, #-3114; CHECK-LEGALIZATION-NEXT: .cfi_escape 0x0f, 0x08, 0x8f, 0x10, 0x92, 0x2e, 0x00, 0x48, 0x1e, 0x22 // sp + 16 + 24 * VG115; CHECK-LEGALIZATION-NEXT: cntd x8116; CHECK-LEGALIZATION-NEXT: ptrue p0.d, vl2117; CHECK-LEGALIZATION-NEXT: mov w9, #2 // =0x2118; CHECK-LEGALIZATION-NEXT: sub x8, x8, #2119; CHECK-LEGALIZATION-NEXT: // kill: def $q1 killed $q1 def $z1120; CHECK-LEGALIZATION-NEXT: mov x10, sp121; CHECK-LEGALIZATION-NEXT: cmp x8, #2122; CHECK-LEGALIZATION-NEXT: mov z0.d, p0/m, z1.d123; CHECK-LEGALIZATION-NEXT: csel x9, x8, x9, lo124; CHECK-LEGALIZATION-NEXT: cmp x8, #4125; CHECK-LEGALIZATION-NEXT: lsl x9, x9, #3126; CHECK-LEGALIZATION-NEXT: str z0, [sp]127; CHECK-LEGALIZATION-NEXT: str q2, [x10, x9]128; CHECK-LEGALIZATION-NEXT: mov w9, #4 // =0x4129; CHECK-LEGALIZATION-NEXT: addvl x10, sp, #1130; CHECK-LEGALIZATION-NEXT: ldr z0, [sp]131; CHECK-LEGALIZATION-NEXT: csel x9, x8, x9, lo132; CHECK-LEGALIZATION-NEXT: cmp x8, #6133; CHECK-LEGALIZATION-NEXT: lsl x9, x9, #3134; CHECK-LEGALIZATION-NEXT: str z0, [sp, #1, mul vl]135; CHECK-LEGALIZATION-NEXT: str q3, [x10, x9]136; CHECK-LEGALIZATION-NEXT: mov w9, #6 // =0x6137; CHECK-LEGALIZATION-NEXT: ldr z0, [sp, #1, mul vl]138; CHECK-LEGALIZATION-NEXT: csel x8, x8, x9, lo139; CHECK-LEGALIZATION-NEXT: addvl x9, sp, #2140; CHECK-LEGALIZATION-NEXT: lsl x8, x8, #3141; CHECK-LEGALIZATION-NEXT: str z0, [sp, #2, mul vl]142; CHECK-LEGALIZATION-NEXT: str q4, [x9, x8]143; CHECK-LEGALIZATION-NEXT: ldr z0, [sp, #2, mul vl]144; CHECK-LEGALIZATION-NEXT: addvl sp, sp, #3145; CHECK-LEGALIZATION-NEXT: .cfi_def_cfa wsp, 16146; CHECK-LEGALIZATION-NEXT: ldr x29, [sp], #16 // 8-byte Folded Reload147; CHECK-LEGALIZATION-NEXT: .cfi_def_cfa_offset 0148; CHECK-LEGALIZATION-NEXT: .cfi_restore w29149; CHECK-LEGALIZATION-NEXT: ret150;151; CHECK-LABEL: test_nxv2f64_v8f64:152; CHECK: // %bb.0:153; CHECK-NEXT: str x29, [sp, #-16]! // 8-byte Folded Spill154; CHECK-NEXT: .cfi_def_cfa_offset 16155; CHECK-NEXT: .cfi_offset w29, -16156; CHECK-NEXT: addvl sp, sp, #-3157; CHECK-NEXT: .cfi_escape 0x0f, 0x08, 0x8f, 0x10, 0x92, 0x2e, 0x00, 0x48, 0x1e, 0x22 // sp + 16 + 24 * VG158; CHECK-NEXT: cntd x8159; CHECK-NEXT: ptrue p0.d, vl2160; CHECK-NEXT: mov w9, #2 // =0x2161; CHECK-NEXT: sub x8, x8, #2162; CHECK-NEXT: // kill: def $q1 killed $q1 def $z1163; CHECK-NEXT: mov x10, sp164; CHECK-NEXT: cmp x8, #2165; CHECK-NEXT: mov z0.d, p0/m, z1.d166; CHECK-NEXT: csel x9, x8, x9, lo167; CHECK-NEXT: cmp x8, #4168; CHECK-NEXT: lsl x9, x9, #3169; CHECK-NEXT: str z0, [sp]170; CHECK-NEXT: str q2, [x10, x9]171; CHECK-NEXT: mov w9, #4 // =0x4172; CHECK-NEXT: addvl x10, sp, #1173; CHECK-NEXT: ldr z0, [sp]174; CHECK-NEXT: csel x9, x8, x9, lo175; CHECK-NEXT: cmp x8, #6176; CHECK-NEXT: lsl x9, x9, #3177; CHECK-NEXT: str z0, [sp, #1, mul vl]178; CHECK-NEXT: str q3, [x10, x9]179; CHECK-NEXT: mov w9, #6 // =0x6180; CHECK-NEXT: ldr z0, [sp, #1, mul vl]181; CHECK-NEXT: csel x8, x8, x9, lo182; CHECK-NEXT: addvl x9, sp, #2183; CHECK-NEXT: lsl x8, x8, #3184; CHECK-NEXT: str z0, [sp, #2, mul vl]185; CHECK-NEXT: str q4, [x9, x8]186; CHECK-NEXT: ldr z0, [sp, #2, mul vl]187; CHECK-NEXT: addvl sp, sp, #3188; CHECK-NEXT: .cfi_def_cfa wsp, 16189; CHECK-NEXT: ldr x29, [sp], #16 // 8-byte Folded Reload190; CHECK-NEXT: .cfi_def_cfa_offset 0191; CHECK-NEXT: .cfi_restore w29192; CHECK-NEXT: ret193 194 195 196 197 198 %r = call <vscale x 2 x double> @llvm.vector.insert.nxv2f64.v8f64(<vscale x 2 x double> %a, <8 x double> %b, i64 0)199 ret <vscale x 2 x double> %r200}201