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1; RUN: llc < %s -mtriple=aarch64 -mattr=+sve2 -pass-remarks-analysis=sme -aarch64-stack-hazard-remark-size=64 -o /dev/null < %s 2>&1 | FileCheck %s --check-prefixes=CHECK2; RUN: llc < %s -mtriple=aarch64 -mattr=+sve2 -pass-remarks-analysis=sme -aarch64-stack-hazard-size=1024 -o /dev/null < %s 2>&1 | FileCheck %s --check-prefixes=CHECK-PADDING3 4; Don't emit remarks for non-streaming functions.5define float @csr_x20_stackargs_notsc(float %a, float %b, float %c, float %d, float %e, float %f, float %g, float %h, float %i) {6; CHECK-NOT: remark: <unknown>:0:0: stack hazard in 'csr_x20_stackargs_notsc':7; CHECK-PADDING-NOT: remark: <unknown>:0:0: stack hazard in 'csr_x20_stackargs_notsc':8entry:9 tail call void asm sideeffect "", "~{x20}"() #110 ret float %i11}12 13; Don't emit remarks for functions that only access GPR stack objects.14define i64 @stackargs_gpr(i64 %a, i64 %b, i64 %c, i64 %d, i64 %e, i64 %f, i64 %g, i64 %h, i64 %i) #2 {15; CHECK-NOT: remark: <unknown>:0:0: stack hazard in 'csr_x20_stackargs_gpr':16; CHECK-PADDING-NOT: remark: <unknown>:0:0: stack hazard in 'csr_x20_stackargs_gpr':17entry:18 ret i64 %i19}20 21; Don't emit remarks for functions that only access FPR stack objects.22define double @stackargs_fpr(double %a, double %b, double %c, double %d, double %e, double %f, double %g, double %h, double %i) #2 {23; CHECK-NOT: remark: <unknown>:0:0: stack hazard in 'csr_x20_stackargs_fpr':24; CHECK-PADDING-NOT: remark: <unknown>:0:0: stack hazard in 'csr_x20_stackargs_fpr':25entry:26 ret double %i27}28 29; As this case is handled by addition of stack hazard padding, only emit remarks when this is not switched on.30define i32 @csr_d8_alloci64(i64 %d) #2 {31; CHECK: remark: <unknown>:0:0: stack hazard in 'csr_d8_alloci64': FPR stack object at [SP-16] is too close to GPR stack object at [SP-8]32; CHECK-PADDING-NOT: remark: <unknown>:0:0: stack hazard in 'csr_d8_alloci64':33entry:34 %a = alloca i6435 tail call void asm sideeffect "", "~{d8}"() #136 store i64 %d, ptr %a37 ret i32 038}39 40; As this case is handled by addition of stack hazard padding, only emit remarks when this is not switched on.41define i32 @csr_d8_allocnxv4i32(i64 %d) #2 {42; CHECK: remark: <unknown>:0:0: stack hazard in 'csr_d8_allocnxv4i32': FPR stack object at [SP-16] is too close to GPR stack object at [SP-8]43; CHECK-PADDING-NOT: remark: <unknown>:0:0: stack hazard in 'csr_d8_allocnxv4i32':44entry:45 %a = alloca <vscale x 4 x i32>46 tail call void asm sideeffect "", "~{d8}"() #147 store <vscale x 4 x i32> zeroinitializer, ptr %a48 ret i32 049}50 51define float @csr_x20_stackargs(float %a, float %b, float %c, float %d, float %e, float %f, float %g, float %h, float %i) #2 {52; CHECK: remark: <unknown>:0:0: stack hazard in 'csr_x20_stackargs': GPR stack object at [SP-16] is too close to FPR stack object at [SP+0]53; CHECK-PADDING: remark: <unknown>:0:0: stack hazard in 'csr_x20_stackargs': GPR stack object at [SP-16] is too close to FPR stack object at [SP+0]54entry:55 tail call void asm sideeffect "", "~{x20}"() #156 ret float %i57}58 59; In this case, addition of stack hazard padding triggers x29 (fp) spill, so we hazard occurs between FPR argument and GPR spill.60define float @csr_d8_stackargs(float %a, float %b, float %c, float %d, float %e, float %f, float %g, float %h, float %i) #2 {61; CHECK-NOT: remark: <unknown>:0:0: stack hazard in 'csr_d8_stackargs':62; CHECK-PADDING: remark: <unknown>:0:0: stack hazard in 'csr_d8_stackargs': GPR stack object at [SP-8] is too close to FPR stack object at [SP+0]63entry:64 tail call void asm sideeffect "", "~{d8}"() #165 ret float %i66}67 68; SVE calling conventions69; Padding is placed between predicate and fpr/zpr register spills, so only emit remarks when hazard padding is off.70 71define i32 @svecc_call(<4 x i16> %P0, ptr %P1, i32 %P2, <vscale x 16 x i8> %P3, i16 %P4) #2 {72; CHECK: remark: <unknown>:0:0: stack hazard in 'svecc_call': PPR stack object at [SP-64-258 * vscale] is too close to FPR stack object at [SP-64-256 * vscale]73; CHECK: remark: <unknown>:0:0: stack hazard in 'svecc_call': FPR stack object at [SP-64-16 * vscale] is too close to GPR stack object at [SP-64]74; CHECK-PADDING-NOT: remark: <unknown>:0:0: stack hazard in 'svecc_call':75entry:76 tail call void asm sideeffect "", "~{x0},~{x28},~{x27},~{x3}"() #277 %call = call ptr @memset(ptr noundef nonnull %P1, i32 noundef 45, i32 noundef 37)78 ret i32 -39614247379}80 81define i32 @svecc_alloca_call(<4 x i16> %P0, ptr %P1, i32 %P2, <vscale x 16 x i8> %P3, i16 %P4) #2 {82; CHECK: remark: <unknown>:0:0: stack hazard in 'svecc_alloca_call': PPR stack object at [SP-64-258 * vscale] is too close to FPR stack object at [SP-64-256 * vscale]83; CHECK: remark: <unknown>:0:0: stack hazard in 'svecc_alloca_call': FPR stack object at [SP-64-16 * vscale] is too close to GPR stack object at [SP-64]84; CHECK-PADDING-NOT: remark: <unknown>:0:0: stack hazard in 'svecc_alloca_call':85entry:86 tail call void asm sideeffect "", "~{x0},~{x28},~{x27},~{x3}"() #287 %0 = alloca [37 x i8], align 1688 %call = call ptr @memset(ptr noundef nonnull %0, i32 noundef 45, i32 noundef 37)89 ret i32 -39614247390}91declare ptr @memset(ptr, i32, i32)92 93%struct.mixed_struct = type { i32, float }94 95define i32 @mixed_stack_object(i32 %a, float %b) #2 {96; CHECK: remark: <unknown>:0:0: stack hazard in 'mixed_stack_object': Mixed stack object at [SP-8] accessed by both GP and FP instructions97; CHECK-PADDING: remark: <unknown>:0:0: stack hazard in 'mixed_stack_object': Mixed stack object at [SP-8] accessed by both GP and FP instructions98entry:99 %s = alloca %struct.mixed_struct100 %s.i = getelementptr %struct.mixed_struct, ptr %s, i32 0, i32 0101 %s.f = getelementptr %struct.mixed_struct, ptr %s, i32 0, i32 1102 store i32 %a, ptr %s.i103 store float %b, ptr %s.f104 ret i32 %a105}106 107define i32 @mixed_stack_objects(i32 %a, float %b) #2 {108; CHECK: remark: <unknown>:0:0: stack hazard in 'mixed_stack_objects': Mixed stack object at [SP-16] is too close to Mixed stack object at [SP-8]109; CHECK: remark: <unknown>:0:0: stack hazard in 'mixed_stack_objects': Mixed stack object at [SP-16] accessed by both GP and FP instructions110; CHECK: remark: <unknown>:0:0: stack hazard in 'mixed_stack_objects': Mixed stack object at [SP-8] accessed by both GP and FP instructions111; CHECK-PADDING: remark: <unknown>:0:0: stack hazard in 'mixed_stack_objects': Mixed stack object at [SP-16] is too close to Mixed stack object at [SP-8]112; CHECK-PADDING: remark: <unknown>:0:0: stack hazard in 'mixed_stack_objects': Mixed stack object at [SP-16] accessed by both GP and FP instructions113; CHECK-PADDING: remark: <unknown>:0:0: stack hazard in 'mixed_stack_objects': Mixed stack object at [SP-8] accessed by both GP and FP instructions114entry:115 %s0 = alloca %struct.mixed_struct116 %s0.i = getelementptr %struct.mixed_struct, ptr %s0, i32 0, i32 0117 %s0.f = getelementptr %struct.mixed_struct, ptr %s0, i32 0, i32 1118 store i32 %a, ptr %s0.i119 store float %b, ptr %s0.f120 121 %s1 = alloca %struct.mixed_struct122 %s1.i = getelementptr %struct.mixed_struct, ptr %s1, i32 0, i32 0123 %s1.f = getelementptr %struct.mixed_struct, ptr %s1, i32 0, i32 1124 store i32 %a, ptr %s1.i125 store float %b, ptr %s1.f126 127 ret i32 %a128}129 130; VLA-area stack objects are not separated.131define i32 @csr_d8_allocnxv4i32i32f64_vlai32f64(double %d, i32 %i) #2 {132; CHECK: remark: <unknown>:0:0: stack hazard in 'csr_d8_allocnxv4i32i32f64_vlai32f64': GPR stack object at [SP-48-16 * vscale] is too close to FPR stack object at [SP-48-16 * vscale]133; CHECK: remark: <unknown>:0:0: stack hazard in 'csr_d8_allocnxv4i32i32f64_vlai32f64': FPR stack object at [SP-32] is too close to GPR stack object at [SP-24]134; CHECK-PADDING: remark: <unknown>:0:0: stack hazard in 'csr_d8_allocnxv4i32i32f64_vlai32f64': GPR stack object at [SP-2096-16 * vscale] is too close to FPR stack object at [SP-2096-16 * vscale]135; CHECK-PADDING-NOT: remark: <unknown>:0:0: stack hazard in 'csr_d8_allocnxv4i32i32f64_vlai32f64':136entry:137 %a = alloca <vscale x 4 x i32>138 %0 = zext i32 %i to i64139 %vla0 = alloca i32, i64 %0140 %vla1 = alloca double, i64 %0141 %c = alloca double142 tail call void asm sideeffect "", "~{d8}"() #1143 store <vscale x 4 x i32> zeroinitializer, ptr %a144 store i32 zeroinitializer, ptr %vla0145 store double %d, ptr %vla1146 store double %d, ptr %c147 ret i32 0148}149 150attributes #2 = { "aarch64_pstate_sm_compatible" }151