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1; RUN: llc < %s -mtriple=aarch64-apple-darwin | FileCheck %s2 3target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128"4 5; CHECK-LABEL: .section __LLVM_STACKMAPS,__llvm_stackmaps6; CHECK-NEXT: __LLVM_StackMaps:7; Header8; CHECK-NEXT: .byte 39; CHECK-NEXT: .byte 010; CHECK-NEXT: .short 011; Num Functions12; CHECK-NEXT: .long 113; Num LargeConstants14; CHECK-NEXT: .long 015; Num Callsites16; CHECK-NEXT: .long 117 18; Functions and stack size19; CHECK-NEXT: .quad _stackmap_liveness20; CHECK-NEXT: .quad 1621 22; Test that the return register is recognized as an live-out.23define i64 @stackmap_liveness(i1 %c) {24; CHECK-LABEL: .long L{{.*}}-_stackmap_liveness25; CHECK-NEXT: .short 026; CHECK-NEXT: .short 027; Padding28; CHECK-NEXT: .p2align 329; CHECK-NEXT: .short 030; Num LiveOut Entries: 2031; CHECK-NEXT: .short 2032; LiveOut Entry 1: X033; CHECK-NEXT: .short 034; CHECK-NEXT: .byte 035; CHECK-NEXT: .byte 836; LiveOut Entry 2:37; CHECK-NEXT: .short 1938; CHECK-NEXT: .byte 039; CHECK-NEXT: .byte 840; LiveOut Entry 3:41; CHECK-NEXT: .short 2042; CHECK-NEXT: .byte 043; CHECK-NEXT: .byte 844; LiveOut Entry 4:45; CHECK-NEXT: .short 2146; CHECK-NEXT: .byte 047; CHECK-NEXT: .byte 848; LiveOut Entry 5:49; CHECK-NEXT: .short 2250; CHECK-NEXT: .byte 051; CHECK-NEXT: .byte 852; LiveOut Entry 6:53; CHECK-NEXT: .short 2354; CHECK-NEXT: .byte 055; CHECK-NEXT: .byte 856; LiveOut Entry 7:57; CHECK-NEXT: .short 2458; CHECK-NEXT: .byte 059; CHECK-NEXT: .byte 860; LiveOut Entry 8:61; CHECK-NEXT: .short 2562; CHECK-NEXT: .byte 063; CHECK-NEXT: .byte 864; LiveOut Entry 9:65; CHECK-NEXT: .short 2666; CHECK-NEXT: .byte 067; CHECK-NEXT: .byte 868; LiveOut Entry 10:69; CHECK-NEXT: .short 2770; CHECK-NEXT: .byte 071; CHECK-NEXT: .byte 872; LiveOut Entry 11:73; CHECK-NEXT: .short 2874; CHECK-NEXT: .byte 075; CHECK-NEXT: .byte 876; LiveOut Entry 12: SP77; CHECK-NEXT: .short 3178; CHECK-NEXT: .byte 079; CHECK-NEXT: .byte 880; LiveOut Entry 13:81; CHECK-NEXT: .short 7282; CHECK-NEXT: .byte 083; CHECK-NEXT: .byte 884; LiveOut Entry 14:85; CHECK-NEXT: .short 7386; CHECK-NEXT: .byte 087; CHECK-NEXT: .byte 888; LiveOut Entry 15:89; CHECK-NEXT: .short 7490; CHECK-NEXT: .byte 091; CHECK-NEXT: .byte 892; LiveOut Entry 16:93; CHECK-NEXT: .short 7594; CHECK-NEXT: .byte 095; CHECK-NEXT: .byte 896; LiveOut Entry 17:97; CHECK-NEXT: .short 7698; CHECK-NEXT: .byte 099; CHECK-NEXT: .byte 8100; LiveOut Entry 18:101; CHECK-NEXT: .short 77102; CHECK-NEXT: .byte 0103; CHECK-NEXT: .byte 8104; LiveOut Entry 19:105; CHECK-NEXT: .short 78106; CHECK-NEXT: .byte 0107; CHECK-NEXT: .byte 8108; LiveOut Entry 20:109; CHECK-NEXT: .short 79110; CHECK-NEXT: .byte 0111; CHECK-NEXT: .byte 8112; Align113; CHECK-NEXT: .p2align 3114 %1 = select i1 %c, i64 1, i64 2115 call anyregcc void (i64, i32, ptr, i32, ...) @llvm.experimental.patchpoint.void(i64 1, i32 32, ptr null, i32 0)116 ret i64 %1117}118 119declare void @llvm.experimental.patchpoint.void(i64, i32, ptr, i32, ...)120