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1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 42; RUN: llc -mtriple=aarch64 %s -o - | FileCheck %s --check-prefixes=CHECK,CHECK-SD3; RUN: llc -mtriple=aarch64 -global-isel %s -o - | FileCheck %s --check-prefixes=CHECK,CHECK-GI4 5; ===== Legal Scalars =====6define void @store_i8(i8 %a, ptr %ptr){7; CHECK-LABEL: store_i8:8; CHECK: // %bb.0:9; CHECK-NEXT: strb w0, [x1]10; CHECK-NEXT: ret11 store i8 %a, ptr %ptr12 ret void13}14 15define void @store_i16(i16 %a, ptr %ptr){16; CHECK-LABEL: store_i16:17; CHECK: // %bb.0:18; CHECK-NEXT: strh w0, [x1]19; CHECK-NEXT: ret20 store i16 %a, ptr %ptr21 ret void22}23 24define void @store_i32(i32 %a, ptr %ptr){25; CHECK-LABEL: store_i32:26; CHECK: // %bb.0:27; CHECK-NEXT: str w0, [x1]28; CHECK-NEXT: ret29 store i32 %a, ptr %ptr30 ret void31}32 33define void @store_i64(i64 %a, ptr %ptr){34; CHECK-LABEL: store_i64:35; CHECK: // %bb.0:36; CHECK-NEXT: str x0, [x1]37; CHECK-NEXT: ret38 store i64 %a, ptr %ptr39 ret void40}41 42; ===== Legal Vector Types =====43 44define void @store_v8i8(<8 x i8> %a, ptr %ptr){45; CHECK-LABEL: store_v8i8:46; CHECK: // %bb.0:47; CHECK-NEXT: str d0, [x0]48; CHECK-NEXT: ret49 store <8 x i8> %a, ptr %ptr50 ret void51}52 53define void @store_v16i8(<16 x i8> %a, ptr %ptr){54; CHECK-LABEL: store_v16i8:55; CHECK: // %bb.0:56; CHECK-NEXT: str q0, [x0]57; CHECK-NEXT: ret58 store <16 x i8> %a, ptr %ptr59 ret void60}61 62define void @store_v4i16(<4 x i16> %a, ptr %ptr){63; CHECK-LABEL: store_v4i16:64; CHECK: // %bb.0:65; CHECK-NEXT: str d0, [x0]66; CHECK-NEXT: ret67 store <4 x i16> %a, ptr %ptr68 ret void69}70 71define void @store_v8i16(<8 x i16> %a, ptr %ptr){72; CHECK-LABEL: store_v8i16:73; CHECK: // %bb.0:74; CHECK-NEXT: str q0, [x0]75; CHECK-NEXT: ret76 store <8 x i16> %a, ptr %ptr77 ret void78}79 80define void @store_v2i32(<2 x i32> %a, ptr %ptr){81; CHECK-LABEL: store_v2i32:82; CHECK: // %bb.0:83; CHECK-NEXT: str d0, [x0]84; CHECK-NEXT: ret85 store <2 x i32> %a, ptr %ptr86 ret void87}88 89define void @store_v4i32(<4 x i32> %a, ptr %ptr){90; CHECK-LABEL: store_v4i32:91; CHECK: // %bb.0:92; CHECK-NEXT: str q0, [x0]93; CHECK-NEXT: ret94 store <4 x i32> %a, ptr %ptr95 ret void96}97 98define void @store_v2i64(<2 x i64> %a, ptr %ptr){99; CHECK-LABEL: store_v2i64:100; CHECK: // %bb.0:101; CHECK-NEXT: str q0, [x0]102; CHECK-NEXT: ret103 store <2 x i64> %a, ptr %ptr104 ret void105}106 107; ===== Smaller/Larger Width Vectors with Legal Element Sizes =====108 109define void @store_v2i8(<2 x i8> %a, ptr %ptr){110; CHECK-SD-LABEL: store_v2i8:111; CHECK-SD: // %bb.0:112; CHECK-SD-NEXT: // kill: def $d0 killed $d0 def $q0113; CHECK-SD-NEXT: mov s1, v0.s[1]114; CHECK-SD-NEXT: str b0, [x0]115; CHECK-SD-NEXT: stur b1, [x0, #1]116; CHECK-SD-NEXT: ret117;118; CHECK-GI-LABEL: store_v2i8:119; CHECK-GI: // %bb.0:120; CHECK-GI-NEXT: // kill: def $d0 killed $d0 def $q0121; CHECK-GI-NEXT: mov s1, v0.s[1]122; CHECK-GI-NEXT: str b0, [x0]123; CHECK-GI-NEXT: str b1, [x0, #1]124; CHECK-GI-NEXT: ret125 store <2 x i8> %a, ptr %ptr126 ret void127}128 129define void @store_v4i8(i32 %a, ptr %ptr) {130; CHECK-LABEL: store_v4i8:131; CHECK: // %bb.0:132; CHECK-NEXT: str w0, [x1]133; CHECK-NEXT: ret134 %c = bitcast i32 %a to <4 x i8>135 store <4 x i8> %c, ptr %ptr136 ret void137}138 139define void @store_v32i8(<32 x i8> %a, ptr %ptr){140; CHECK-LABEL: store_v32i8:141; CHECK: // %bb.0:142; CHECK-NEXT: stp q0, q1, [x0]143; CHECK-NEXT: ret144 store <32 x i8> %a, ptr %ptr145 ret void146}147 148define void @store_v2i16(<2 x i16> %a, ptr %ptr){149; CHECK-LABEL: store_v2i16:150; CHECK: // %bb.0:151; CHECK-NEXT: // kill: def $d0 killed $d0 def $q0152; CHECK-NEXT: mov s1, v0.s[1]153; CHECK-NEXT: str h0, [x0]154; CHECK-NEXT: str h1, [x0, #2]155; CHECK-NEXT: ret156 store <2 x i16> %a, ptr %ptr157 ret void158}159 160define void @store_v16i16(<16 x i16> %a, ptr %ptr){161; CHECK-LABEL: store_v16i16:162; CHECK: // %bb.0:163; CHECK-NEXT: stp q0, q1, [x0]164; CHECK-NEXT: ret165 store <16 x i16> %a, ptr %ptr166 ret void167}168 169define void @store_v1i32(<1 x i32> %a, ptr %ptr){170; CHECK-SD-LABEL: store_v1i32:171; CHECK-SD: // %bb.0:172; CHECK-SD-NEXT: // kill: def $d0 killed $d0 def $q0173; CHECK-SD-NEXT: str s0, [x0]174; CHECK-SD-NEXT: ret175;176; CHECK-GI-LABEL: store_v1i32:177; CHECK-GI: // %bb.0:178; CHECK-GI-NEXT: str s0, [x0]179; CHECK-GI-NEXT: ret180 store <1 x i32> %a, ptr %ptr181 ret void182}183 184define void @store_v8i32(<8 x i32> %a, ptr %ptr){185; CHECK-LABEL: store_v8i32:186; CHECK: // %bb.0:187; CHECK-NEXT: stp q0, q1, [x0]188; CHECK-NEXT: ret189 store <8 x i32> %a, ptr %ptr190 ret void191}192 193define void @store_v4i64(<4 x i64> %a, ptr %ptr){194; CHECK-LABEL: store_v4i64:195; CHECK: // %bb.0:196; CHECK-NEXT: stp q0, q1, [x0]197; CHECK-NEXT: ret198 store <4 x i64> %a, ptr %ptr199 ret void200}201 202; ===== Vectors with Non-Pow 2 Widths =====203 204define void @store_v3i8(<3 x i8> %a, ptr %ptr){205; CHECK-SD-LABEL: store_v3i8:206; CHECK-SD: // %bb.0:207; CHECK-SD-NEXT: sub sp, sp, #16208; CHECK-SD-NEXT: .cfi_def_cfa_offset 16209; CHECK-SD-NEXT: fmov s0, w0210; CHECK-SD-NEXT: strb w2, [x3, #2]211; CHECK-SD-NEXT: mov v0.h[1], w1212; CHECK-SD-NEXT: mov v0.h[2], w2213; CHECK-SD-NEXT: xtn v0.8b, v0.8h214; CHECK-SD-NEXT: ushll v0.4s, v0.4h, #0215; CHECK-SD-NEXT: str h0, [x3]216; CHECK-SD-NEXT: add sp, sp, #16217; CHECK-SD-NEXT: ret218;219; CHECK-GI-LABEL: store_v3i8:220; CHECK-GI: // %bb.0:221; CHECK-GI-NEXT: strb w0, [x3]222; CHECK-GI-NEXT: strb w1, [x3, #1]223; CHECK-GI-NEXT: strb w2, [x3, #2]224; CHECK-GI-NEXT: ret225 store <3 x i8> %a, ptr %ptr226 ret void227}228 229define void @store_v7i8(<7 x i8> %a, ptr %ptr){230; CHECK-SD-LABEL: store_v7i8:231; CHECK-SD: // %bb.0:232; CHECK-SD-NEXT: // kill: def $d0 killed $d0 def $q0233; CHECK-SD-NEXT: mov b1, v0.b[6]234; CHECK-SD-NEXT: mov h2, v0.h[2]235; CHECK-SD-NEXT: str s0, [x0]236; CHECK-SD-NEXT: stur b1, [x0, #6]237; CHECK-SD-NEXT: str h2, [x0, #4]238; CHECK-SD-NEXT: ret239;240; CHECK-GI-LABEL: store_v7i8:241; CHECK-GI: // %bb.0:242; CHECK-GI-NEXT: add x8, x0, #1243; CHECK-GI-NEXT: // kill: def $d0 killed $d0 def $q0244; CHECK-GI-NEXT: add x9, x0, #2245; CHECK-GI-NEXT: st1 { v0.b }[0], [x0]246; CHECK-GI-NEXT: st1 { v0.b }[1], [x8]247; CHECK-GI-NEXT: add x8, x0, #3248; CHECK-GI-NEXT: st1 { v0.b }[3], [x8]249; CHECK-GI-NEXT: add x8, x0, #4250; CHECK-GI-NEXT: st1 { v0.b }[4], [x8]251; CHECK-GI-NEXT: add x8, x0, #5252; CHECK-GI-NEXT: st1 { v0.b }[5], [x8]253; CHECK-GI-NEXT: add x8, x0, #6254; CHECK-GI-NEXT: st1 { v0.b }[2], [x9]255; CHECK-GI-NEXT: st1 { v0.b }[6], [x8]256; CHECK-GI-NEXT: ret257 store <7 x i8> %a, ptr %ptr258 ret void259}260 261define void @store_v3i16(<3 x i16> %a, ptr %ptr){262; CHECK-SD-LABEL: store_v3i16:263; CHECK-SD: // %bb.0:264; CHECK-SD-NEXT: // kill: def $d0 killed $d0 def $q0265; CHECK-SD-NEXT: mov h1, v0.h[2]266; CHECK-SD-NEXT: str s0, [x0]267; CHECK-SD-NEXT: str h1, [x0, #4]268; CHECK-SD-NEXT: ret269;270; CHECK-GI-LABEL: store_v3i16:271; CHECK-GI: // %bb.0:272; CHECK-GI-NEXT: add x8, x0, #2273; CHECK-GI-NEXT: add x9, x0, #4274; CHECK-GI-NEXT: // kill: def $d0 killed $d0 def $q0275; CHECK-GI-NEXT: str h0, [x0]276; CHECK-GI-NEXT: st1 { v0.h }[1], [x8]277; CHECK-GI-NEXT: st1 { v0.h }[2], [x9]278; CHECK-GI-NEXT: ret279 store <3 x i16> %a, ptr %ptr280 ret void281}282 283define void @store_v7i16(<7 x i16> %a, ptr %ptr){284; CHECK-SD-LABEL: store_v7i16:285; CHECK-SD: // %bb.0:286; CHECK-SD-NEXT: mov h1, v0.h[6]287; CHECK-SD-NEXT: mov s2, v0.s[2]288; CHECK-SD-NEXT: str d0, [x0]289; CHECK-SD-NEXT: str h1, [x0, #12]290; CHECK-SD-NEXT: str s2, [x0, #8]291; CHECK-SD-NEXT: ret292;293; CHECK-GI-LABEL: store_v7i16:294; CHECK-GI: // %bb.0:295; CHECK-GI-NEXT: add x8, x0, #2296; CHECK-GI-NEXT: add x9, x0, #4297; CHECK-GI-NEXT: str h0, [x0]298; CHECK-GI-NEXT: st1 { v0.h }[1], [x8]299; CHECK-GI-NEXT: add x8, x0, #6300; CHECK-GI-NEXT: st1 { v0.h }[3], [x8]301; CHECK-GI-NEXT: add x8, x0, #8302; CHECK-GI-NEXT: st1 { v0.h }[4], [x8]303; CHECK-GI-NEXT: add x8, x0, #10304; CHECK-GI-NEXT: st1 { v0.h }[5], [x8]305; CHECK-GI-NEXT: add x8, x0, #12306; CHECK-GI-NEXT: st1 { v0.h }[2], [x9]307; CHECK-GI-NEXT: st1 { v0.h }[6], [x8]308; CHECK-GI-NEXT: ret309 store <7 x i16> %a, ptr %ptr310 ret void311}312 313define void @store_v3i32(<3 x i32> %a, ptr %ptr){314; CHECK-SD-LABEL: store_v3i32:315; CHECK-SD: // %bb.0:316; CHECK-SD-NEXT: mov s1, v0.s[2]317; CHECK-SD-NEXT: str d0, [x0]318; CHECK-SD-NEXT: str s1, [x0, #8]319; CHECK-SD-NEXT: ret320;321; CHECK-GI-LABEL: store_v3i32:322; CHECK-GI: // %bb.0:323; CHECK-GI-NEXT: add x8, x0, #4324; CHECK-GI-NEXT: add x9, x0, #8325; CHECK-GI-NEXT: str s0, [x0]326; CHECK-GI-NEXT: st1 { v0.s }[1], [x8]327; CHECK-GI-NEXT: st1 { v0.s }[2], [x9]328; CHECK-GI-NEXT: ret329 store <3 x i32> %a, ptr %ptr330 ret void331}332 333define void @store_v2i128(<2 x i128> %a, ptr %p) {334; CHECK-SD-LABEL: store_v2i128:335; CHECK-SD: // %bb.0:336; CHECK-SD-NEXT: stp x2, x3, [x4, #16]337; CHECK-SD-NEXT: stp x0, x1, [x4]338; CHECK-SD-NEXT: ret339;340; CHECK-GI-LABEL: store_v2i128:341; CHECK-GI: // %bb.0:342; CHECK-GI-NEXT: mov v0.d[0], x0343; CHECK-GI-NEXT: mov v1.d[0], x2344; CHECK-GI-NEXT: mov v0.d[1], x1345; CHECK-GI-NEXT: mov v1.d[1], x3346; CHECK-GI-NEXT: stp q0, q1, [x4]347; CHECK-GI-NEXT: ret348 store <2 x i128> %a, ptr %p349 ret void350}351 352define void @store_v2f128(<2 x fp128> %a, ptr %p) {353; CHECK-LABEL: store_v2f128:354; CHECK: // %bb.0:355; CHECK-NEXT: stp q0, q1, [x0]356; CHECK-NEXT: ret357 store <2 x fp128> %a, ptr %p358 ret void359}360