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1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py2; RUN: llc -mtriple=aarch64-unknown-linux-gnu < %s | FileCheck %s3 4; Fold5; ptr - (ptr & mask)6; To7; ptr & (~mask)8;9; This needs to be a backend-level fold because only by now pointers10; are just registers; in middle-end IR this can only be done via @llvm.ptrmask()11; intrinsic which is not sufficiently widely-spread yet.12;13; https://bugs.llvm.org/show_bug.cgi?id=4444814 15; The basic positive tests16 17define i32 @t0_32(i32 %ptr, i32 %mask) nounwind {18; CHECK-LABEL: t0_32:19; CHECK: // %bb.0:20; CHECK-NEXT: bic w0, w0, w121; CHECK-NEXT: ret22 %bias = and i32 %ptr, %mask23 %r = sub i32 %ptr, %bias24 ret i32 %r25}26define i64 @t1_64(i64 %ptr, i64 %mask) nounwind {27; CHECK-LABEL: t1_64:28; CHECK: // %bb.0:29; CHECK-NEXT: bic x0, x0, x130; CHECK-NEXT: ret31 %bias = and i64 %ptr, %mask32 %r = sub i64 %ptr, %bias33 ret i64 %r34}35 36define i32 @t2_commutative(i32 %ptr, i32 %mask) nounwind {37; CHECK-LABEL: t2_commutative:38; CHECK: // %bb.0:39; CHECK-NEXT: bic w0, w0, w140; CHECK-NEXT: ret41 %bias = and i32 %mask, %ptr ; swapped42 %r = sub i32 %ptr, %bias43 ret i32 %r44}45 46; Extra use tests47 48define i32 @n3_extrause1(i32 %ptr, i32 %mask, ptr %bias_storage) nounwind {49; CHECK-LABEL: n3_extrause1:50; CHECK: // %bb.0:51; CHECK-NEXT: and w8, w0, w152; CHECK-NEXT: sub w0, w0, w853; CHECK-NEXT: str w8, [x2]54; CHECK-NEXT: ret55 %bias = and i32 %ptr, %mask ; has extra uses, can't fold56 store i32 %bias, ptr %bias_storage57 %r = sub i32 %ptr, %bias58 ret i32 %r59}60 61; Negative tests62 63define i32 @n4_different_ptrs(i32 %ptr0, i32 %ptr1, i32 %mask) nounwind {64; CHECK-LABEL: n4_different_ptrs:65; CHECK: // %bb.0:66; CHECK-NEXT: and w8, w1, w267; CHECK-NEXT: sub w0, w0, w868; CHECK-NEXT: ret69 %bias = and i32 %ptr1, %mask ; not %ptr070 %r = sub i32 %ptr0, %bias ; not %ptr171 ret i32 %r72}73define i32 @n5_different_ptrs_commutative(i32 %ptr0, i32 %ptr1, i32 %mask) nounwind {74; CHECK-LABEL: n5_different_ptrs_commutative:75; CHECK: // %bb.0:76; CHECK-NEXT: and w8, w2, w177; CHECK-NEXT: sub w0, w0, w878; CHECK-NEXT: ret79 %bias = and i32 %mask, %ptr1 ; swapped, not %ptr080 %r = sub i32 %ptr0, %bias ; not %ptr181 ret i32 %r82}83 84define i32 @n6_not_lowbit_mask(i32 %ptr, i32 %mask) nounwind {85; CHECK-LABEL: n6_not_lowbit_mask:86; CHECK: // %bb.0:87; CHECK-NEXT: bic w0, w0, w188; CHECK-NEXT: ret89 %bias = and i32 %ptr, %mask90 %r = sub i32 %ptr, %bias91 ret i32 %r92}93 94define i32 @n7_sub_is_not_commutative(i32 %ptr, i32 %mask) nounwind {95; CHECK-LABEL: n7_sub_is_not_commutative:96; CHECK: // %bb.0:97; CHECK-NEXT: and w8, w0, w198; CHECK-NEXT: sub w0, w8, w099; CHECK-NEXT: ret100 %bias = and i32 %ptr, %mask101 %r = sub i32 %bias, %ptr ; wrong order102 ret i32 %r103}104