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1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py2; RUN: llc -mtriple=aarch64-linux-gnu -mattr=+sve < %s | FileCheck %s3 4; These test should allow scheduling of the loads before the stores.5 6define void @scalable_v16i8(ptr noalias nocapture noundef %l0) {7; CHECK-LABEL: scalable_v16i8:8; CHECK: // %bb.0:9; CHECK-NEXT: ldr z0, [x0]10; CHECK-NEXT: ldr z1, [x0, #1, mul vl]11; CHECK-NEXT: ptrue p0.b12; CHECK-NEXT: movprfx z2, z013; CHECK-NEXT: mul z2.b, p0/m, z2.b, z0.b14; CHECK-NEXT: movprfx z3, z115; CHECK-NEXT: mul z3.b, p0/m, z3.b, z1.b16; CHECK-NEXT: eor z0.d, z2.d, z0.d17; CHECK-NEXT: eor z1.d, z3.d, z1.d18; CHECK-NEXT: str z0, [x0]19; CHECK-NEXT: str z1, [x0, #1, mul vl]20; CHECK-NEXT: ret21 %l3 = load <vscale x 16 x i8>, ptr %l0, align 1622 %l5 = mul <vscale x 16 x i8> %l3, %l323 %l6 = xor <vscale x 16 x i8> %l5, %l324 store <vscale x 16 x i8> %l6, ptr %l0, align 1625 %l7 = tail call i64 @llvm.vscale.i64()26 %l8 = shl nuw nsw i64 %l7, 427 %l9 = getelementptr inbounds i8, ptr %l0, i64 %l828 %l11 = load <vscale x 16 x i8>, ptr %l9, align 1629 %l13 = mul <vscale x 16 x i8> %l11, %l1130 %l14 = xor <vscale x 16 x i8> %l13, %l1131 store <vscale x 16 x i8> %l14, ptr %l9, align 1632 ret void33}34 35define void @scalable_v8i16(ptr noalias nocapture noundef %l0) {36; CHECK-LABEL: scalable_v8i16:37; CHECK: // %bb.0:38; CHECK-NEXT: ldr z0, [x0]39; CHECK-NEXT: ldr z1, [x0, #1, mul vl]40; CHECK-NEXT: ptrue p0.h41; CHECK-NEXT: movprfx z2, z042; CHECK-NEXT: mul z2.h, p0/m, z2.h, z0.h43; CHECK-NEXT: movprfx z3, z144; CHECK-NEXT: mul z3.h, p0/m, z3.h, z1.h45; CHECK-NEXT: eor z0.d, z2.d, z0.d46; CHECK-NEXT: eor z1.d, z3.d, z1.d47; CHECK-NEXT: str z0, [x0]48; CHECK-NEXT: str z1, [x0, #1, mul vl]49; CHECK-NEXT: ret50 %l3 = load <vscale x 8 x i16>, ptr %l0, align 1651 %l5 = mul <vscale x 8 x i16> %l3, %l352 %l6 = xor <vscale x 8 x i16> %l5, %l353 store <vscale x 8 x i16> %l6, ptr %l0, align 1654 %l7 = tail call i64 @llvm.vscale.i64()55 %l8 = shl nuw nsw i64 %l7, 456 %l9 = getelementptr inbounds i8, ptr %l0, i64 %l857 %l11 = load <vscale x 8 x i16>, ptr %l9, align 1658 %l13 = mul <vscale x 8 x i16> %l11, %l1159 %l14 = xor <vscale x 8 x i16> %l13, %l1160 store <vscale x 8 x i16> %l14, ptr %l9, align 1661 ret void62}63 64define void @scalable_v4i32(ptr noalias nocapture noundef %l0) {65; CHECK-LABEL: scalable_v4i32:66; CHECK: // %bb.0:67; CHECK-NEXT: ldr z0, [x0]68; CHECK-NEXT: ldr z1, [x0, #1, mul vl]69; CHECK-NEXT: ptrue p0.s70; CHECK-NEXT: movprfx z2, z071; CHECK-NEXT: mul z2.s, p0/m, z2.s, z0.s72; CHECK-NEXT: movprfx z3, z173; CHECK-NEXT: mul z3.s, p0/m, z3.s, z1.s74; CHECK-NEXT: eor z0.d, z2.d, z0.d75; CHECK-NEXT: eor z1.d, z3.d, z1.d76; CHECK-NEXT: str z0, [x0]77; CHECK-NEXT: str z1, [x0, #1, mul vl]78; CHECK-NEXT: ret79 %l3 = load <vscale x 4 x i32>, ptr %l0, align 1680 %l5 = mul <vscale x 4 x i32> %l3, %l381 %l6 = xor <vscale x 4 x i32> %l5, %l382 store <vscale x 4 x i32> %l6, ptr %l0, align 1683 %l7 = tail call i64 @llvm.vscale.i64()84 %l8 = shl nuw nsw i64 %l7, 485 %l9 = getelementptr inbounds i8, ptr %l0, i64 %l886 %l11 = load <vscale x 4 x i32>, ptr %l9, align 1687 %l13 = mul <vscale x 4 x i32> %l11, %l1188 %l14 = xor <vscale x 4 x i32> %l13, %l1189 store <vscale x 4 x i32> %l14, ptr %l9, align 1690 ret void91}92 93define void @scalable_v2i64(ptr noalias nocapture noundef %l0) {94; CHECK-LABEL: scalable_v2i64:95; CHECK: // %bb.0:96; CHECK-NEXT: ldr z0, [x0]97; CHECK-NEXT: ldr z1, [x0, #1, mul vl]98; CHECK-NEXT: ptrue p0.d99; CHECK-NEXT: movprfx z2, z0100; CHECK-NEXT: mul z2.d, p0/m, z2.d, z0.d101; CHECK-NEXT: movprfx z3, z1102; CHECK-NEXT: mul z3.d, p0/m, z3.d, z1.d103; CHECK-NEXT: eor z0.d, z2.d, z0.d104; CHECK-NEXT: eor z1.d, z3.d, z1.d105; CHECK-NEXT: str z0, [x0]106; CHECK-NEXT: str z1, [x0, #1, mul vl]107; CHECK-NEXT: ret108 %l3 = load <vscale x 2 x i64>, ptr %l0, align 16109 %l5 = mul <vscale x 2 x i64> %l3, %l3110 %l6 = xor <vscale x 2 x i64> %l5, %l3111 store <vscale x 2 x i64> %l6, ptr %l0, align 16112 %l7 = tail call i64 @llvm.vscale.i64()113 %l8 = shl nuw nsw i64 %l7, 4114 %l9 = getelementptr inbounds i8, ptr %l0, i64 %l8115 %l11 = load <vscale x 2 x i64>, ptr %l9, align 16116 %l13 = mul <vscale x 2 x i64> %l11, %l11117 %l14 = xor <vscale x 2 x i64> %l13, %l11118 store <vscale x 2 x i64> %l14, ptr %l9, align 16119 ret void120}121 122define void @scalable_v8i8(ptr noalias nocapture noundef %l0) {123; CHECK-LABEL: scalable_v8i8:124; CHECK: // %bb.0:125; CHECK-NEXT: ptrue p0.h126; CHECK-NEXT: ld1sb { z0.h }, p0/z, [x0]127; CHECK-NEXT: ld1sb { z1.h }, p0/z, [x0, #1, mul vl]128; CHECK-NEXT: movprfx z2, z0129; CHECK-NEXT: mul z2.h, p0/m, z2.h, z0.h130; CHECK-NEXT: movprfx z3, z1131; CHECK-NEXT: mul z3.h, p0/m, z3.h, z1.h132; CHECK-NEXT: eor z0.d, z2.d, z0.d133; CHECK-NEXT: eor z1.d, z3.d, z1.d134; CHECK-NEXT: st1b { z0.h }, p0, [x0]135; CHECK-NEXT: st1b { z1.h }, p0, [x0, #1, mul vl]136; CHECK-NEXT: ret137 %l3 = load <vscale x 8 x i8>, ptr %l0, align 16138 %s3 = sext <vscale x 8 x i8> %l3 to <vscale x 8 x i16>139 %l5 = mul <vscale x 8 x i16> %s3, %s3140 %l6 = xor <vscale x 8 x i16> %l5, %s3141 %t6 = trunc <vscale x 8 x i16> %l6 to <vscale x 8 x i8>142 store <vscale x 8 x i8> %t6, ptr %l0, align 16143 %l7 = tail call i64 @llvm.vscale.i64()144 %l8 = shl nuw nsw i64 %l7, 3145 %l9 = getelementptr inbounds i8, ptr %l0, i64 %l8146 %l11 = load <vscale x 8 x i8>, ptr %l9, align 16147 %s11 = sext <vscale x 8 x i8> %l11 to <vscale x 8 x i16>148 %l13 = mul <vscale x 8 x i16> %s11, %s11149 %l14 = xor <vscale x 8 x i16> %l13, %s11150 %t14 = trunc <vscale x 8 x i16> %l14 to <vscale x 8 x i8>151 store <vscale x 8 x i8> %t14, ptr %l9, align 16152 ret void153}154 155define void @scalable_v4i8(ptr noalias nocapture noundef %l0) {156; CHECK-LABEL: scalable_v4i8:157; CHECK: // %bb.0:158; CHECK-NEXT: ptrue p0.s159; CHECK-NEXT: ld1sb { z0.s }, p0/z, [x0]160; CHECK-NEXT: ld1sb { z1.s }, p0/z, [x0, #1, mul vl]161; CHECK-NEXT: movprfx z2, z0162; CHECK-NEXT: mul z2.s, p0/m, z2.s, z0.s163; CHECK-NEXT: movprfx z3, z1164; CHECK-NEXT: mul z3.s, p0/m, z3.s, z1.s165; CHECK-NEXT: eor z0.d, z2.d, z0.d166; CHECK-NEXT: eor z1.d, z3.d, z1.d167; CHECK-NEXT: st1b { z0.s }, p0, [x0]168; CHECK-NEXT: st1b { z1.s }, p0, [x0, #1, mul vl]169; CHECK-NEXT: ret170 %l3 = load <vscale x 4 x i8>, ptr %l0, align 16171 %s3 = sext <vscale x 4 x i8> %l3 to <vscale x 4 x i32>172 %l5 = mul <vscale x 4 x i32> %s3, %s3173 %l6 = xor <vscale x 4 x i32> %l5, %s3174 %t6 = trunc <vscale x 4 x i32> %l6 to <vscale x 4 x i8>175 store <vscale x 4 x i8> %t6, ptr %l0, align 16176 %l7 = tail call i64 @llvm.vscale.i64()177 %l8 = shl nuw nsw i64 %l7, 2178 %l9 = getelementptr inbounds i8, ptr %l0, i64 %l8179 %l11 = load <vscale x 4 x i8>, ptr %l9, align 16180 %s11 = sext <vscale x 4 x i8> %l11 to <vscale x 4 x i32>181 %l13 = mul <vscale x 4 x i32> %s11, %s11182 %l14 = xor <vscale x 4 x i32> %l13, %s11183 %t14 = trunc <vscale x 4 x i32> %l14 to <vscale x 4 x i8>184 store <vscale x 4 x i8> %t14, ptr %l9, align 16185 ret void186}187 188define void @scalable_v2i8(ptr noalias nocapture noundef %l0) {189; CHECK-LABEL: scalable_v2i8:190; CHECK: // %bb.0:191; CHECK-NEXT: ptrue p0.d192; CHECK-NEXT: ld1sb { z0.d }, p0/z, [x0]193; CHECK-NEXT: ld1sb { z1.d }, p0/z, [x0, #1, mul vl]194; CHECK-NEXT: movprfx z2, z0195; CHECK-NEXT: mul z2.d, p0/m, z2.d, z0.d196; CHECK-NEXT: movprfx z3, z1197; CHECK-NEXT: mul z3.d, p0/m, z3.d, z1.d198; CHECK-NEXT: eor z0.d, z2.d, z0.d199; CHECK-NEXT: eor z1.d, z3.d, z1.d200; CHECK-NEXT: st1b { z0.d }, p0, [x0]201; CHECK-NEXT: st1b { z1.d }, p0, [x0, #1, mul vl]202; CHECK-NEXT: ret203 %l3 = load <vscale x 2 x i8>, ptr %l0, align 16204 %s3 = sext <vscale x 2 x i8> %l3 to <vscale x 2 x i64>205 %l5 = mul <vscale x 2 x i64> %s3, %s3206 %l6 = xor <vscale x 2 x i64> %l5, %s3207 %t6 = trunc <vscale x 2 x i64> %l6 to <vscale x 2 x i8>208 store <vscale x 2 x i8> %t6, ptr %l0, align 16209 %l7 = tail call i64 @llvm.vscale.i64()210 %l8 = shl nuw nsw i64 %l7, 1211 %l9 = getelementptr inbounds i8, ptr %l0, i64 %l8212 %l11 = load <vscale x 2 x i8>, ptr %l9, align 16213 %s11 = sext <vscale x 2 x i8> %l11 to <vscale x 2 x i64>214 %l13 = mul <vscale x 2 x i64> %s11, %s11215 %l14 = xor <vscale x 2 x i64> %l13, %s11216 %t14 = trunc <vscale x 2 x i64> %l14 to <vscale x 2 x i8>217 store <vscale x 2 x i8> %t14, ptr %l9, align 16218 ret void219}220 221define void @scalable_v4i16(ptr noalias nocapture noundef %l0) {222; CHECK-LABEL: scalable_v4i16:223; CHECK: // %bb.0:224; CHECK-NEXT: ptrue p0.s225; CHECK-NEXT: ld1sh { z0.s }, p0/z, [x0]226; CHECK-NEXT: ld1sh { z1.s }, p0/z, [x0, #1, mul vl]227; CHECK-NEXT: movprfx z2, z0228; CHECK-NEXT: mul z2.s, p0/m, z2.s, z0.s229; CHECK-NEXT: movprfx z3, z1230; CHECK-NEXT: mul z3.s, p0/m, z3.s, z1.s231; CHECK-NEXT: eor z0.d, z2.d, z0.d232; CHECK-NEXT: eor z1.d, z3.d, z1.d233; CHECK-NEXT: st1h { z0.s }, p0, [x0]234; CHECK-NEXT: st1h { z1.s }, p0, [x0, #1, mul vl]235; CHECK-NEXT: ret236 %l3 = load <vscale x 4 x i16>, ptr %l0, align 16237 %s3 = sext <vscale x 4 x i16> %l3 to <vscale x 4 x i32>238 %l5 = mul <vscale x 4 x i32> %s3, %s3239 %l6 = xor <vscale x 4 x i32> %l5, %s3240 %t6 = trunc <vscale x 4 x i32> %l6 to <vscale x 4 x i16>241 store <vscale x 4 x i16> %t6, ptr %l0, align 16242 %l7 = tail call i64 @llvm.vscale.i64()243 %l8 = shl nuw nsw i64 %l7, 3244 %l9 = getelementptr inbounds i8, ptr %l0, i64 %l8245 %l11 = load <vscale x 4 x i16>, ptr %l9, align 16246 %s11 = sext <vscale x 4 x i16> %l11 to <vscale x 4 x i32>247 %l13 = mul <vscale x 4 x i32> %s11, %s11248 %l14 = xor <vscale x 4 x i32> %l13, %s11249 %t14 = trunc <vscale x 4 x i32> %l14 to <vscale x 4 x i16>250 store <vscale x 4 x i16> %t14, ptr %l9, align 16251 ret void252}253 254define void @scalable_v2i16(ptr noalias nocapture noundef %l0) {255; CHECK-LABEL: scalable_v2i16:256; CHECK: // %bb.0:257; CHECK-NEXT: ptrue p0.d258; CHECK-NEXT: ld1sh { z0.d }, p0/z, [x0]259; CHECK-NEXT: ld1sh { z1.d }, p0/z, [x0, #1, mul vl]260; CHECK-NEXT: movprfx z2, z0261; CHECK-NEXT: mul z2.d, p0/m, z2.d, z0.d262; CHECK-NEXT: movprfx z3, z1263; CHECK-NEXT: mul z3.d, p0/m, z3.d, z1.d264; CHECK-NEXT: eor z0.d, z2.d, z0.d265; CHECK-NEXT: eor z1.d, z3.d, z1.d266; CHECK-NEXT: st1h { z0.d }, p0, [x0]267; CHECK-NEXT: st1h { z1.d }, p0, [x0, #1, mul vl]268; CHECK-NEXT: ret269 %l3 = load <vscale x 2 x i16>, ptr %l0, align 16270 %s3 = sext <vscale x 2 x i16> %l3 to <vscale x 2 x i64>271 %l5 = mul <vscale x 2 x i64> %s3, %s3272 %l6 = xor <vscale x 2 x i64> %l5, %s3273 %t6 = trunc <vscale x 2 x i64> %l6 to <vscale x 2 x i16>274 store <vscale x 2 x i16> %t6, ptr %l0, align 16275 %l7 = tail call i64 @llvm.vscale.i64()276 %l8 = shl nuw nsw i64 %l7, 2277 %l9 = getelementptr inbounds i8, ptr %l0, i64 %l8278 %l11 = load <vscale x 2 x i16>, ptr %l9, align 16279 %s11 = sext <vscale x 2 x i16> %l11 to <vscale x 2 x i64>280 %l13 = mul <vscale x 2 x i64> %s11, %s11281 %l14 = xor <vscale x 2 x i64> %l13, %s11282 %t14 = trunc <vscale x 2 x i64> %l14 to <vscale x 2 x i16>283 store <vscale x 2 x i16> %t14, ptr %l9, align 16284 ret void285}286 287define void @scalable_v2i32(ptr noalias nocapture noundef %l0) {288; CHECK-LABEL: scalable_v2i32:289; CHECK: // %bb.0:290; CHECK-NEXT: ptrue p0.d291; CHECK-NEXT: ld1sw { z0.d }, p0/z, [x0]292; CHECK-NEXT: ld1sw { z1.d }, p0/z, [x0, #1, mul vl]293; CHECK-NEXT: movprfx z2, z0294; CHECK-NEXT: mul z2.d, p0/m, z2.d, z0.d295; CHECK-NEXT: movprfx z3, z1296; CHECK-NEXT: mul z3.d, p0/m, z3.d, z1.d297; CHECK-NEXT: eor z0.d, z2.d, z0.d298; CHECK-NEXT: eor z1.d, z3.d, z1.d299; CHECK-NEXT: st1w { z0.d }, p0, [x0]300; CHECK-NEXT: st1w { z1.d }, p0, [x0, #1, mul vl]301; CHECK-NEXT: ret302 %l3 = load <vscale x 2 x i32>, ptr %l0, align 16303 %s3 = sext <vscale x 2 x i32> %l3 to <vscale x 2 x i64>304 %l5 = mul <vscale x 2 x i64> %s3, %s3305 %l6 = xor <vscale x 2 x i64> %l5, %s3306 %t6 = trunc <vscale x 2 x i64> %l6 to <vscale x 2 x i32>307 store <vscale x 2 x i32> %t6, ptr %l0, align 16308 %l7 = tail call i64 @llvm.vscale.i64()309 %l8 = shl nuw nsw i64 %l7, 3310 %l9 = getelementptr inbounds i8, ptr %l0, i64 %l8311 %l11 = load <vscale x 2 x i32>, ptr %l9, align 16312 %s11 = sext <vscale x 2 x i32> %l11 to <vscale x 2 x i64>313 %l13 = mul <vscale x 2 x i64> %s11, %s11314 %l14 = xor <vscale x 2 x i64> %l13, %s11315 %t14 = trunc <vscale x 2 x i64> %l14 to <vscale x 2 x i32>316 store <vscale x 2 x i32> %t14, ptr %l9, align 16317 ret void318}319 320define void @negative_tooshort_v16i8(ptr noalias nocapture noundef %l0) {321; CHECK-LABEL: negative_tooshort_v16i8:322; CHECK: // %bb.0:323; CHECK-NEXT: ldr z0, [x0]324; CHECK-NEXT: ptrue p0.b325; CHECK-NEXT: cnth x8326; CHECK-NEXT: movprfx z1, z0327; CHECK-NEXT: mul z1.b, p0/m, z1.b, z0.b328; CHECK-NEXT: eor z0.d, z1.d, z0.d329; CHECK-NEXT: str z0, [x0]330; CHECK-NEXT: ld1b { z0.b }, p0/z, [x0, x8]331; CHECK-NEXT: movprfx z1, z0332; CHECK-NEXT: mul z1.b, p0/m, z1.b, z0.b333; CHECK-NEXT: eor z0.d, z1.d, z0.d334; CHECK-NEXT: st1b { z0.b }, p0, [x0, x8]335; CHECK-NEXT: ret336 %l3 = load <vscale x 16 x i8>, ptr %l0, align 16337 %l5 = mul <vscale x 16 x i8> %l3, %l3338 %l6 = xor <vscale x 16 x i8> %l5, %l3339 store <vscale x 16 x i8> %l6, ptr %l0, align 16340 %l7 = tail call i64 @llvm.vscale.i64()341 %l8 = shl nuw nsw i64 %l7, 3342 %l9 = getelementptr inbounds i8, ptr %l0, i64 %l8343 %l11 = load <vscale x 16 x i8>, ptr %l9, align 16344 %l13 = mul <vscale x 16 x i8> %l11, %l11345 %l14 = xor <vscale x 16 x i8> %l13, %l11346 store <vscale x 16 x i8> %l14, ptr %l9, align 16347 ret void348}349 350define void @negative_scalable_v2i8(ptr noalias nocapture noundef %l0) {351; CHECK-LABEL: negative_scalable_v2i8:352; CHECK: // %bb.0:353; CHECK-NEXT: ptrue p0.d354; CHECK-NEXT: rdvl x8, #1355; CHECK-NEXT: lsr x8, x8, #4356; CHECK-NEXT: ld1sb { z0.d }, p0/z, [x0]357; CHECK-NEXT: movprfx z1, z0358; CHECK-NEXT: mul z1.d, p0/m, z1.d, z0.d359; CHECK-NEXT: eor z0.d, z1.d, z0.d360; CHECK-NEXT: st1b { z0.d }, p0, [x0]361; CHECK-NEXT: ld1sb { z0.d }, p0/z, [x0, x8]362; CHECK-NEXT: movprfx z1, z0363; CHECK-NEXT: mul z1.d, p0/m, z1.d, z0.d364; CHECK-NEXT: eor z0.d, z1.d, z0.d365; CHECK-NEXT: st1b { z0.d }, p0, [x0, x8]366; CHECK-NEXT: ret367 %l3 = load <vscale x 2 x i8>, ptr %l0, align 16368 %s3 = sext <vscale x 2 x i8> %l3 to <vscale x 2 x i64>369 %l5 = mul <vscale x 2 x i64> %s3, %s3370 %l6 = xor <vscale x 2 x i64> %l5, %s3371 %t6 = trunc <vscale x 2 x i64> %l6 to <vscale x 2 x i8>372 store <vscale x 2 x i8> %t6, ptr %l0, align 16373 %l7 = tail call i64 @llvm.vscale.i64()374 %l8 = shl nuw nsw i64 %l7, 0375 %l9 = getelementptr inbounds i8, ptr %l0, i64 %l8376 %l11 = load <vscale x 2 x i8>, ptr %l9, align 16377 %s11 = sext <vscale x 2 x i8> %l11 to <vscale x 2 x i64>378 %l13 = mul <vscale x 2 x i64> %s11, %s11379 %l14 = xor <vscale x 2 x i64> %l13, %s11380 %t14 = trunc <vscale x 2 x i64> %l14 to <vscale x 2 x i8>381 store <vscale x 2 x i8> %t14, ptr %l9, align 16382 ret void383}384 385define void @negative_scalable_v2i16(ptr noalias nocapture noundef %l0) {386; CHECK-LABEL: negative_scalable_v2i16:387; CHECK: // %bb.0:388; CHECK-NEXT: ptrue p0.d389; CHECK-NEXT: cntd x8390; CHECK-NEXT: add x8, x0, x8391; CHECK-NEXT: ld1sh { z0.d }, p0/z, [x0]392; CHECK-NEXT: movprfx z1, z0393; CHECK-NEXT: mul z1.d, p0/m, z1.d, z0.d394; CHECK-NEXT: eor z0.d, z1.d, z0.d395; CHECK-NEXT: st1h { z0.d }, p0, [x0]396; CHECK-NEXT: ld1sh { z0.d }, p0/z, [x8]397; CHECK-NEXT: movprfx z1, z0398; CHECK-NEXT: mul z1.d, p0/m, z1.d, z0.d399; CHECK-NEXT: eor z0.d, z1.d, z0.d400; CHECK-NEXT: st1h { z0.d }, p0, [x8]401; CHECK-NEXT: ret402 %l3 = load <vscale x 2 x i16>, ptr %l0, align 16403 %s3 = sext <vscale x 2 x i16> %l3 to <vscale x 2 x i64>404 %l5 = mul <vscale x 2 x i64> %s3, %s3405 %l6 = xor <vscale x 2 x i64> %l5, %s3406 %t6 = trunc <vscale x 2 x i64> %l6 to <vscale x 2 x i16>407 store <vscale x 2 x i16> %t6, ptr %l0, align 16408 %l7 = tail call i64 @llvm.vscale.i64()409 %l8 = shl nuw nsw i64 %l7, 1410 %l9 = getelementptr inbounds i8, ptr %l0, i64 %l8411 %l11 = load <vscale x 2 x i16>, ptr %l9, align 16412 %s11 = sext <vscale x 2 x i16> %l11 to <vscale x 2 x i64>413 %l13 = mul <vscale x 2 x i64> %s11, %s11414 %l14 = xor <vscale x 2 x i64> %l13, %s11415 %t14 = trunc <vscale x 2 x i64> %l14 to <vscale x 2 x i16>416 store <vscale x 2 x i16> %t14, ptr %l9, align 16417 ret void418}419 420define void @negative_scalable_v2i32(ptr noalias nocapture noundef %l0) {421; CHECK-LABEL: negative_scalable_v2i32:422; CHECK: // %bb.0:423; CHECK-NEXT: ptrue p0.d424; CHECK-NEXT: cntw x8425; CHECK-NEXT: add x8, x0, x8426; CHECK-NEXT: ld1sw { z0.d }, p0/z, [x0]427; CHECK-NEXT: movprfx z1, z0428; CHECK-NEXT: mul z1.d, p0/m, z1.d, z0.d429; CHECK-NEXT: eor z0.d, z1.d, z0.d430; CHECK-NEXT: st1w { z0.d }, p0, [x0]431; CHECK-NEXT: ld1sw { z0.d }, p0/z, [x8]432; CHECK-NEXT: movprfx z1, z0433; CHECK-NEXT: mul z1.d, p0/m, z1.d, z0.d434; CHECK-NEXT: eor z0.d, z1.d, z0.d435; CHECK-NEXT: st1w { z0.d }, p0, [x8]436; CHECK-NEXT: ret437 %l3 = load <vscale x 2 x i32>, ptr %l0, align 16438 %s3 = sext <vscale x 2 x i32> %l3 to <vscale x 2 x i64>439 %l5 = mul <vscale x 2 x i64> %s3, %s3440 %l6 = xor <vscale x 2 x i64> %l5, %s3441 %t6 = trunc <vscale x 2 x i64> %l6 to <vscale x 2 x i32>442 store <vscale x 2 x i32> %t6, ptr %l0, align 16443 %l7 = tail call i64 @llvm.vscale.i64()444 %l8 = shl nuw nsw i64 %l7, 2445 %l9 = getelementptr inbounds i8, ptr %l0, i64 %l8446 %l11 = load <vscale x 2 x i32>, ptr %l9, align 16447 %s11 = sext <vscale x 2 x i32> %l11 to <vscale x 2 x i64>448 %l13 = mul <vscale x 2 x i64> %s11, %s11449 %l14 = xor <vscale x 2 x i64> %l13, %s11450 %t14 = trunc <vscale x 2 x i64> %l14 to <vscale x 2 x i32>451 store <vscale x 2 x i32> %t14, ptr %l9, align 16452 ret void453}454 455define void @triple_v16i8(ptr noalias nocapture noundef %l0) {456; CHECK-LABEL: triple_v16i8:457; CHECK: // %bb.0:458; CHECK-NEXT: ldr z0, [x0]459; CHECK-NEXT: ldr z1, [x0, #1, mul vl]460; CHECK-NEXT: ptrue p0.b461; CHECK-NEXT: ldr z2, [x0, #2, mul vl]462; CHECK-NEXT: movprfx z3, z0463; CHECK-NEXT: mul z3.b, p0/m, z3.b, z0.b464; CHECK-NEXT: movprfx z4, z1465; CHECK-NEXT: mul z4.b, p0/m, z4.b, z1.b466; CHECK-NEXT: movprfx z5, z2467; CHECK-NEXT: mul z5.b, p0/m, z5.b, z2.b468; CHECK-NEXT: eor z0.d, z3.d, z0.d469; CHECK-NEXT: eor z1.d, z4.d, z1.d470; CHECK-NEXT: eor z2.d, z5.d, z2.d471; CHECK-NEXT: str z0, [x0]472; CHECK-NEXT: str z1, [x0, #1, mul vl]473; CHECK-NEXT: str z2, [x0, #2, mul vl]474; CHECK-NEXT: ret475 %l3 = load <vscale x 16 x i8>, ptr %l0, align 16476 %l5 = mul <vscale x 16 x i8> %l3, %l3477 %l6 = xor <vscale x 16 x i8> %l5, %l3478 store <vscale x 16 x i8> %l6, ptr %l0, align 16479 %l7 = tail call i64 @llvm.vscale.i64()480 %l8 = shl nuw nsw i64 %l7, 4481 %l9 = getelementptr inbounds i8, ptr %l0, i64 %l8482 %l11 = load <vscale x 16 x i8>, ptr %l9, align 16483 %l13 = mul <vscale x 16 x i8> %l11, %l11484 %l14 = xor <vscale x 16 x i8> %l13, %l11485 store <vscale x 16 x i8> %l14, ptr %l9, align 16486 %m9 = getelementptr inbounds i8, ptr %l9, i64 %l8487 %m11 = load <vscale x 16 x i8>, ptr %m9, align 16488 %m13 = mul <vscale x 16 x i8> %m11, %m11489 %m14 = xor <vscale x 16 x i8> %m13, %m11490 store <vscale x 16 x i8> %m14, ptr %m9, align 16491 ret void492}493 494define void @negative_tripletooshort_v16i8(ptr noalias nocapture noundef %l0) {495; CHECK-LABEL: negative_tripletooshort_v16i8:496; CHECK: // %bb.0:497; CHECK-NEXT: ldr z0, [x0]498; CHECK-NEXT: ptrue p0.b499; CHECK-NEXT: cntw x8500; CHECK-NEXT: movprfx z1, z0501; CHECK-NEXT: mul z1.b, p0/m, z1.b, z0.b502; CHECK-NEXT: eor z0.d, z1.d, z0.d503; CHECK-NEXT: str z0, [x0]504; CHECK-NEXT: ld1b { z0.b }, p0/z, [x0, x8]505; CHECK-NEXT: movprfx z1, z0506; CHECK-NEXT: mul z1.b, p0/m, z1.b, z0.b507; CHECK-NEXT: eor z0.d, z1.d, z0.d508; CHECK-NEXT: st1b { z0.b }, p0, [x0, x8]509; CHECK-NEXT: cnth x8510; CHECK-NEXT: ld1b { z0.b }, p0/z, [x0, x8]511; CHECK-NEXT: movprfx z1, z0512; CHECK-NEXT: mul z1.b, p0/m, z1.b, z0.b513; CHECK-NEXT: eor z0.d, z1.d, z0.d514; CHECK-NEXT: st1b { z0.b }, p0, [x0, x8]515; CHECK-NEXT: ret516 %l3 = load <vscale x 16 x i8>, ptr %l0, align 16517 %l5 = mul <vscale x 16 x i8> %l3, %l3518 %l6 = xor <vscale x 16 x i8> %l5, %l3519 store <vscale x 16 x i8> %l6, ptr %l0, align 16520 %l7 = tail call i64 @llvm.vscale.i64()521 %l8 = shl nuw nsw i64 %l7, 2522 %l9 = getelementptr inbounds i8, ptr %l0, i64 %l8523 %l11 = load <vscale x 16 x i8>, ptr %l9, align 16524 %l13 = mul <vscale x 16 x i8> %l11, %l11525 %l14 = xor <vscale x 16 x i8> %l13, %l11526 store <vscale x 16 x i8> %l14, ptr %l9, align 16527 %m9 = getelementptr inbounds i8, ptr %l9, i64 %l8528 %m11 = load <vscale x 16 x i8>, ptr %m9, align 16529 %m13 = mul <vscale x 16 x i8> %m11, %m11530 %m14 = xor <vscale x 16 x i8> %m13, %m11531 store <vscale x 16 x i8> %m14, ptr %m9, align 16532 ret void533}534 535declare i64 @llvm.vscale.i64()536