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1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py2; RUN: llc < %s | FileCheck %s3 4target triple = "aarch64-unknown-linux-gnu"5 6; INCP7 8define i32 @cntp_add_all_active_nxv16i1(i32 %x, <vscale x 16 x i1> %pg) #0 {9; CHECK-LABEL: cntp_add_all_active_nxv16i1:10; CHECK: // %bb.0:11; CHECK-NEXT: // kill: def $w0 killed $w0 def $x012; CHECK-NEXT: incp x0, p0.b13; CHECK-NEXT: // kill: def $w0 killed $w0 killed $x014; CHECK-NEXT: ret15 %1 = tail call <vscale x 16 x i1> @llvm.aarch64.sve.ptrue.nxv16i1(i32 31)16 %2 = tail call i64 @llvm.aarch64.sve.cntp.nxv16i1(<vscale x 16 x i1> %1, <vscale x 16 x i1> %pg)17 %3 = trunc i64 %2 to i3218 %add = add i32 %3, %x19 ret i32 %add20}21 22define i32 @cntp_add_all_active_nxv8i1(i32 %x, <vscale x 8 x i1> %pg) #0 {23; CHECK-LABEL: cntp_add_all_active_nxv8i1:24; CHECK: // %bb.0:25; CHECK-NEXT: // kill: def $w0 killed $w0 def $x026; CHECK-NEXT: incp x0, p0.h27; CHECK-NEXT: // kill: def $w0 killed $w0 killed $x028; CHECK-NEXT: ret29 %1 = tail call <vscale x 8 x i1> @llvm.aarch64.sve.ptrue.nxv8i1(i32 31)30 %2 = tail call i64 @llvm.aarch64.sve.cntp.nxv8i1(<vscale x 8 x i1> %1, <vscale x 8 x i1> %pg)31 %3 = trunc i64 %2 to i3232 %add = add i32 %3, %x33 ret i32 %add34}35 36define i32 @cntp_add_all_active_nxv4i1(i32 %x, <vscale x 4 x i1> %pg) #0 {37; CHECK-LABEL: cntp_add_all_active_nxv4i1:38; CHECK: // %bb.0:39; CHECK-NEXT: // kill: def $w0 killed $w0 def $x040; CHECK-NEXT: incp x0, p0.s41; CHECK-NEXT: // kill: def $w0 killed $w0 killed $x042; CHECK-NEXT: ret43 %1 = tail call <vscale x 4 x i1> @llvm.aarch64.sve.ptrue.nxv4i1(i32 31)44 %2 = tail call i64 @llvm.aarch64.sve.cntp.nxv4i1(<vscale x 4 x i1> %1, <vscale x 4 x i1> %pg)45 %3 = trunc i64 %2 to i3246 %add = add i32 %3, %x47 ret i32 %add48}49 50define i32 @cntp_add_all_active_nxv2i1(i32 %x, <vscale x 2 x i1> %pg) #0 {51; CHECK-LABEL: cntp_add_all_active_nxv2i1:52; CHECK: // %bb.0:53; CHECK-NEXT: // kill: def $w0 killed $w0 def $x054; CHECK-NEXT: incp x0, p0.d55; CHECK-NEXT: // kill: def $w0 killed $w0 killed $x056; CHECK-NEXT: ret57 %1 = tail call <vscale x 2 x i1> @llvm.aarch64.sve.ptrue.nxv2i1(i32 31)58 %2 = tail call i64 @llvm.aarch64.sve.cntp.nxv2i1(<vscale x 2 x i1> %1, <vscale x 2 x i1> %pg)59 %3 = trunc i64 %2 to i3260 %add = add i32 %3, %x61 ret i32 %add62}63 64define i32 @cntp_add_all_active_nxv8i1_via_cast(i32 %x, <vscale x 8 x i1> %pg) #0 {65; CHECK-LABEL: cntp_add_all_active_nxv8i1_via_cast:66; CHECK: // %bb.0:67; CHECK-NEXT: // kill: def $w0 killed $w0 def $x068; CHECK-NEXT: incp x0, p0.h69; CHECK-NEXT: // kill: def $w0 killed $w0 killed $x070; CHECK-NEXT: ret71 %1 = tail call <vscale x 16 x i1> @llvm.aarch64.sve.ptrue.nxv16i1(i32 31)72 %2 = tail call <vscale x 8 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv8i1(<vscale x 16 x i1> %1)73 %3 = tail call i64 @llvm.aarch64.sve.cntp.nxv8i1(<vscale x 8 x i1> %2, <vscale x 8 x i1> %pg)74 %4 = trunc i64 %3 to i3275 %add = add i32 %4, %x76 ret i32 %add77}78 79define i64 @cntp_add_all_active_nxv2i1_multiuse(i32 %x, i64 %y, <vscale x 2 x i1> %pg) #0 {80; CHECK-LABEL: cntp_add_all_active_nxv2i1_multiuse:81; CHECK: // %bb.0:82; CHECK-NEXT: ptrue p1.d83; CHECK-NEXT: cntp x8, p1, p0.d84; CHECK-NEXT: add w9, w8, w085; CHECK-NEXT: madd x0, x8, x1, x986; CHECK-NEXT: ret87 %1 = tail call <vscale x 2 x i1> @llvm.aarch64.sve.ptrue.nxv2i1(i32 31)88 %2 = tail call i64 @llvm.aarch64.sve.cntp.nxv2i1(<vscale x 2 x i1> %1, <vscale x 2 x i1> %pg)89 %3 = trunc i64 %2 to i3290 %add = add i32 %3, %x91 %add.ext = zext i32 %add to i6492 %mul = mul i64 %2, %y93 %res = add i64 %add.ext, %mul94 ret i64 %res95}96 97define i32 @cntp_add_same_active_nxv16i1(i32 %x, <vscale x 16 x i1> %pg) #0 {98; CHECK-LABEL: cntp_add_same_active_nxv16i1:99; CHECK: // %bb.0:100; CHECK-NEXT: // kill: def $w0 killed $w0 def $x0101; CHECK-NEXT: incp x0, p0.b102; CHECK-NEXT: // kill: def $w0 killed $w0 killed $x0103; CHECK-NEXT: ret104 %1 = tail call i64 @llvm.aarch64.sve.cntp.nxv16i1(<vscale x 16 x i1> %pg, <vscale x 16 x i1> %pg)105 %2 = trunc i64 %1 to i32106 %add = add i32 %2, %x107 ret i32 %add108}109 110define i32 @cntp_add_same_active_nxv8i1(i32 %x, <vscale x 8 x i1> %pg) #0 {111; CHECK-LABEL: cntp_add_same_active_nxv8i1:112; CHECK: // %bb.0:113; CHECK-NEXT: // kill: def $w0 killed $w0 def $x0114; CHECK-NEXT: incp x0, p0.h115; CHECK-NEXT: // kill: def $w0 killed $w0 killed $x0116; CHECK-NEXT: ret117 %1 = tail call i64 @llvm.aarch64.sve.cntp.nxv8i1(<vscale x 8 x i1> %pg, <vscale x 8 x i1> %pg)118 %2 = trunc i64 %1 to i32119 %add = add i32 %2, %x120 ret i32 %add121}122 123define i32 @cntp_add_same_active_nxv4i1(i32 %x, <vscale x 4 x i1> %pg) #0 {124; CHECK-LABEL: cntp_add_same_active_nxv4i1:125; CHECK: // %bb.0:126; CHECK-NEXT: // kill: def $w0 killed $w0 def $x0127; CHECK-NEXT: incp x0, p0.s128; CHECK-NEXT: // kill: def $w0 killed $w0 killed $x0129; CHECK-NEXT: ret130 %1 = tail call i64 @llvm.aarch64.sve.cntp.nxv4i1(<vscale x 4 x i1> %pg, <vscale x 4 x i1> %pg)131 %2 = trunc i64 %1 to i32132 %add = add i32 %2, %x133 ret i32 %add134}135 136define i32 @cntp_add_same_active_nxv2i1(i32 %x, <vscale x 2 x i1> %pg) #0 {137; CHECK-LABEL: cntp_add_same_active_nxv2i1:138; CHECK: // %bb.0:139; CHECK-NEXT: // kill: def $w0 killed $w0 def $x0140; CHECK-NEXT: incp x0, p0.d141; CHECK-NEXT: // kill: def $w0 killed $w0 killed $x0142; CHECK-NEXT: ret143 %1 = tail call i64 @llvm.aarch64.sve.cntp.nxv2i1(<vscale x 2 x i1> %pg, <vscale x 2 x i1> %pg)144 %2 = trunc i64 %1 to i32145 %add = add i32 %2, %x146 ret i32 %add147}148 149define i64 @cntp_add_same_active_nxv2i1_multiuse(i32 %x, i64 %y, <vscale x 2 x i1> %pg) #0 {150; CHECK-LABEL: cntp_add_same_active_nxv2i1_multiuse:151; CHECK: // %bb.0:152; CHECK-NEXT: cntp x8, p0, p0.d153; CHECK-NEXT: add w9, w8, w0154; CHECK-NEXT: madd x0, x8, x1, x9155; CHECK-NEXT: ret156 %1 = tail call i64 @llvm.aarch64.sve.cntp.nxv2i1(<vscale x 2 x i1> %pg, <vscale x 2 x i1> %pg)157 %2 = trunc i64 %1 to i32158 %add = add i32 %2, %x159 %add.ext = zext i32 %add to i64160 %mul = mul i64 %1, %y161 %res = add i64 %add.ext, %mul162 ret i64 %res163}164 165; DECP166 167define i32 @cntp_sub_all_active_nxv16i1(i32 %x, <vscale x 16 x i1> %pg) #0 {168; CHECK-LABEL: cntp_sub_all_active_nxv16i1:169; CHECK: // %bb.0:170; CHECK-NEXT: // kill: def $w0 killed $w0 def $x0171; CHECK-NEXT: decp x0, p0.b172; CHECK-NEXT: // kill: def $w0 killed $w0 killed $x0173; CHECK-NEXT: ret174 %1 = tail call <vscale x 16 x i1> @llvm.aarch64.sve.ptrue.nxv16i1(i32 31)175 %2 = tail call i64 @llvm.aarch64.sve.cntp.nxv16i1(<vscale x 16 x i1> %1, <vscale x 16 x i1> %pg)176 %3 = trunc i64 %2 to i32177 %sub = sub i32 %x, %3178 ret i32 %sub179}180 181define i32 @cntp_sub_all_active_nxv8i1(i32 %x, <vscale x 8 x i1> %pg) #0 {182; CHECK-LABEL: cntp_sub_all_active_nxv8i1:183; CHECK: // %bb.0:184; CHECK-NEXT: // kill: def $w0 killed $w0 def $x0185; CHECK-NEXT: decp x0, p0.h186; CHECK-NEXT: // kill: def $w0 killed $w0 killed $x0187; CHECK-NEXT: ret188 %1 = tail call <vscale x 8 x i1> @llvm.aarch64.sve.ptrue.nxv8i1(i32 31)189 %2 = tail call i64 @llvm.aarch64.sve.cntp.nxv8i1(<vscale x 8 x i1> %1, <vscale x 8 x i1> %pg)190 %3 = trunc i64 %2 to i32191 %sub = sub i32 %x, %3192 ret i32 %sub193}194 195define i32 @cntp_sub_all_active_nxv4i1(i32 %x, <vscale x 4 x i1> %pg) #0 {196; CHECK-LABEL: cntp_sub_all_active_nxv4i1:197; CHECK: // %bb.0:198; CHECK-NEXT: // kill: def $w0 killed $w0 def $x0199; CHECK-NEXT: decp x0, p0.s200; CHECK-NEXT: // kill: def $w0 killed $w0 killed $x0201; CHECK-NEXT: ret202 %1 = tail call <vscale x 4 x i1> @llvm.aarch64.sve.ptrue.nxv4i1(i32 31)203 %2 = tail call i64 @llvm.aarch64.sve.cntp.nxv4i1(<vscale x 4 x i1> %1, <vscale x 4 x i1> %pg)204 %3 = trunc i64 %2 to i32205 %sub = sub i32 %x, %3206 ret i32 %sub207}208 209define i32 @cntp_sub_all_active_nxv2i1(i32 %x, <vscale x 2 x i1> %pg) #0 {210; CHECK-LABEL: cntp_sub_all_active_nxv2i1:211; CHECK: // %bb.0:212; CHECK-NEXT: // kill: def $w0 killed $w0 def $x0213; CHECK-NEXT: decp x0, p0.d214; CHECK-NEXT: // kill: def $w0 killed $w0 killed $x0215; CHECK-NEXT: ret216 %1 = tail call <vscale x 2 x i1> @llvm.aarch64.sve.ptrue.nxv2i1(i32 31)217 %2 = tail call i64 @llvm.aarch64.sve.cntp.nxv2i1(<vscale x 2 x i1> %1, <vscale x 2 x i1> %pg)218 %3 = trunc i64 %2 to i32219 %sub = sub i32 %x, %3220 ret i32 %sub221}222 223define i32 @cntp_sub_all_active_nxv8i1_via_cast(i32 %x, <vscale x 8 x i1> %pg) #0 {224; CHECK-LABEL: cntp_sub_all_active_nxv8i1_via_cast:225; CHECK: // %bb.0:226; CHECK-NEXT: // kill: def $w0 killed $w0 def $x0227; CHECK-NEXT: decp x0, p0.h228; CHECK-NEXT: // kill: def $w0 killed $w0 killed $x0229; CHECK-NEXT: ret230 %1 = tail call <vscale x 16 x i1> @llvm.aarch64.sve.ptrue.nxv16i1(i32 31)231 %2 = tail call <vscale x 8 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv8i1(<vscale x 16 x i1> %1)232 %3 = tail call i64 @llvm.aarch64.sve.cntp.nxv8i1(<vscale x 8 x i1> %2, <vscale x 8 x i1> %pg)233 %4 = trunc i64 %3 to i32234 %sub = sub i32 %x, %4235 ret i32 %sub236}237 238define i64 @cntp_sub_all_active_nxv2i1_multiuse(i32 %x, i64 %y, <vscale x 2 x i1> %pg) #0 {239; CHECK-LABEL: cntp_sub_all_active_nxv2i1_multiuse:240; CHECK: // %bb.0:241; CHECK-NEXT: ptrue p1.d242; CHECK-NEXT: cntp x8, p1, p0.d243; CHECK-NEXT: sub w9, w8, w0244; CHECK-NEXT: madd x0, x8, x1, x9245; CHECK-NEXT: ret246 %1 = tail call <vscale x 2 x i1> @llvm.aarch64.sve.ptrue.nxv2i1(i32 31)247 %2 = tail call i64 @llvm.aarch64.sve.cntp.nxv2i1(<vscale x 2 x i1> %1, <vscale x 2 x i1> %pg)248 %3 = trunc i64 %2 to i32249 %sub = sub i32 %3, %x250 %sub.ext = zext i32 %sub to i64251 %mul = mul i64 %2, %y252 %res = add i64 %sub.ext, %mul253 ret i64 %res254}255 256define i32 @cntp_sub_same_active_nxv16i1(i32 %x, <vscale x 16 x i1> %pg) #0 {257; CHECK-LABEL: cntp_sub_same_active_nxv16i1:258; CHECK: // %bb.0:259; CHECK-NEXT: // kill: def $w0 killed $w0 def $x0260; CHECK-NEXT: decp x0, p0.b261; CHECK-NEXT: // kill: def $w0 killed $w0 killed $x0262; CHECK-NEXT: ret263 %1 = tail call i64 @llvm.aarch64.sve.cntp.nxv16i1(<vscale x 16 x i1> %pg, <vscale x 16 x i1> %pg)264 %2 = trunc i64 %1 to i32265 %sub = sub i32 %x, %2266 ret i32 %sub267}268 269define i32 @cntp_sub_same_active_nxv8i1(i32 %x, <vscale x 8 x i1> %pg) #0 {270; CHECK-LABEL: cntp_sub_same_active_nxv8i1:271; CHECK: // %bb.0:272; CHECK-NEXT: // kill: def $w0 killed $w0 def $x0273; CHECK-NEXT: decp x0, p0.h274; CHECK-NEXT: // kill: def $w0 killed $w0 killed $x0275; CHECK-NEXT: ret276 %1 = tail call i64 @llvm.aarch64.sve.cntp.nxv8i1(<vscale x 8 x i1> %pg, <vscale x 8 x i1> %pg)277 %2 = trunc i64 %1 to i32278 %sub = sub i32 %x, %2279 ret i32 %sub280}281 282define i32 @cntp_sub_same_active_nxv4i1(i32 %x, <vscale x 4 x i1> %pg) #0 {283; CHECK-LABEL: cntp_sub_same_active_nxv4i1:284; CHECK: // %bb.0:285; CHECK-NEXT: // kill: def $w0 killed $w0 def $x0286; CHECK-NEXT: decp x0, p0.s287; CHECK-NEXT: // kill: def $w0 killed $w0 killed $x0288; CHECK-NEXT: ret289 %1 = tail call i64 @llvm.aarch64.sve.cntp.nxv4i1(<vscale x 4 x i1> %pg, <vscale x 4 x i1> %pg)290 %2 = trunc i64 %1 to i32291 %sub = sub i32 %x, %2292 ret i32 %sub293}294 295define i32 @cntp_sub_same_active_nxv2i1(i32 %x, <vscale x 2 x i1> %pg) #0 {296; CHECK-LABEL: cntp_sub_same_active_nxv2i1:297; CHECK: // %bb.0:298; CHECK-NEXT: // kill: def $w0 killed $w0 def $x0299; CHECK-NEXT: decp x0, p0.d300; CHECK-NEXT: // kill: def $w0 killed $w0 killed $x0301; CHECK-NEXT: ret302 %1 = tail call i64 @llvm.aarch64.sve.cntp.nxv2i1(<vscale x 2 x i1> %pg, <vscale x 2 x i1> %pg)303 %2 = trunc i64 %1 to i32304 %sub = sub i32 %x, %2305 ret i32 %sub306}307 308define i64 @cntp_sub_same_active_nxv2i1_multiuse(i32 %x, i64 %y, <vscale x 2 x i1> %pg) #0 {309; CHECK-LABEL: cntp_sub_same_active_nxv2i1_multiuse:310; CHECK: // %bb.0:311; CHECK-NEXT: cntp x8, p0, p0.d312; CHECK-NEXT: sub w9, w8, w0313; CHECK-NEXT: madd x0, x8, x1, x9314; CHECK-NEXT: ret315 %1 = tail call i64 @llvm.aarch64.sve.cntp.nxv2i1(<vscale x 2 x i1> %pg, <vscale x 2 x i1> %pg)316 %2 = trunc i64 %1 to i32317 %sub = sub i32 %2, %x318 %sub.ext = zext i32 %sub to i64319 %mul = mul i64 %1, %y320 %res = add i64 %sub.ext, %mul321 ret i64 %res322}323 324declare <vscale x 8 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv8i1(<vscale x 16 x i1>)325declare <vscale x 4 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv4i1(<vscale x 16 x i1>)326declare <vscale x 2 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv2i1(<vscale x 16 x i1>)327 328declare <vscale x 16 x i1> @llvm.aarch64.sve.ptrue.nxv16i1(i32)329declare <vscale x 8 x i1> @llvm.aarch64.sve.ptrue.nxv8i1(i32)330declare <vscale x 4 x i1> @llvm.aarch64.sve.ptrue.nxv4i1(i32)331declare <vscale x 2 x i1> @llvm.aarch64.sve.ptrue.nxv2i1(i32)332 333declare i64 @llvm.aarch64.sve.cntp.nxv16i1(<vscale x 16 x i1>, <vscale x 16 x i1>)334declare i64 @llvm.aarch64.sve.cntp.nxv8i1(<vscale x 8 x i1>, <vscale x 8 x i1>)335declare i64 @llvm.aarch64.sve.cntp.nxv4i1(<vscale x 4 x i1>, <vscale x 4 x i1>)336declare i64 @llvm.aarch64.sve.cntp.nxv2i1(<vscale x 2 x i1>, <vscale x 2 x i1>)337 338attributes #0 = { "target-features"="+sve" }339