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1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py2; RUN: llc -aarch64-sve-vector-bits-min=256 < %s | FileCheck %s -check-prefixes=CHECK,VBITS_GE_2563; RUN: llc -aarch64-sve-vector-bits-min=512 < %s | FileCheck %s -check-prefixes=CHECK,VBITS_GE_5124; RUN: llc -aarch64-sve-vector-bits-min=2048 < %s | FileCheck %s -check-prefixes=CHECK,VBITS_GE_5125 6target triple = "aarch64-unknown-linux-gnu"7 8;9; DUP (integer)10;11 12; Don't use SVE for 64-bit vectors.13define <8 x i8> @splat_v8i8(i8 %a) vscale_range(2,0) #0 {14; CHECK-LABEL: splat_v8i8:15; CHECK: // %bb.0:16; CHECK-NEXT: dup v0.8b, w017; CHECK-NEXT: ret18 %insert = insertelement <8 x i8> poison, i8 %a, i64 019 %splat = shufflevector <8 x i8> %insert, <8 x i8> poison, <8 x i32> zeroinitializer20 ret <8 x i8> %splat21}22 23; Don't use SVE for 128-bit vectors.24define <16 x i8> @splat_v16i8(i8 %a) vscale_range(2,0) #0 {25; CHECK-LABEL: splat_v16i8:26; CHECK: // %bb.0:27; CHECK-NEXT: dup v0.16b, w028; CHECK-NEXT: ret29 %insert = insertelement <16 x i8> poison, i8 %a, i64 030 %splat = shufflevector <16 x i8> %insert, <16 x i8> poison, <16 x i32> zeroinitializer31 ret <16 x i8> %splat32}33 34define void @splat_v32i8(i8 %a, ptr %b) vscale_range(2,0) #0 {35; CHECK-LABEL: splat_v32i8:36; CHECK: // %bb.0:37; CHECK-NEXT: mov z0.b, w038; CHECK-NEXT: ptrue p0.b, vl3239; CHECK-NEXT: st1b { z0.b }, p0, [x1]40; CHECK-NEXT: ret41 %insert = insertelement <32 x i8> poison, i8 %a, i64 042 %splat = shufflevector <32 x i8> %insert, <32 x i8> poison, <32 x i32> zeroinitializer43 store <32 x i8> %splat, ptr %b44 ret void45}46 47define void @splat_v64i8(i8 %a, ptr %b) #0 {48; VBITS_GE_256-LABEL: splat_v64i8:49; VBITS_GE_256: // %bb.0:50; VBITS_GE_256-NEXT: mov z0.b, w051; VBITS_GE_256-NEXT: ptrue p0.b, vl3252; VBITS_GE_256-NEXT: mov w8, #32 // =0x2053; VBITS_GE_256-NEXT: st1b { z0.b }, p0, [x1, x8]54; VBITS_GE_256-NEXT: st1b { z0.b }, p0, [x1]55; VBITS_GE_256-NEXT: ret56;57; VBITS_GE_512-LABEL: splat_v64i8:58; VBITS_GE_512: // %bb.0:59; VBITS_GE_512-NEXT: mov z0.b, w060; VBITS_GE_512-NEXT: ptrue p0.b, vl6461; VBITS_GE_512-NEXT: st1b { z0.b }, p0, [x1]62; VBITS_GE_512-NEXT: ret63 %insert = insertelement <64 x i8> poison, i8 %a, i64 064 %splat = shufflevector <64 x i8> %insert, <64 x i8> poison, <64 x i32> zeroinitializer65 store <64 x i8> %splat, ptr %b66 ret void67}68 69define void @splat_v128i8(i8 %a, ptr %b) vscale_range(8,0) #0 {70; CHECK-LABEL: splat_v128i8:71; CHECK: // %bb.0:72; CHECK-NEXT: mov z0.b, w073; CHECK-NEXT: ptrue p0.b, vl12874; CHECK-NEXT: st1b { z0.b }, p0, [x1]75; CHECK-NEXT: ret76 %insert = insertelement <128 x i8> poison, i8 %a, i64 077 %splat = shufflevector <128 x i8> %insert, <128 x i8> poison, <128 x i32> zeroinitializer78 store <128 x i8> %splat, ptr %b79 ret void80}81 82define void @splat_v256i8(i8 %a, ptr %b) vscale_range(16,0) #0 {83; CHECK-LABEL: splat_v256i8:84; CHECK: // %bb.0:85; CHECK-NEXT: mov z0.b, w086; CHECK-NEXT: ptrue p0.b, vl25687; CHECK-NEXT: st1b { z0.b }, p0, [x1]88; CHECK-NEXT: ret89 %insert = insertelement <256 x i8> poison, i8 %a, i64 090 %splat = shufflevector <256 x i8> %insert, <256 x i8> poison, <256 x i32> zeroinitializer91 store <256 x i8> %splat, ptr %b92 ret void93}94 95; Don't use SVE for 64-bit vectors.96define <4 x i16> @splat_v4i16(i16 %a) vscale_range(2,0) #0 {97; CHECK-LABEL: splat_v4i16:98; CHECK: // %bb.0:99; CHECK-NEXT: dup v0.4h, w0100; CHECK-NEXT: ret101 %insert = insertelement <4 x i16> poison, i16 %a, i64 0102 %splat = shufflevector <4 x i16> %insert, <4 x i16> poison, <4 x i32> zeroinitializer103 ret <4 x i16> %splat104}105 106; Don't use SVE for 128-bit vectors.107define <8 x i16> @splat_v8i16(i16 %a) vscale_range(2,0) #0 {108; CHECK-LABEL: splat_v8i16:109; CHECK: // %bb.0:110; CHECK-NEXT: dup v0.8h, w0111; CHECK-NEXT: ret112 %insert = insertelement <8 x i16> poison, i16 %a, i64 0113 %splat = shufflevector <8 x i16> %insert, <8 x i16> poison, <8 x i32> zeroinitializer114 ret <8 x i16> %splat115}116 117define void @splat_v16i16(i16 %a, ptr %b) vscale_range(2,0) #0 {118; CHECK-LABEL: splat_v16i16:119; CHECK: // %bb.0:120; CHECK-NEXT: mov z0.h, w0121; CHECK-NEXT: ptrue p0.h, vl16122; CHECK-NEXT: st1h { z0.h }, p0, [x1]123; CHECK-NEXT: ret124 %insert = insertelement <16 x i16> poison, i16 %a, i64 0125 %splat = shufflevector <16 x i16> %insert, <16 x i16> poison, <16 x i32> zeroinitializer126 store <16 x i16> %splat, ptr %b127 ret void128}129 130define void @splat_v32i16(i16 %a, ptr %b) #0 {131; VBITS_GE_256-LABEL: splat_v32i16:132; VBITS_GE_256: // %bb.0:133; VBITS_GE_256-NEXT: mov z0.h, w0134; VBITS_GE_256-NEXT: ptrue p0.h, vl16135; VBITS_GE_256-NEXT: mov x8, #16 // =0x10136; VBITS_GE_256-NEXT: st1h { z0.h }, p0, [x1, x8, lsl #1]137; VBITS_GE_256-NEXT: st1h { z0.h }, p0, [x1]138; VBITS_GE_256-NEXT: ret139;140; VBITS_GE_512-LABEL: splat_v32i16:141; VBITS_GE_512: // %bb.0:142; VBITS_GE_512-NEXT: mov z0.h, w0143; VBITS_GE_512-NEXT: ptrue p0.h, vl32144; VBITS_GE_512-NEXT: st1h { z0.h }, p0, [x1]145; VBITS_GE_512-NEXT: ret146 %insert = insertelement <32 x i16> poison, i16 %a, i64 0147 %splat = shufflevector <32 x i16> %insert, <32 x i16> poison, <32 x i32> zeroinitializer148 store <32 x i16> %splat, ptr %b149 ret void150}151 152define void @splat_v64i16(i16 %a, ptr %b) vscale_range(8,0) #0 {153; CHECK-LABEL: splat_v64i16:154; CHECK: // %bb.0:155; CHECK-NEXT: mov z0.h, w0156; CHECK-NEXT: ptrue p0.h, vl64157; CHECK-NEXT: st1h { z0.h }, p0, [x1]158; CHECK-NEXT: ret159 %insert = insertelement <64 x i16> poison, i16 %a, i64 0160 %splat = shufflevector <64 x i16> %insert, <64 x i16> poison, <64 x i32> zeroinitializer161 store <64 x i16> %splat, ptr %b162 ret void163}164 165define void @splat_v128i16(i16 %a, ptr %b) vscale_range(16,0) #0 {166; CHECK-LABEL: splat_v128i16:167; CHECK: // %bb.0:168; CHECK-NEXT: mov z0.h, w0169; CHECK-NEXT: ptrue p0.h, vl128170; CHECK-NEXT: st1h { z0.h }, p0, [x1]171; CHECK-NEXT: ret172 %insert = insertelement <128 x i16> poison, i16 %a, i64 0173 %splat = shufflevector <128 x i16> %insert, <128 x i16> poison, <128 x i32> zeroinitializer174 store <128 x i16> %splat, ptr %b175 ret void176}177 178; Don't use SVE for 64-bit vectors.179define <2 x i32> @splat_v2i32(i32 %a) vscale_range(2,0) #0 {180; CHECK-LABEL: splat_v2i32:181; CHECK: // %bb.0:182; CHECK-NEXT: dup v0.2s, w0183; CHECK-NEXT: ret184 %insert = insertelement <2 x i32> poison, i32 %a, i64 0185 %splat = shufflevector <2 x i32> %insert, <2 x i32> poison, <2 x i32> zeroinitializer186 ret <2 x i32> %splat187}188 189; Don't use SVE for 128-bit vectors.190define <4 x i32> @splat_v4i32(i32 %a) vscale_range(2,0) #0 {191; CHECK-LABEL: splat_v4i32:192; CHECK: // %bb.0:193; CHECK-NEXT: dup v0.4s, w0194; CHECK-NEXT: ret195 %insert = insertelement <4 x i32> poison, i32 %a, i64 0196 %splat = shufflevector <4 x i32> %insert, <4 x i32> poison, <4 x i32> zeroinitializer197 ret <4 x i32> %splat198}199 200define void @splat_v8i32(i32 %a, ptr %b) vscale_range(2,0) #0 {201; CHECK-LABEL: splat_v8i32:202; CHECK: // %bb.0:203; CHECK-NEXT: mov z0.s, w0204; CHECK-NEXT: ptrue p0.s, vl8205; CHECK-NEXT: st1w { z0.s }, p0, [x1]206; CHECK-NEXT: ret207 %insert = insertelement <8 x i32> poison, i32 %a, i64 0208 %splat = shufflevector <8 x i32> %insert, <8 x i32> poison, <8 x i32> zeroinitializer209 store <8 x i32> %splat, ptr %b210 ret void211}212 213define void @splat_v16i32(i32 %a, ptr %b) #0 {214; VBITS_GE_256-LABEL: splat_v16i32:215; VBITS_GE_256: // %bb.0:216; VBITS_GE_256-NEXT: mov z0.s, w0217; VBITS_GE_256-NEXT: ptrue p0.s, vl8218; VBITS_GE_256-NEXT: mov x8, #8 // =0x8219; VBITS_GE_256-NEXT: st1w { z0.s }, p0, [x1, x8, lsl #2]220; VBITS_GE_256-NEXT: st1w { z0.s }, p0, [x1]221; VBITS_GE_256-NEXT: ret222;223; VBITS_GE_512-LABEL: splat_v16i32:224; VBITS_GE_512: // %bb.0:225; VBITS_GE_512-NEXT: mov z0.s, w0226; VBITS_GE_512-NEXT: ptrue p0.s, vl16227; VBITS_GE_512-NEXT: st1w { z0.s }, p0, [x1]228; VBITS_GE_512-NEXT: ret229 %insert = insertelement <16 x i32> poison, i32 %a, i64 0230 %splat = shufflevector <16 x i32> %insert, <16 x i32> poison, <16 x i32> zeroinitializer231 store <16 x i32> %splat, ptr %b232 ret void233}234 235define void @splat_v32i32(i32 %a, ptr %b) vscale_range(8,0) #0 {236; CHECK-LABEL: splat_v32i32:237; CHECK: // %bb.0:238; CHECK-NEXT: mov z0.s, w0239; CHECK-NEXT: ptrue p0.s, vl32240; CHECK-NEXT: st1w { z0.s }, p0, [x1]241; CHECK-NEXT: ret242 %insert = insertelement <32 x i32> poison, i32 %a, i64 0243 %splat = shufflevector <32 x i32> %insert, <32 x i32> poison, <32 x i32> zeroinitializer244 store <32 x i32> %splat, ptr %b245 ret void246}247 248define void @splat_v64i32(i32 %a, ptr %b) vscale_range(16,0) #0 {249; CHECK-LABEL: splat_v64i32:250; CHECK: // %bb.0:251; CHECK-NEXT: mov z0.s, w0252; CHECK-NEXT: ptrue p0.s, vl64253; CHECK-NEXT: st1w { z0.s }, p0, [x1]254; CHECK-NEXT: ret255 %insert = insertelement <64 x i32> poison, i32 %a, i64 0256 %splat = shufflevector <64 x i32> %insert, <64 x i32> poison, <64 x i32> zeroinitializer257 store <64 x i32> %splat, ptr %b258 ret void259}260 261; Don't use SVE for 64-bit vectors.262define <1 x i64> @splat_v1i64(i64 %a) vscale_range(2,0) #0 {263; CHECK-LABEL: splat_v1i64:264; CHECK: // %bb.0:265; CHECK-NEXT: fmov d0, x0266; CHECK-NEXT: ret267 %insert = insertelement <1 x i64> poison, i64 %a, i64 0268 %splat = shufflevector <1 x i64> %insert, <1 x i64> poison, <1 x i32> zeroinitializer269 ret <1 x i64> %splat270}271 272; Don't use SVE for 128-bit vectors.273define <2 x i64> @splat_v2i64(i64 %a) vscale_range(2,0) #0 {274; CHECK-LABEL: splat_v2i64:275; CHECK: // %bb.0:276; CHECK-NEXT: dup v0.2d, x0277; CHECK-NEXT: ret278 %insert = insertelement <2 x i64> poison, i64 %a, i64 0279 %splat = shufflevector <2 x i64> %insert, <2 x i64> poison, <2 x i32> zeroinitializer280 ret <2 x i64> %splat281}282 283define void @splat_v4i64(i64 %a, ptr %b) vscale_range(2,0) #0 {284; CHECK-LABEL: splat_v4i64:285; CHECK: // %bb.0:286; CHECK-NEXT: mov z0.d, x0287; CHECK-NEXT: ptrue p0.d, vl4288; CHECK-NEXT: st1d { z0.d }, p0, [x1]289; CHECK-NEXT: ret290 %insert = insertelement <4 x i64> poison, i64 %a, i64 0291 %splat = shufflevector <4 x i64> %insert, <4 x i64> poison, <4 x i32> zeroinitializer292 store <4 x i64> %splat, ptr %b293 ret void294}295 296define void @splat_v8i64(i64 %a, ptr %b) #0 {297; VBITS_GE_256-LABEL: splat_v8i64:298; VBITS_GE_256: // %bb.0:299; VBITS_GE_256-NEXT: mov z0.d, x0300; VBITS_GE_256-NEXT: ptrue p0.d, vl4301; VBITS_GE_256-NEXT: mov x8, #4 // =0x4302; VBITS_GE_256-NEXT: st1d { z0.d }, p0, [x1, x8, lsl #3]303; VBITS_GE_256-NEXT: st1d { z0.d }, p0, [x1]304; VBITS_GE_256-NEXT: ret305;306; VBITS_GE_512-LABEL: splat_v8i64:307; VBITS_GE_512: // %bb.0:308; VBITS_GE_512-NEXT: mov z0.d, x0309; VBITS_GE_512-NEXT: ptrue p0.d, vl8310; VBITS_GE_512-NEXT: st1d { z0.d }, p0, [x1]311; VBITS_GE_512-NEXT: ret312 %insert = insertelement <8 x i64> poison, i64 %a, i64 0313 %splat = shufflevector <8 x i64> %insert, <8 x i64> poison, <8 x i32> zeroinitializer314 store <8 x i64> %splat, ptr %b315 ret void316}317 318define void @splat_v16i64(i64 %a, ptr %b) vscale_range(8,0) #0 {319; CHECK-LABEL: splat_v16i64:320; CHECK: // %bb.0:321; CHECK-NEXT: mov z0.d, x0322; CHECK-NEXT: ptrue p0.d, vl16323; CHECK-NEXT: st1d { z0.d }, p0, [x1]324; CHECK-NEXT: ret325 %insert = insertelement <16 x i64> poison, i64 %a, i64 0326 %splat = shufflevector <16 x i64> %insert, <16 x i64> poison, <16 x i32> zeroinitializer327 store <16 x i64> %splat, ptr %b328 ret void329}330 331define void @splat_v32i64(i64 %a, ptr %b) vscale_range(16,0) #0 {332; CHECK-LABEL: splat_v32i64:333; CHECK: // %bb.0:334; CHECK-NEXT: mov z0.d, x0335; CHECK-NEXT: ptrue p0.d, vl32336; CHECK-NEXT: st1d { z0.d }, p0, [x1]337; CHECK-NEXT: ret338 %insert = insertelement <32 x i64> poison, i64 %a, i64 0339 %splat = shufflevector <32 x i64> %insert, <32 x i64> poison, <32 x i32> zeroinitializer340 store <32 x i64> %splat, ptr %b341 ret void342}343 344;345; DUP (floating-point)346;347 348; Don't use SVE for 64-bit vectors.349define <4 x half> @splat_v4f16(half %a) vscale_range(2,0) #0 {350; CHECK-LABEL: splat_v4f16:351; CHECK: // %bb.0:352; CHECK-NEXT: // kill: def $h0 killed $h0 def $q0353; CHECK-NEXT: dup v0.4h, v0.h[0]354; CHECK-NEXT: ret355 %insert = insertelement <4 x half> poison, half %a, i64 0356 %splat = shufflevector <4 x half> %insert, <4 x half> poison, <4 x i32> zeroinitializer357 ret <4 x half> %splat358}359 360; Don't use SVE for 128-bit vectors.361define <8 x half> @splat_v8f16(half %a) vscale_range(2,0) #0 {362; CHECK-LABEL: splat_v8f16:363; CHECK: // %bb.0:364; CHECK-NEXT: // kill: def $h0 killed $h0 def $q0365; CHECK-NEXT: dup v0.8h, v0.h[0]366; CHECK-NEXT: ret367 %insert = insertelement <8 x half> poison, half %a, i64 0368 %splat = shufflevector <8 x half> %insert, <8 x half> poison, <8 x i32> zeroinitializer369 ret <8 x half> %splat370}371 372define void @splat_v16f16(half %a, ptr %b) vscale_range(2,0) #0 {373; CHECK-LABEL: splat_v16f16:374; CHECK: // %bb.0:375; CHECK-NEXT: // kill: def $h0 killed $h0 def $z0376; CHECK-NEXT: ptrue p0.h, vl16377; CHECK-NEXT: mov z0.h, h0378; CHECK-NEXT: st1h { z0.h }, p0, [x0]379; CHECK-NEXT: ret380 %insert = insertelement <16 x half> poison, half %a, i64 0381 %splat = shufflevector <16 x half> %insert, <16 x half> poison, <16 x i32> zeroinitializer382 store <16 x half> %splat, ptr %b383 ret void384}385 386define void @splat_v32f16(half %a, ptr %b) #0 {387; VBITS_GE_256-LABEL: splat_v32f16:388; VBITS_GE_256: // %bb.0:389; VBITS_GE_256-NEXT: // kill: def $h0 killed $h0 def $z0390; VBITS_GE_256-NEXT: ptrue p0.h, vl16391; VBITS_GE_256-NEXT: mov x8, #16 // =0x10392; VBITS_GE_256-NEXT: mov z0.h, h0393; VBITS_GE_256-NEXT: st1h { z0.h }, p0, [x0, x8, lsl #1]394; VBITS_GE_256-NEXT: st1h { z0.h }, p0, [x0]395; VBITS_GE_256-NEXT: ret396;397; VBITS_GE_512-LABEL: splat_v32f16:398; VBITS_GE_512: // %bb.0:399; VBITS_GE_512-NEXT: // kill: def $h0 killed $h0 def $z0400; VBITS_GE_512-NEXT: ptrue p0.h, vl32401; VBITS_GE_512-NEXT: mov z0.h, h0402; VBITS_GE_512-NEXT: st1h { z0.h }, p0, [x0]403; VBITS_GE_512-NEXT: ret404 %insert = insertelement <32 x half> poison, half %a, i64 0405 %splat = shufflevector <32 x half> %insert, <32 x half> poison, <32 x i32> zeroinitializer406 store <32 x half> %splat, ptr %b407 ret void408}409 410define void @splat_v64f16(half %a, ptr %b) vscale_range(8,0) #0 {411; CHECK-LABEL: splat_v64f16:412; CHECK: // %bb.0:413; CHECK-NEXT: // kill: def $h0 killed $h0 def $z0414; CHECK-NEXT: ptrue p0.h, vl64415; CHECK-NEXT: mov z0.h, h0416; CHECK-NEXT: st1h { z0.h }, p0, [x0]417; CHECK-NEXT: ret418 %insert = insertelement <64 x half> poison, half %a, i64 0419 %splat = shufflevector <64 x half> %insert, <64 x half> poison, <64 x i32> zeroinitializer420 store <64 x half> %splat, ptr %b421 ret void422}423 424define void @splat_v128f16(half %a, ptr %b) vscale_range(16,0) #0 {425; CHECK-LABEL: splat_v128f16:426; CHECK: // %bb.0:427; CHECK-NEXT: // kill: def $h0 killed $h0 def $z0428; CHECK-NEXT: ptrue p0.h, vl128429; CHECK-NEXT: mov z0.h, h0430; CHECK-NEXT: st1h { z0.h }, p0, [x0]431; CHECK-NEXT: ret432 %insert = insertelement <128 x half> poison, half %a, i64 0433 %splat = shufflevector <128 x half> %insert, <128 x half> poison, <128 x i32> zeroinitializer434 store <128 x half> %splat, ptr %b435 ret void436}437 438; Don't use SVE for 64-bit vectors.439define <2 x float> @splat_v2f32(float %a, <2 x float> %op2) vscale_range(2,0) #0 {440; CHECK-LABEL: splat_v2f32:441; CHECK: // %bb.0:442; CHECK-NEXT: // kill: def $s0 killed $s0 def $q0443; CHECK-NEXT: dup v0.2s, v0.s[0]444; CHECK-NEXT: ret445 %insert = insertelement <2 x float> poison, float %a, i64 0446 %splat = shufflevector <2 x float> %insert, <2 x float> poison, <2 x i32> zeroinitializer447 ret <2 x float> %splat448}449 450; Don't use SVE for 128-bit vectors.451define <4 x float> @splat_v4f32(float %a, <4 x float> %op2) vscale_range(2,0) #0 {452; CHECK-LABEL: splat_v4f32:453; CHECK: // %bb.0:454; CHECK-NEXT: // kill: def $s0 killed $s0 def $q0455; CHECK-NEXT: dup v0.4s, v0.s[0]456; CHECK-NEXT: ret457 %insert = insertelement <4 x float> poison, float %a, i64 0458 %splat = shufflevector <4 x float> %insert, <4 x float> poison, <4 x i32> zeroinitializer459 ret <4 x float> %splat460}461 462define void @splat_v8f32(float %a, ptr %b) vscale_range(2,0) #0 {463; CHECK-LABEL: splat_v8f32:464; CHECK: // %bb.0:465; CHECK-NEXT: // kill: def $s0 killed $s0 def $z0466; CHECK-NEXT: ptrue p0.s, vl8467; CHECK-NEXT: mov z0.s, s0468; CHECK-NEXT: st1w { z0.s }, p0, [x0]469; CHECK-NEXT: ret470 %insert = insertelement <8 x float> poison, float %a, i64 0471 %splat = shufflevector <8 x float> %insert, <8 x float> poison, <8 x i32> zeroinitializer472 store <8 x float> %splat, ptr %b473 ret void474}475 476define void @splat_v16f32(float %a, ptr %b) #0 {477; VBITS_GE_256-LABEL: splat_v16f32:478; VBITS_GE_256: // %bb.0:479; VBITS_GE_256-NEXT: // kill: def $s0 killed $s0 def $z0480; VBITS_GE_256-NEXT: ptrue p0.s, vl8481; VBITS_GE_256-NEXT: mov x8, #8 // =0x8482; VBITS_GE_256-NEXT: mov z0.s, s0483; VBITS_GE_256-NEXT: st1w { z0.s }, p0, [x0, x8, lsl #2]484; VBITS_GE_256-NEXT: st1w { z0.s }, p0, [x0]485; VBITS_GE_256-NEXT: ret486;487; VBITS_GE_512-LABEL: splat_v16f32:488; VBITS_GE_512: // %bb.0:489; VBITS_GE_512-NEXT: // kill: def $s0 killed $s0 def $z0490; VBITS_GE_512-NEXT: ptrue p0.s, vl16491; VBITS_GE_512-NEXT: mov z0.s, s0492; VBITS_GE_512-NEXT: st1w { z0.s }, p0, [x0]493; VBITS_GE_512-NEXT: ret494 %insert = insertelement <16 x float> poison, float %a, i64 0495 %splat = shufflevector <16 x float> %insert, <16 x float> poison, <16 x i32> zeroinitializer496 store <16 x float> %splat, ptr %b497 ret void498}499 500define void @splat_v32f32(float %a, ptr %b) vscale_range(8,0) #0 {501; CHECK-LABEL: splat_v32f32:502; CHECK: // %bb.0:503; CHECK-NEXT: // kill: def $s0 killed $s0 def $z0504; CHECK-NEXT: ptrue p0.s, vl32505; CHECK-NEXT: mov z0.s, s0506; CHECK-NEXT: st1w { z0.s }, p0, [x0]507; CHECK-NEXT: ret508 %insert = insertelement <32 x float> poison, float %a, i64 0509 %splat = shufflevector <32 x float> %insert, <32 x float> poison, <32 x i32> zeroinitializer510 store <32 x float> %splat, ptr %b511 ret void512}513 514define void @splat_v64f32(float %a, ptr %b) vscale_range(16,0) #0 {515; CHECK-LABEL: splat_v64f32:516; CHECK: // %bb.0:517; CHECK-NEXT: // kill: def $s0 killed $s0 def $z0518; CHECK-NEXT: ptrue p0.s, vl64519; CHECK-NEXT: mov z0.s, s0520; CHECK-NEXT: st1w { z0.s }, p0, [x0]521; CHECK-NEXT: ret522 %insert = insertelement <64 x float> poison, float %a, i64 0523 %splat = shufflevector <64 x float> %insert, <64 x float> poison, <64 x i32> zeroinitializer524 store <64 x float> %splat, ptr %b525 ret void526}527 528; Don't use SVE for 64-bit vectors.529define <1 x double> @splat_v1f64(double %a, <1 x double> %op2) vscale_range(2,0) #0 {530; CHECK-LABEL: splat_v1f64:531; CHECK: // %bb.0:532; CHECK-NEXT: ret533 %insert = insertelement <1 x double> poison, double %a, i64 0534 %splat = shufflevector <1 x double> %insert, <1 x double> poison, <1 x i32> zeroinitializer535 ret <1 x double> %splat536}537 538; Don't use SVE for 128-bit vectors.539define <2 x double> @splat_v2f64(double %a, <2 x double> %op2) vscale_range(2,0) #0 {540; CHECK-LABEL: splat_v2f64:541; CHECK: // %bb.0:542; CHECK-NEXT: // kill: def $d0 killed $d0 def $q0543; CHECK-NEXT: dup v0.2d, v0.d[0]544; CHECK-NEXT: ret545 %insert = insertelement <2 x double> poison, double %a, i64 0546 %splat = shufflevector <2 x double> %insert, <2 x double> poison, <2 x i32> zeroinitializer547 ret <2 x double> %splat548}549 550define void @splat_v4f64(double %a, ptr %b) vscale_range(2,0) #0 {551; CHECK-LABEL: splat_v4f64:552; CHECK: // %bb.0:553; CHECK-NEXT: // kill: def $d0 killed $d0 def $z0554; CHECK-NEXT: ptrue p0.d, vl4555; CHECK-NEXT: mov z0.d, d0556; CHECK-NEXT: st1d { z0.d }, p0, [x0]557; CHECK-NEXT: ret558 %insert = insertelement <4 x double> poison, double %a, i64 0559 %splat = shufflevector <4 x double> %insert, <4 x double> poison, <4 x i32> zeroinitializer560 store <4 x double> %splat, ptr %b561 ret void562}563 564define void @splat_v8f64(double %a, ptr %b) #0 {565; VBITS_GE_256-LABEL: splat_v8f64:566; VBITS_GE_256: // %bb.0:567; VBITS_GE_256-NEXT: // kill: def $d0 killed $d0 def $z0568; VBITS_GE_256-NEXT: ptrue p0.d, vl4569; VBITS_GE_256-NEXT: mov x8, #4 // =0x4570; VBITS_GE_256-NEXT: mov z0.d, d0571; VBITS_GE_256-NEXT: st1d { z0.d }, p0, [x0, x8, lsl #3]572; VBITS_GE_256-NEXT: st1d { z0.d }, p0, [x0]573; VBITS_GE_256-NEXT: ret574;575; VBITS_GE_512-LABEL: splat_v8f64:576; VBITS_GE_512: // %bb.0:577; VBITS_GE_512-NEXT: // kill: def $d0 killed $d0 def $z0578; VBITS_GE_512-NEXT: ptrue p0.d, vl8579; VBITS_GE_512-NEXT: mov z0.d, d0580; VBITS_GE_512-NEXT: st1d { z0.d }, p0, [x0]581; VBITS_GE_512-NEXT: ret582 %insert = insertelement <8 x double> poison, double %a, i64 0583 %splat = shufflevector <8 x double> %insert, <8 x double> poison, <8 x i32> zeroinitializer584 store <8 x double> %splat, ptr %b585 ret void586}587 588define void @splat_v16f64(double %a, ptr %b) vscale_range(8,0) #0 {589; CHECK-LABEL: splat_v16f64:590; CHECK: // %bb.0:591; CHECK-NEXT: // kill: def $d0 killed $d0 def $z0592; CHECK-NEXT: ptrue p0.d, vl16593; CHECK-NEXT: mov z0.d, d0594; CHECK-NEXT: st1d { z0.d }, p0, [x0]595; CHECK-NEXT: ret596 %insert = insertelement <16 x double> poison, double %a, i64 0597 %splat = shufflevector <16 x double> %insert, <16 x double> poison, <16 x i32> zeroinitializer598 store <16 x double> %splat, ptr %b599 ret void600}601 602define void @splat_v32f64(double %a, ptr %b) vscale_range(16,0) #0 {603; CHECK-LABEL: splat_v32f64:604; CHECK: // %bb.0:605; CHECK-NEXT: // kill: def $d0 killed $d0 def $z0606; CHECK-NEXT: ptrue p0.d, vl32607; CHECK-NEXT: mov z0.d, d0608; CHECK-NEXT: st1d { z0.d }, p0, [x0]609; CHECK-NEXT: ret610 %insert = insertelement <32 x double> poison, double %a, i64 0611 %splat = shufflevector <32 x double> %insert, <32 x double> poison, <32 x i32> zeroinitializer612 store <32 x double> %splat, ptr %b613 ret void614}615 616;617; DUP (integer immediate)618;619 620define void @splat_imm_v64i8(ptr %a) vscale_range(4,0) #0 {621; CHECK-LABEL: splat_imm_v64i8:622; CHECK: // %bb.0:623; CHECK-NEXT: mov z0.b, #1 // =0x1624; CHECK-NEXT: ptrue p0.b, vl64625; CHECK-NEXT: st1b { z0.b }, p0, [x0]626; CHECK-NEXT: ret627 store <64 x i8> splat (i8 1), ptr %a628 ret void629}630 631define void @splat_imm_v32i16(ptr %a) vscale_range(4,0) #0 {632; CHECK-LABEL: splat_imm_v32i16:633; CHECK: // %bb.0:634; CHECK-NEXT: mov z0.h, #2 // =0x2635; CHECK-NEXT: ptrue p0.h, vl32636; CHECK-NEXT: st1h { z0.h }, p0, [x0]637; CHECK-NEXT: ret638 store <32 x i16> splat (i16 2), ptr %a639 ret void640}641 642define void @splat_imm_v16i32(ptr %a) vscale_range(4,0) #0 {643; CHECK-LABEL: splat_imm_v16i32:644; CHECK: // %bb.0:645; CHECK-NEXT: mov z0.s, #3 // =0x3646; CHECK-NEXT: ptrue p0.s, vl16647; CHECK-NEXT: st1w { z0.s }, p0, [x0]648; CHECK-NEXT: ret649 store <16 x i32> splat (i32 3), ptr %a650 ret void651}652 653define void @splat_imm_v8i64(ptr %a) vscale_range(4,0) #0 {654; CHECK-LABEL: splat_imm_v8i64:655; CHECK: // %bb.0:656; CHECK-NEXT: mov z0.d, #4 // =0x4657; CHECK-NEXT: ptrue p0.d, vl8658; CHECK-NEXT: st1d { z0.d }, p0, [x0]659; CHECK-NEXT: ret660 store <8 x i64> splat (i64 4), ptr %a661 ret void662}663 664;665; DUP (floating-point immediate)666;667 668define void @splat_imm_v32f16(ptr %a) vscale_range(4,0) #0 {669; CHECK-LABEL: splat_imm_v32f16:670; CHECK: // %bb.0:671; CHECK-NEXT: fmov z0.h, #5.00000000672; CHECK-NEXT: ptrue p0.h, vl32673; CHECK-NEXT: st1h { z0.h }, p0, [x0]674; CHECK-NEXT: ret675 store <32 x half> splat (half 5.0), ptr %a676 ret void677}678 679define void @splat_imm_v16f32(ptr %a) vscale_range(4,0) #0 {680; CHECK-LABEL: splat_imm_v16f32:681; CHECK: // %bb.0:682; CHECK-NEXT: fmov z0.s, #6.00000000683; CHECK-NEXT: ptrue p0.s, vl16684; CHECK-NEXT: st1w { z0.s }, p0, [x0]685; CHECK-NEXT: ret686 store <16 x float> splat (float 6.0), ptr %a687 ret void688}689 690define void @splat_imm_v8f64(ptr %a) vscale_range(4,0) #0 {691; CHECK-LABEL: splat_imm_v8f64:692; CHECK: // %bb.0:693; CHECK-NEXT: fmov z0.d, #7.00000000694; CHECK-NEXT: ptrue p0.d, vl8695; CHECK-NEXT: st1d { z0.d }, p0, [x0]696; CHECK-NEXT: ret697 store <8 x double> splat (double 7.0), ptr %a698 ret void699}700 701define void @load_splat_v8f32(ptr %a, ptr %b) vscale_range(2,2) #0 {702; CHECK-LABEL: load_splat_v8f32:703; CHECK: // %bb.0:704; CHECK-NEXT: ldr z0, [x0]705; CHECK-NEXT: mov z0.s, s0706; CHECK-NEXT: str z0, [x1]707; CHECK-NEXT: ret708 %v = load <8 x float>, ptr %a709 %splat = shufflevector <8 x float> %v, <8 x float> poison, <8 x i32> zeroinitializer710 store <8 x float> %splat, ptr %b711 ret void712}713 714define void @load_splat_v4f64(ptr %a, ptr %b) vscale_range(2,2) #0 {715; CHECK-LABEL: load_splat_v4f64:716; CHECK: // %bb.0:717; CHECK-NEXT: ldr z0, [x0]718; CHECK-NEXT: mov z0.d, d0719; CHECK-NEXT: str z0, [x1]720; CHECK-NEXT: ret721 %v = load <4 x double>, ptr %a722 %splat = shufflevector <4 x double> %v, <4 x double> poison, <4 x i32> zeroinitializer723 store <4 x double> %splat, ptr %b724 ret void725}726 727define void @load_splat_v32i8(ptr %a, ptr %b) vscale_range(2,2) #0 {728; CHECK-LABEL: load_splat_v32i8:729; CHECK: // %bb.0:730; CHECK-NEXT: ptrue p0.b731; CHECK-NEXT: ld1rb { z0.b }, p0/z, [x0]732; CHECK-NEXT: str z0, [x1]733; CHECK-NEXT: ret734 %v = load <32 x i8>, ptr %a735 %splat = shufflevector <32 x i8> %v, <32 x i8> poison, <32 x i32> zeroinitializer736 store <32 x i8> %splat, ptr %b737 ret void738}739 740define void @load_splat_v16i16(ptr %a, ptr %b) vscale_range(2,2) #0 {741; CHECK-LABEL: load_splat_v16i16:742; CHECK: // %bb.0:743; CHECK-NEXT: ptrue p0.h744; CHECK-NEXT: ld1rh { z0.h }, p0/z, [x0]745; CHECK-NEXT: str z0, [x1]746; CHECK-NEXT: ret747 %v = load <16 x i16>, ptr %a748 %splat = shufflevector <16 x i16> %v, <16 x i16> poison, <16 x i32> zeroinitializer749 store <16 x i16> %splat, ptr %b750 ret void751}752 753define void @load_splat_v8i32(ptr %a, ptr %b) vscale_range(2,2) #0 {754; CHECK-LABEL: load_splat_v8i32:755; CHECK: // %bb.0:756; CHECK-NEXT: ptrue p0.s757; CHECK-NEXT: ld1rw { z0.s }, p0/z, [x0]758; CHECK-NEXT: str z0, [x1]759; CHECK-NEXT: ret760 %v = load <8 x i32>, ptr %a761 %splat = shufflevector <8 x i32> %v, <8 x i32> poison, <8 x i32> zeroinitializer762 store <8 x i32> %splat, ptr %b763 ret void764}765 766define void @load_splat_v4i64(ptr %a, ptr %b) vscale_range(2,2) #0 {767; CHECK-LABEL: load_splat_v4i64:768; CHECK: // %bb.0:769; CHECK-NEXT: ptrue p0.d770; CHECK-NEXT: ld1rd { z0.d }, p0/z, [x0]771; CHECK-NEXT: str z0, [x1]772; CHECK-NEXT: ret773 %v = load <4 x i64>, ptr %a774 %splat = shufflevector <4 x i64> %v, <4 x i64> poison, <4 x i32> zeroinitializer775 store <4 x i64> %splat, ptr %b776 ret void777}778 779attributes #0 = { "target-features"="+sve" }780