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1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py2; RUN: llc -mattr=+sve < %s | FileCheck %s3 4; Streaming-compatible SVE doesn't include FADDA, so this shouldn't compile!5; RUN: not --crash llc -mattr=+sve -force-streaming-compatible < %s6 7target triple = "aarch64-linux-gnu"8 9; FADD10 11define half @fadda_nxv2f16(half %init, <vscale x 2 x half> %a) {12; CHECK-LABEL: fadda_nxv2f16:13; CHECK: // %bb.0:14; CHECK-NEXT: ptrue p0.d15; CHECK-NEXT: // kill: def $h0 killed $h0 def $z016; CHECK-NEXT: fadda h0, p0, h0, z1.h17; CHECK-NEXT: // kill: def $h0 killed $h0 killed $z018; CHECK-NEXT: ret19 %res = call half @llvm.vector.reduce.fadd.nxv2f16(half %init, <vscale x 2 x half> %a)20 ret half %res21}22 23define half @fadda_nxv4f16(half %init, <vscale x 4 x half> %a) {24; CHECK-LABEL: fadda_nxv4f16:25; CHECK: // %bb.0:26; CHECK-NEXT: ptrue p0.s27; CHECK-NEXT: // kill: def $h0 killed $h0 def $z028; CHECK-NEXT: fadda h0, p0, h0, z1.h29; CHECK-NEXT: // kill: def $h0 killed $h0 killed $z030; CHECK-NEXT: ret31 %res = call half @llvm.vector.reduce.fadd.nxv4f16(half %init, <vscale x 4 x half> %a)32 ret half %res33}34 35define half @fadda_nxv8f16(half %init, <vscale x 8 x half> %a) {36; CHECK-LABEL: fadda_nxv8f16:37; CHECK: // %bb.0:38; CHECK-NEXT: ptrue p0.h39; CHECK-NEXT: // kill: def $h0 killed $h0 def $z040; CHECK-NEXT: fadda h0, p0, h0, z1.h41; CHECK-NEXT: // kill: def $h0 killed $h0 killed $z042; CHECK-NEXT: ret43 %res = call half @llvm.vector.reduce.fadd.nxv8f16(half %init, <vscale x 8 x half> %a)44 ret half %res45}46 47define half @fadda_nxv6f16(<vscale x 6 x half> %v, half %s) {48; CHECK-LABEL: fadda_nxv6f16:49; CHECK: // %bb.0:50; CHECK-NEXT: str x29, [sp, #-16]! // 8-byte Folded Spill51; CHECK-NEXT: addvl sp, sp, #-152; CHECK-NEXT: .cfi_escape 0x0f, 0x08, 0x8f, 0x10, 0x92, 0x2e, 0x00, 0x38, 0x1e, 0x22 // sp + 16 + 8 * VG53; CHECK-NEXT: .cfi_offset w29, -1654; CHECK-NEXT: dupm z2.h, #0x800055; CHECK-NEXT: ptrue p0.d56; CHECK-NEXT: str z0, [sp]57; CHECK-NEXT: fmov s0, s158; CHECK-NEXT: st1h { z2.d }, p0, [sp, #3, mul vl]59; CHECK-NEXT: ptrue p0.h60; CHECK-NEXT: ldr z2, [sp]61; CHECK-NEXT: fadda h0, p0, h0, z2.h62; CHECK-NEXT: // kill: def $h0 killed $h0 killed $z063; CHECK-NEXT: addvl sp, sp, #164; CHECK-NEXT: ldr x29, [sp], #16 // 8-byte Folded Reload65; CHECK-NEXT: ret66 %res = call half @llvm.vector.reduce.fadd.nxv6f16(half %s, <vscale x 6 x half> %v)67 ret half %res68}69 70define half @fadda_nxv10f16(<vscale x 10 x half> %v, half %s) {71; CHECK-LABEL: fadda_nxv10f16:72; CHECK: // %bb.0:73; CHECK-NEXT: str x29, [sp, #-16]! // 8-byte Folded Spill74; CHECK-NEXT: addvl sp, sp, #-375; CHECK-NEXT: .cfi_escape 0x0f, 0x08, 0x8f, 0x10, 0x92, 0x2e, 0x00, 0x48, 0x1e, 0x22 // sp + 16 + 24 * VG76; CHECK-NEXT: .cfi_offset w29, -1677; CHECK-NEXT: ptrue p0.h78; CHECK-NEXT: // kill: def $h2 killed $h2 def $z279; CHECK-NEXT: str z1, [sp]80; CHECK-NEXT: addvl x8, sp, #181; CHECK-NEXT: ptrue p1.d82; CHECK-NEXT: fadda h2, p0, h2, z0.h83; CHECK-NEXT: dupm z0.h, #0x800084; CHECK-NEXT: st1h { z0.d }, p1, [sp, #1, mul vl]85; CHECK-NEXT: ldr z1, [sp]86; CHECK-NEXT: str z1, [sp, #1, mul vl]87; CHECK-NEXT: st1h { z0.d }, p1, [sp, #6, mul vl]88; CHECK-NEXT: ldr z1, [sp, #1, mul vl]89; CHECK-NEXT: str z1, [sp, #2, mul vl]90; CHECK-NEXT: st1h { z0.d }, p1, [x8, #7, mul vl]91; CHECK-NEXT: ldr z0, [sp, #2, mul vl]92; CHECK-NEXT: fadda h2, p0, h2, z0.h93; CHECK-NEXT: fmov s0, s294; CHECK-NEXT: addvl sp, sp, #395; CHECK-NEXT: ldr x29, [sp], #16 // 8-byte Folded Reload96; CHECK-NEXT: ret97 %res = call half @llvm.vector.reduce.fadd.nxv10f16(half %s, <vscale x 10 x half> %v)98 ret half %res99}100 101define half @fadda_nxv12f16(<vscale x 12 x half> %v, half %s) {102; CHECK-LABEL: fadda_nxv12f16:103; CHECK: // %bb.0:104; CHECK-NEXT: ptrue p0.h105; CHECK-NEXT: // kill: def $h2 killed $h2 def $z2106; CHECK-NEXT: uunpklo z1.s, z1.h107; CHECK-NEXT: fadda h2, p0, h2, z0.h108; CHECK-NEXT: dupm z0.h, #0x8000109; CHECK-NEXT: uzp1 z0.h, z1.h, z0.h110; CHECK-NEXT: fadda h2, p0, h2, z0.h111; CHECK-NEXT: fmov s0, s2112; CHECK-NEXT: ret113 %res = call half @llvm.vector.reduce.fadd.nxv12f16(half %s, <vscale x 12 x half> %v)114 ret half %res115}116 117define float @fadda_nxv2f32(float %init, <vscale x 2 x float> %a) {118; CHECK-LABEL: fadda_nxv2f32:119; CHECK: // %bb.0:120; CHECK-NEXT: ptrue p0.d121; CHECK-NEXT: // kill: def $s0 killed $s0 def $z0122; CHECK-NEXT: fadda s0, p0, s0, z1.s123; CHECK-NEXT: // kill: def $s0 killed $s0 killed $z0124; CHECK-NEXT: ret125 %res = call float @llvm.vector.reduce.fadd.nxv2f32(float %init, <vscale x 2 x float> %a)126 ret float %res127}128 129define float @fadda_nxv4f32(float %init, <vscale x 4 x float> %a) {130; CHECK-LABEL: fadda_nxv4f32:131; CHECK: // %bb.0:132; CHECK-NEXT: ptrue p0.s133; CHECK-NEXT: // kill: def $s0 killed $s0 def $z0134; CHECK-NEXT: fadda s0, p0, s0, z1.s135; CHECK-NEXT: // kill: def $s0 killed $s0 killed $z0136; CHECK-NEXT: ret137 %res = call float @llvm.vector.reduce.fadd.nxv4f32(float %init, <vscale x 4 x float> %a)138 ret float %res139}140 141define double @fadda_nxv2f64(double %init, <vscale x 2 x double> %a) {142; CHECK-LABEL: fadda_nxv2f64:143; CHECK: // %bb.0:144; CHECK-NEXT: ptrue p0.d145; CHECK-NEXT: // kill: def $d0 killed $d0 def $z0146; CHECK-NEXT: fadda d0, p0, d0, z1.d147; CHECK-NEXT: // kill: def $d0 killed $d0 killed $z0148; CHECK-NEXT: ret149 %res = call double @llvm.vector.reduce.fadd.nxv2f64(double %init, <vscale x 2 x double> %a)150 ret double %res151}152 153declare half @llvm.vector.reduce.fadd.nxv2f16(half, <vscale x 2 x half>)154declare half @llvm.vector.reduce.fadd.nxv4f16(half, <vscale x 4 x half>)155declare half @llvm.vector.reduce.fadd.nxv8f16(half, <vscale x 8 x half>)156declare half @llvm.vector.reduce.fadd.nxv6f16(half, <vscale x 6 x half>)157declare half @llvm.vector.reduce.fadd.nxv10f16(half, <vscale x 10 x half>)158declare half @llvm.vector.reduce.fadd.nxv12f16(half, <vscale x 12 x half>)159declare float @llvm.vector.reduce.fadd.nxv2f32(float, <vscale x 2 x float>)160declare float @llvm.vector.reduce.fadd.nxv4f32(float, <vscale x 4 x float>)161declare float @llvm.vector.reduce.fadd.nxv8f32(float, <vscale x 8 x float>)162declare double @llvm.vector.reduce.fadd.nxv2f64(double, <vscale x 2 x double>)163