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1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py2; RUN: llc -mtriple=aarch64-linux-gnu -mattr=+sve < %s | FileCheck %s3 4; FADDV5 6define half @faddv_nxv2f16(half %init, <vscale x 2 x half> %a) {7; CHECK-LABEL: faddv_nxv2f16:8; CHECK: // %bb.0:9; CHECK-NEXT: ptrue p0.d10; CHECK-NEXT: faddv h1, p0, z1.h11; CHECK-NEXT: fadd h0, h0, h112; CHECK-NEXT: ret13 %res = call fast half @llvm.vector.reduce.fadd.nxv2f16(half %init, <vscale x 2 x half> %a)14 ret half %res15}16 17define half @faddv_nxv4f16(half %init, <vscale x 4 x half> %a) {18; CHECK-LABEL: faddv_nxv4f16:19; CHECK: // %bb.0:20; CHECK-NEXT: ptrue p0.s21; CHECK-NEXT: faddv h1, p0, z1.h22; CHECK-NEXT: fadd h0, h0, h123; CHECK-NEXT: ret24 %res = call fast half @llvm.vector.reduce.fadd.nxv4f16(half %init, <vscale x 4 x half> %a)25 ret half %res26}27 28define half @faddv_nxv8f16(half %init, <vscale x 8 x half> %a) {29; CHECK-LABEL: faddv_nxv8f16:30; CHECK: // %bb.0:31; CHECK-NEXT: ptrue p0.h32; CHECK-NEXT: faddv h1, p0, z1.h33; CHECK-NEXT: fadd h0, h0, h134; CHECK-NEXT: ret35 %res = call fast half @llvm.vector.reduce.fadd.nxv8f16(half %init, <vscale x 8 x half> %a)36 ret half %res37}38 39define float @faddv_nxv2f32(float %init, <vscale x 2 x float> %a) {40; CHECK-LABEL: faddv_nxv2f32:41; CHECK: // %bb.0:42; CHECK-NEXT: ptrue p0.d43; CHECK-NEXT: faddv s1, p0, z1.s44; CHECK-NEXT: fadd s0, s0, s145; CHECK-NEXT: ret46 %res = call fast float @llvm.vector.reduce.fadd.nxv2f32(float %init, <vscale x 2 x float> %a)47 ret float %res48}49 50define float @faddv_nxv4f32(float %init, <vscale x 4 x float> %a) {51; CHECK-LABEL: faddv_nxv4f32:52; CHECK: // %bb.0:53; CHECK-NEXT: ptrue p0.s54; CHECK-NEXT: faddv s1, p0, z1.s55; CHECK-NEXT: fadd s0, s0, s156; CHECK-NEXT: ret57 %res = call fast float @llvm.vector.reduce.fadd.nxv4f32(float %init, <vscale x 4 x float> %a)58 ret float %res59}60 61define double @faddv_nxv2f64(double %init, <vscale x 2 x double> %a) {62; CHECK-LABEL: faddv_nxv2f64:63; CHECK: // %bb.0:64; CHECK-NEXT: ptrue p0.d65; CHECK-NEXT: faddv d1, p0, z1.d66; CHECK-NEXT: fadd d0, d0, d167; CHECK-NEXT: ret68 %res = call fast double @llvm.vector.reduce.fadd.nxv2f64(double %init, <vscale x 2 x double> %a)69 ret double %res70}71 72; FMAXNMV73 74define half @fmaxv_nxv2f16(<vscale x 2 x half> %a) {75; CHECK-LABEL: fmaxv_nxv2f16:76; CHECK: // %bb.0:77; CHECK-NEXT: ptrue p0.d78; CHECK-NEXT: fmaxnmv h0, p0, z0.h79; CHECK-NEXT: // kill: def $h0 killed $h0 killed $z080; CHECK-NEXT: ret81 %res = call half @llvm.vector.reduce.fmax.nxv2f16(<vscale x 2 x half> %a)82 ret half %res83}84 85define half @fmaxv_nxv4f16(<vscale x 4 x half> %a) {86; CHECK-LABEL: fmaxv_nxv4f16:87; CHECK: // %bb.0:88; CHECK-NEXT: ptrue p0.s89; CHECK-NEXT: fmaxnmv h0, p0, z0.h90; CHECK-NEXT: // kill: def $h0 killed $h0 killed $z091; CHECK-NEXT: ret92 %res = call half @llvm.vector.reduce.fmax.nxv4f16(<vscale x 4 x half> %a)93 ret half %res94}95 96define half @fmaxv_nxv8f16(<vscale x 8 x half> %a) {97; CHECK-LABEL: fmaxv_nxv8f16:98; CHECK: // %bb.0:99; CHECK-NEXT: ptrue p0.h100; CHECK-NEXT: fmaxnmv h0, p0, z0.h101; CHECK-NEXT: // kill: def $h0 killed $h0 killed $z0102; CHECK-NEXT: ret103 %res = call half @llvm.vector.reduce.fmax.nxv8f16(<vscale x 8 x half> %a)104 ret half %res105}106 107define float @fmaxv_nxv2f32(<vscale x 2 x float> %a) {108; CHECK-LABEL: fmaxv_nxv2f32:109; CHECK: // %bb.0:110; CHECK-NEXT: ptrue p0.d111; CHECK-NEXT: fmaxnmv s0, p0, z0.s112; CHECK-NEXT: // kill: def $s0 killed $s0 killed $z0113; CHECK-NEXT: ret114 %res = call float @llvm.vector.reduce.fmax.nxv2f32(<vscale x 2 x float> %a)115 ret float %res116}117 118define float @fmaxv_nxv4f32(<vscale x 4 x float> %a) {119; CHECK-LABEL: fmaxv_nxv4f32:120; CHECK: // %bb.0:121; CHECK-NEXT: ptrue p0.s122; CHECK-NEXT: fmaxnmv s0, p0, z0.s123; CHECK-NEXT: // kill: def $s0 killed $s0 killed $z0124; CHECK-NEXT: ret125 %res = call float @llvm.vector.reduce.fmax.nxv4f32(<vscale x 4 x float> %a)126 ret float %res127}128 129define double @fmaxv_nxv2f64(<vscale x 2 x double> %a) {130; CHECK-LABEL: fmaxv_nxv2f64:131; CHECK: // %bb.0:132; CHECK-NEXT: ptrue p0.d133; CHECK-NEXT: fmaxnmv d0, p0, z0.d134; CHECK-NEXT: // kill: def $d0 killed $d0 killed $z0135; CHECK-NEXT: ret136 %res = call double @llvm.vector.reduce.fmax.nxv2f64(<vscale x 2 x double> %a)137 ret double %res138}139 140; FMINNMV141 142define half @fminv_nxv2f16(<vscale x 2 x half> %a) {143; CHECK-LABEL: fminv_nxv2f16:144; CHECK: // %bb.0:145; CHECK-NEXT: ptrue p0.d146; CHECK-NEXT: fminnmv h0, p0, z0.h147; CHECK-NEXT: // kill: def $h0 killed $h0 killed $z0148; CHECK-NEXT: ret149 %res = call half @llvm.vector.reduce.fmin.nxv2f16(<vscale x 2 x half> %a)150 ret half %res151}152 153define half @fminv_nxv4f16(<vscale x 4 x half> %a) {154; CHECK-LABEL: fminv_nxv4f16:155; CHECK: // %bb.0:156; CHECK-NEXT: ptrue p0.s157; CHECK-NEXT: fminnmv h0, p0, z0.h158; CHECK-NEXT: // kill: def $h0 killed $h0 killed $z0159; CHECK-NEXT: ret160 %res = call half @llvm.vector.reduce.fmin.nxv4f16(<vscale x 4 x half> %a)161 ret half %res162}163 164define half @fminv_nxv8f16(<vscale x 8 x half> %a) {165; CHECK-LABEL: fminv_nxv8f16:166; CHECK: // %bb.0:167; CHECK-NEXT: ptrue p0.h168; CHECK-NEXT: fminnmv h0, p0, z0.h169; CHECK-NEXT: // kill: def $h0 killed $h0 killed $z0170; CHECK-NEXT: ret171 %res = call half @llvm.vector.reduce.fmin.nxv8f16(<vscale x 8 x half> %a)172 ret half %res173}174 175define float @fminv_nxv2f32(<vscale x 2 x float> %a) {176; CHECK-LABEL: fminv_nxv2f32:177; CHECK: // %bb.0:178; CHECK-NEXT: ptrue p0.d179; CHECK-NEXT: fminnmv s0, p0, z0.s180; CHECK-NEXT: // kill: def $s0 killed $s0 killed $z0181; CHECK-NEXT: ret182 %res = call float @llvm.vector.reduce.fmin.nxv2f32(<vscale x 2 x float> %a)183 ret float %res184}185 186define float @fminv_nxv4f32(<vscale x 4 x float> %a) {187; CHECK-LABEL: fminv_nxv4f32:188; CHECK: // %bb.0:189; CHECK-NEXT: ptrue p0.s190; CHECK-NEXT: fminnmv s0, p0, z0.s191; CHECK-NEXT: // kill: def $s0 killed $s0 killed $z0192; CHECK-NEXT: ret193 %res = call float @llvm.vector.reduce.fmin.nxv4f32(<vscale x 4 x float> %a)194 ret float %res195}196 197define double @fminv_nxv2f64(<vscale x 2 x double> %a) {198; CHECK-LABEL: fminv_nxv2f64:199; CHECK: // %bb.0:200; CHECK-NEXT: ptrue p0.d201; CHECK-NEXT: fminnmv d0, p0, z0.d202; CHECK-NEXT: // kill: def $d0 killed $d0 killed $z0203; CHECK-NEXT: ret204 %res = call double @llvm.vector.reduce.fmin.nxv2f64(<vscale x 2 x double> %a)205 ret double %res206}207 208 209 210 211; FMAXV212 213define half @fmaximumv_nxv2f16(<vscale x 2 x half> %a) {214; CHECK-LABEL: fmaximumv_nxv2f16:215; CHECK: // %bb.0:216; CHECK-NEXT: ptrue p0.d217; CHECK-NEXT: fmaxv h0, p0, z0.h218; CHECK-NEXT: // kill: def $h0 killed $h0 killed $z0219; CHECK-NEXT: ret220 %res = call half @llvm.vector.reduce.fmaximum.nxv2f16(<vscale x 2 x half> %a)221 ret half %res222}223 224define half @fmaximumv_nxv4f16(<vscale x 4 x half> %a) {225; CHECK-LABEL: fmaximumv_nxv4f16:226; CHECK: // %bb.0:227; CHECK-NEXT: ptrue p0.s228; CHECK-NEXT: fmaxv h0, p0, z0.h229; CHECK-NEXT: // kill: def $h0 killed $h0 killed $z0230; CHECK-NEXT: ret231 %res = call half @llvm.vector.reduce.fmaximum.nxv4f16(<vscale x 4 x half> %a)232 ret half %res233}234 235define half @fmaximumv_nxv8f16(<vscale x 8 x half> %a) {236; CHECK-LABEL: fmaximumv_nxv8f16:237; CHECK: // %bb.0:238; CHECK-NEXT: ptrue p0.h239; CHECK-NEXT: fmaxv h0, p0, z0.h240; CHECK-NEXT: // kill: def $h0 killed $h0 killed $z0241; CHECK-NEXT: ret242 %res = call half @llvm.vector.reduce.fmaximum.nxv8f16(<vscale x 8 x half> %a)243 ret half %res244}245 246define float @fmaximumv_nxv2f32(<vscale x 2 x float> %a) {247; CHECK-LABEL: fmaximumv_nxv2f32:248; CHECK: // %bb.0:249; CHECK-NEXT: ptrue p0.d250; CHECK-NEXT: fmaxv s0, p0, z0.s251; CHECK-NEXT: // kill: def $s0 killed $s0 killed $z0252; CHECK-NEXT: ret253 %res = call float @llvm.vector.reduce.fmaximum.nxv2f32(<vscale x 2 x float> %a)254 ret float %res255}256 257define float @fmaximumv_nxv4f32(<vscale x 4 x float> %a) {258; CHECK-LABEL: fmaximumv_nxv4f32:259; CHECK: // %bb.0:260; CHECK-NEXT: ptrue p0.s261; CHECK-NEXT: fmaxv s0, p0, z0.s262; CHECK-NEXT: // kill: def $s0 killed $s0 killed $z0263; CHECK-NEXT: ret264 %res = call float @llvm.vector.reduce.fmaximum.nxv4f32(<vscale x 4 x float> %a)265 ret float %res266}267 268define double @fmaximumv_nxv2f64(<vscale x 2 x double> %a) {269; CHECK-LABEL: fmaximumv_nxv2f64:270; CHECK: // %bb.0:271; CHECK-NEXT: ptrue p0.d272; CHECK-NEXT: fmaxv d0, p0, z0.d273; CHECK-NEXT: // kill: def $d0 killed $d0 killed $z0274; CHECK-NEXT: ret275 %res = call double @llvm.vector.reduce.fmaximum.nxv2f64(<vscale x 2 x double> %a)276 ret double %res277}278 279; FMINV280 281define half @fminimumv_nxv2f16(<vscale x 2 x half> %a) {282; CHECK-LABEL: fminimumv_nxv2f16:283; CHECK: // %bb.0:284; CHECK-NEXT: ptrue p0.d285; CHECK-NEXT: fminv h0, p0, z0.h286; CHECK-NEXT: // kill: def $h0 killed $h0 killed $z0287; CHECK-NEXT: ret288 %res = call half @llvm.vector.reduce.fminimum.nxv2f16(<vscale x 2 x half> %a)289 ret half %res290}291 292define half @fminimumv_nxv4f16(<vscale x 4 x half> %a) {293; CHECK-LABEL: fminimumv_nxv4f16:294; CHECK: // %bb.0:295; CHECK-NEXT: ptrue p0.s296; CHECK-NEXT: fminv h0, p0, z0.h297; CHECK-NEXT: // kill: def $h0 killed $h0 killed $z0298; CHECK-NEXT: ret299 %res = call half @llvm.vector.reduce.fminimum.nxv4f16(<vscale x 4 x half> %a)300 ret half %res301}302 303define half @fminimumv_nxv8f16(<vscale x 8 x half> %a) {304; CHECK-LABEL: fminimumv_nxv8f16:305; CHECK: // %bb.0:306; CHECK-NEXT: ptrue p0.h307; CHECK-NEXT: fminv h0, p0, z0.h308; CHECK-NEXT: // kill: def $h0 killed $h0 killed $z0309; CHECK-NEXT: ret310 %res = call half @llvm.vector.reduce.fminimum.nxv8f16(<vscale x 8 x half> %a)311 ret half %res312}313 314define float @fminimumv_nxv2f32(<vscale x 2 x float> %a) {315; CHECK-LABEL: fminimumv_nxv2f32:316; CHECK: // %bb.0:317; CHECK-NEXT: ptrue p0.d318; CHECK-NEXT: fminv s0, p0, z0.s319; CHECK-NEXT: // kill: def $s0 killed $s0 killed $z0320; CHECK-NEXT: ret321 %res = call float @llvm.vector.reduce.fminimum.nxv2f32(<vscale x 2 x float> %a)322 ret float %res323}324 325define float @fminimumv_nxv4f32(<vscale x 4 x float> %a) {326; CHECK-LABEL: fminimumv_nxv4f32:327; CHECK: // %bb.0:328; CHECK-NEXT: ptrue p0.s329; CHECK-NEXT: fminv s0, p0, z0.s330; CHECK-NEXT: // kill: def $s0 killed $s0 killed $z0331; CHECK-NEXT: ret332 %res = call float @llvm.vector.reduce.fminimum.nxv4f32(<vscale x 4 x float> %a)333 ret float %res334}335 336define double @fminimumv_nxv2f64(<vscale x 2 x double> %a) {337; CHECK-LABEL: fminimumv_nxv2f64:338; CHECK: // %bb.0:339; CHECK-NEXT: ptrue p0.d340; CHECK-NEXT: fminv d0, p0, z0.d341; CHECK-NEXT: // kill: def $d0 killed $d0 killed $z0342; CHECK-NEXT: ret343 %res = call double @llvm.vector.reduce.fminimum.nxv2f64(<vscale x 2 x double> %a)344 ret double %res345}346 347define float @fadd_reduct_reassoc_v4v8f32(<vscale x 4 x float> %a, <vscale x 8 x float> %b) {348; CHECK-LABEL: fadd_reduct_reassoc_v4v8f32:349; CHECK: // %bb.0:350; CHECK-NEXT: fadd z1.s, z1.s, z2.s351; CHECK-NEXT: ptrue p0.s352; CHECK-NEXT: fadd z0.s, z0.s, z1.s353; CHECK-NEXT: faddv s0, p0, z0.s354; CHECK-NEXT: // kill: def $s0 killed $s0 killed $z0355; CHECK-NEXT: ret356 %r1 = call fast float @llvm.vector.reduce.fadd.nxv4f32(float -0.0, <vscale x 4 x float> %a)357 %r2 = call fast float @llvm.vector.reduce.fadd.nxv8f32(float -0.0, <vscale x 8 x float> %b)358 %r = fadd fast float %r1, %r2359 ret float %r360}361 362; No FMULV instruction so use knowledge about the architectural maximum size of363; an SVE register to "scalarise" the reduction.364 365define half @fmulv_nxv2f16(half %init, <vscale x 2 x half> %a) {366; CHECK-LABEL: fmulv_nxv2f16:367; CHECK: // %bb.0:368; CHECK-NEXT: fmov z2.h, #1.00000000369; CHECK-NEXT: ptrue p0.d370; CHECK-NEXT: uzp2 z3.d, z1.d, z2.d371; CHECK-NEXT: uzp1 z1.d, z1.d, z2.d372; CHECK-NEXT: fmul z1.h, p0/m, z1.h, z3.h373; CHECK-NEXT: uzp2 z3.d, z1.d, z2.d374; CHECK-NEXT: uzp1 z1.d, z1.d, z2.d375; CHECK-NEXT: fmul z1.h, p0/m, z1.h, z3.h376; CHECK-NEXT: uzp2 z3.d, z1.d, z2.d377; CHECK-NEXT: uzp1 z1.d, z1.d, z2.d378; CHECK-NEXT: fmul z1.h, p0/m, z1.h, z3.h379; CHECK-NEXT: uzp2 z3.d, z1.d, z2.d380; CHECK-NEXT: uzp1 z1.d, z1.d, z2.d381; CHECK-NEXT: fmul z1.h, p0/m, z1.h, z3.h382; CHECK-NEXT: uzp2 z3.d, z1.d, z2.d383; CHECK-NEXT: uzp1 z1.d, z1.d, z2.d384; CHECK-NEXT: fmul z1.h, p0/m, z1.h, z3.h385; CHECK-NEXT: fmul h0, h0, h1386; CHECK-NEXT: ret387 %res = call fast half @llvm.vector.reduce.fmul.nxv2f16(half %init, <vscale x 2 x half> %a)388 ret half %res389}390 391define half @fmulv_nxv4f16(half %init, <vscale x 4 x half> %a) {392; CHECK-LABEL: fmulv_nxv4f16:393; CHECK: // %bb.0:394; CHECK-NEXT: fmov z2.h, #1.00000000395; CHECK-NEXT: ptrue p0.s396; CHECK-NEXT: uzp2 z3.s, z1.s, z2.s397; CHECK-NEXT: uzp1 z1.s, z1.s, z2.s398; CHECK-NEXT: fmul z1.h, p0/m, z1.h, z3.h399; CHECK-NEXT: uzp2 z3.s, z1.s, z2.s400; CHECK-NEXT: uzp1 z1.s, z1.s, z2.s401; CHECK-NEXT: fmul z1.h, p0/m, z1.h, z3.h402; CHECK-NEXT: uzp2 z3.s, z1.s, z2.s403; CHECK-NEXT: uzp1 z1.s, z1.s, z2.s404; CHECK-NEXT: fmul z1.h, p0/m, z1.h, z3.h405; CHECK-NEXT: uzp2 z3.s, z1.s, z2.s406; CHECK-NEXT: uzp1 z1.s, z1.s, z2.s407; CHECK-NEXT: fmul z1.h, p0/m, z1.h, z3.h408; CHECK-NEXT: uzp2 z3.s, z1.s, z2.s409; CHECK-NEXT: uzp1 z1.s, z1.s, z2.s410; CHECK-NEXT: fmul z1.h, p0/m, z1.h, z3.h411; CHECK-NEXT: uzp2 z3.s, z1.s, z2.s412; CHECK-NEXT: uzp1 z1.s, z1.s, z2.s413; CHECK-NEXT: fmul z1.h, p0/m, z1.h, z3.h414; CHECK-NEXT: fmul h0, h0, h1415; CHECK-NEXT: ret416 %res = call fast half @llvm.vector.reduce.fmul.nxv4f16(half %init, <vscale x 4 x half> %a)417 ret half %res418}419 420define half @fmulv_nxv8f16(half %init, <vscale x 8 x half> %a) {421; CHECK-LABEL: fmulv_nxv8f16:422; CHECK: // %bb.0:423; CHECK-NEXT: fmov z2.h, #1.00000000424; CHECK-NEXT: uzp2 z3.h, z1.h, z2.h425; CHECK-NEXT: uzp1 z1.h, z1.h, z2.h426; CHECK-NEXT: fmul z1.h, z1.h, z3.h427; CHECK-NEXT: uzp2 z3.h, z1.h, z2.h428; CHECK-NEXT: uzp1 z1.h, z1.h, z2.h429; CHECK-NEXT: fmul z1.h, z1.h, z3.h430; CHECK-NEXT: uzp2 z3.h, z1.h, z2.h431; CHECK-NEXT: uzp1 z1.h, z1.h, z2.h432; CHECK-NEXT: fmul z1.h, z1.h, z3.h433; CHECK-NEXT: uzp2 z3.h, z1.h, z2.h434; CHECK-NEXT: uzp1 z1.h, z1.h, z2.h435; CHECK-NEXT: fmul z1.h, z1.h, z3.h436; CHECK-NEXT: uzp2 z3.h, z1.h, z2.h437; CHECK-NEXT: uzp1 z1.h, z1.h, z2.h438; CHECK-NEXT: fmul z1.h, z1.h, z3.h439; CHECK-NEXT: uzp2 z3.h, z1.h, z2.h440; CHECK-NEXT: uzp1 z1.h, z1.h, z2.h441; CHECK-NEXT: fmul z1.h, z1.h, z3.h442; CHECK-NEXT: uzp2 z3.h, z1.h, z2.h443; CHECK-NEXT: uzp1 z1.h, z1.h, z2.h444; CHECK-NEXT: fmul z1.h, z1.h, z3.h445; CHECK-NEXT: fmul h0, h0, h1446; CHECK-NEXT: ret447 %res = call fast half @llvm.vector.reduce.fmul.nxv8f16(half %init, <vscale x 8 x half> %a)448 ret half %res449}450 451define float @fmulv_nxv2f32(float %init, <vscale x 2 x float> %a) {452; CHECK-LABEL: fmulv_nxv2f32:453; CHECK: // %bb.0:454; CHECK-NEXT: fmov z2.s, #1.00000000455; CHECK-NEXT: ptrue p0.d456; CHECK-NEXT: uzp2 z3.d, z1.d, z2.d457; CHECK-NEXT: uzp1 z1.d, z1.d, z2.d458; CHECK-NEXT: fmul z1.s, p0/m, z1.s, z3.s459; CHECK-NEXT: uzp2 z3.d, z1.d, z2.d460; CHECK-NEXT: uzp1 z1.d, z1.d, z2.d461; CHECK-NEXT: fmul z1.s, p0/m, z1.s, z3.s462; CHECK-NEXT: uzp2 z3.d, z1.d, z2.d463; CHECK-NEXT: uzp1 z1.d, z1.d, z2.d464; CHECK-NEXT: fmul z1.s, p0/m, z1.s, z3.s465; CHECK-NEXT: uzp2 z3.d, z1.d, z2.d466; CHECK-NEXT: uzp1 z1.d, z1.d, z2.d467; CHECK-NEXT: fmul z1.s, p0/m, z1.s, z3.s468; CHECK-NEXT: uzp2 z3.d, z1.d, z2.d469; CHECK-NEXT: uzp1 z1.d, z1.d, z2.d470; CHECK-NEXT: fmul z1.s, p0/m, z1.s, z3.s471; CHECK-NEXT: fmul s0, s0, s1472; CHECK-NEXT: ret473 %res = call fast float @llvm.vector.reduce.fmul.nxv2f32(float %init, <vscale x 2 x float> %a)474 ret float %res475}476 477define float @fmulv_nxv4f32(float %init, <vscale x 4 x float> %a) {478; CHECK-LABEL: fmulv_nxv4f32:479; CHECK: // %bb.0:480; CHECK-NEXT: fmov z2.s, #1.00000000481; CHECK-NEXT: uzp2 z3.s, z1.s, z2.s482; CHECK-NEXT: uzp1 z1.s, z1.s, z2.s483; CHECK-NEXT: fmul z1.s, z1.s, z3.s484; CHECK-NEXT: uzp2 z3.s, z1.s, z2.s485; CHECK-NEXT: uzp1 z1.s, z1.s, z2.s486; CHECK-NEXT: fmul z1.s, z1.s, z3.s487; CHECK-NEXT: uzp2 z3.s, z1.s, z2.s488; CHECK-NEXT: uzp1 z1.s, z1.s, z2.s489; CHECK-NEXT: fmul z1.s, z1.s, z3.s490; CHECK-NEXT: uzp2 z3.s, z1.s, z2.s491; CHECK-NEXT: uzp1 z1.s, z1.s, z2.s492; CHECK-NEXT: fmul z1.s, z1.s, z3.s493; CHECK-NEXT: uzp2 z3.s, z1.s, z2.s494; CHECK-NEXT: uzp1 z1.s, z1.s, z2.s495; CHECK-NEXT: fmul z1.s, z1.s, z3.s496; CHECK-NEXT: uzp2 z3.s, z1.s, z2.s497; CHECK-NEXT: uzp1 z1.s, z1.s, z2.s498; CHECK-NEXT: fmul z1.s, z1.s, z3.s499; CHECK-NEXT: fmul s0, s0, s1500; CHECK-NEXT: ret501 %res = call fast float @llvm.vector.reduce.fmul.nxv4f32(float %init, <vscale x 4 x float> %a)502 ret float %res503}504 505define double @fmulv_nxv2f64(double %init, <vscale x 2 x double> %a) {506; CHECK-LABEL: fmulv_nxv2f64:507; CHECK: // %bb.0:508; CHECK-NEXT: fmov z2.d, #1.00000000509; CHECK-NEXT: uzp2 z3.d, z1.d, z2.d510; CHECK-NEXT: uzp1 z1.d, z1.d, z2.d511; CHECK-NEXT: fmul z1.d, z1.d, z3.d512; CHECK-NEXT: uzp2 z3.d, z1.d, z2.d513; CHECK-NEXT: uzp1 z1.d, z1.d, z2.d514; CHECK-NEXT: fmul z1.d, z1.d, z3.d515; CHECK-NEXT: uzp2 z3.d, z1.d, z2.d516; CHECK-NEXT: uzp1 z1.d, z1.d, z2.d517; CHECK-NEXT: fmul z1.d, z1.d, z3.d518; CHECK-NEXT: uzp2 z3.d, z1.d, z2.d519; CHECK-NEXT: uzp1 z1.d, z1.d, z2.d520; CHECK-NEXT: fmul z1.d, z1.d, z3.d521; CHECK-NEXT: uzp2 z3.d, z1.d, z2.d522; CHECK-NEXT: uzp1 z1.d, z1.d, z2.d523; CHECK-NEXT: fmul z1.d, z1.d, z3.d524; CHECK-NEXT: fmul d0, d0, d1525; CHECK-NEXT: ret526 %res = call fast double @llvm.vector.reduce.fmul.nxv2f64(double %init, <vscale x 2 x double> %a)527 ret double %res528}529 530declare half @llvm.vector.reduce.fadd.nxv2f16(half, <vscale x 2 x half>)531declare half @llvm.vector.reduce.fadd.nxv4f16(half, <vscale x 4 x half>)532declare half @llvm.vector.reduce.fadd.nxv8f16(half, <vscale x 8 x half>)533declare float @llvm.vector.reduce.fadd.nxv2f32(float, <vscale x 2 x float>)534declare float @llvm.vector.reduce.fadd.nxv4f32(float, <vscale x 4 x float>)535declare float @llvm.vector.reduce.fadd.nxv8f32(float, <vscale x 8 x float>)536declare double @llvm.vector.reduce.fadd.nxv2f64(double, <vscale x 2 x double>)537 538declare half @llvm.vector.reduce.fmax.nxv2f16(<vscale x 2 x half>)539declare half @llvm.vector.reduce.fmax.nxv4f16(<vscale x 4 x half>)540declare half @llvm.vector.reduce.fmax.nxv8f16(<vscale x 8 x half>)541declare float @llvm.vector.reduce.fmax.nxv2f32(<vscale x 2 x float>)542declare float @llvm.vector.reduce.fmax.nxv4f32(<vscale x 4 x float>)543declare double @llvm.vector.reduce.fmax.nxv2f64(<vscale x 2 x double>)544 545declare half @llvm.vector.reduce.fmin.nxv2f16(<vscale x 2 x half>)546declare half @llvm.vector.reduce.fmin.nxv4f16(<vscale x 4 x half>)547declare half @llvm.vector.reduce.fmin.nxv8f16(<vscale x 8 x half>)548declare float @llvm.vector.reduce.fmin.nxv2f32(<vscale x 2 x float>)549declare float @llvm.vector.reduce.fmin.nxv4f32(<vscale x 4 x float>)550declare double @llvm.vector.reduce.fmin.nxv2f64(<vscale x 2 x double>)551 552declare half @llvm.vector.reduce.fmaximum.nxv2f16(<vscale x 2 x half>)553declare half @llvm.vector.reduce.fmaximum.nxv4f16(<vscale x 4 x half>)554declare half @llvm.vector.reduce.fmaximum.nxv8f16(<vscale x 8 x half>)555declare float @llvm.vector.reduce.fmaximum.nxv2f32(<vscale x 2 x float>)556declare float @llvm.vector.reduce.fmaximum.nxv4f32(<vscale x 4 x float>)557declare double @llvm.vector.reduce.fmaximum.nxv2f64(<vscale x 2 x double>)558 559declare half @llvm.vector.reduce.fminimum.nxv2f16(<vscale x 2 x half>)560declare half @llvm.vector.reduce.fminimum.nxv4f16(<vscale x 4 x half>)561declare half @llvm.vector.reduce.fminimum.nxv8f16(<vscale x 8 x half>)562declare float @llvm.vector.reduce.fminimum.nxv2f32(<vscale x 2 x float>)563declare float @llvm.vector.reduce.fminimum.nxv4f32(<vscale x 4 x float>)564declare double @llvm.vector.reduce.fminimum.nxv2f64(<vscale x 2 x double>)565 566declare half @llvm.vector.reduce.fmul.nxv2f16(half, <vscale x 2 x half>)567declare half @llvm.vector.reduce.fmul.nxv4f16(half, <vscale x 4 x half>)568declare half @llvm.vector.reduce.fmul.nxv8f16(half, <vscale x 8 x half>)569declare float @llvm.vector.reduce.fmul.nxv2f32(float, <vscale x 2 x float>)570declare float @llvm.vector.reduce.fmul.nxv4f32(float, <vscale x 4 x float>)571declare double @llvm.vector.reduce.fmul.nxv2f64(double, <vscale x 2 x double>)572