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1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py2; RUN: llc -mtriple=aarch64--linux-gnu -mattr=+sve < %s | FileCheck %s3 4; fpext <vscale x 2 x half> -> <vscale x 2 x double>5define <vscale x 2 x double> @ext2_f16_f64(ptr %ptr, i64 %index) {6; CHECK-LABEL: ext2_f16_f64:7; CHECK: // %bb.0:8; CHECK-NEXT: ptrue p0.d9; CHECK-NEXT: ld1h { z0.d }, p0/z, [x0]10; CHECK-NEXT: fcvt z0.d, p0/m, z0.h11; CHECK-NEXT: ret12 %load = load <vscale x 2 x half>, ptr %ptr, align 413 %load.ext = fpext <vscale x 2 x half> %load to <vscale x 2 x double>14 ret <vscale x 2 x double> %load.ext15}16 17; fpext <vscale x 4 x half> -> <vscale x 4 x double>18define <vscale x 4 x double> @ext4_f16_f64(ptr %ptr, i64 %index) {19; CHECK-LABEL: ext4_f16_f64:20; CHECK: // %bb.0:21; CHECK-NEXT: ptrue p0.s22; CHECK-NEXT: ld1h { z0.s }, p0/z, [x0]23; CHECK-NEXT: ptrue p0.d24; CHECK-NEXT: uunpklo z1.d, z0.s25; CHECK-NEXT: uunpkhi z2.d, z0.s26; CHECK-NEXT: movprfx z0, z127; CHECK-NEXT: fcvt z0.d, p0/m, z1.h28; CHECK-NEXT: movprfx z1, z229; CHECK-NEXT: fcvt z1.d, p0/m, z2.h30; CHECK-NEXT: ret31 %load = load <vscale x 4 x half>, ptr %ptr, align 432 %load.ext = fpext <vscale x 4 x half> %load to <vscale x 4 x double>33 ret <vscale x 4 x double> %load.ext34}35 36; fpext <vscale x 8 x half> -> <vscale x 8 x double>37define <vscale x 8 x double> @ext8_f16_f64(ptr %ptr, i64 %index) {38; CHECK-LABEL: ext8_f16_f64:39; CHECK: // %bb.0:40; CHECK-NEXT: ldr z0, [x0]41; CHECK-NEXT: ptrue p0.d42; CHECK-NEXT: uunpklo z1.s, z0.h43; CHECK-NEXT: uunpkhi z0.s, z0.h44; CHECK-NEXT: uunpklo z2.d, z1.s45; CHECK-NEXT: uunpkhi z1.d, z1.s46; CHECK-NEXT: uunpklo z3.d, z0.s47; CHECK-NEXT: uunpkhi z4.d, z0.s48; CHECK-NEXT: fcvt z1.d, p0/m, z1.h49; CHECK-NEXT: movprfx z0, z250; CHECK-NEXT: fcvt z0.d, p0/m, z2.h51; CHECK-NEXT: movprfx z2, z352; CHECK-NEXT: fcvt z2.d, p0/m, z3.h53; CHECK-NEXT: movprfx z3, z454; CHECK-NEXT: fcvt z3.d, p0/m, z4.h55; CHECK-NEXT: ret56 %load = load <vscale x 8 x half>, ptr %ptr, align 457 %load.ext = fpext <vscale x 8 x half> %load to <vscale x 8 x double>58 ret <vscale x 8 x double> %load.ext59}60 61; fpext <vscale x 2 x float> -> <vscale x 2 x double>62define <vscale x 2 x double> @ext2_f32_f64(ptr %ptr, i64 %index) {63; CHECK-LABEL: ext2_f32_f64:64; CHECK: // %bb.0:65; CHECK-NEXT: ptrue p0.d66; CHECK-NEXT: ld1w { z0.d }, p0/z, [x0]67; CHECK-NEXT: fcvt z0.d, p0/m, z0.s68; CHECK-NEXT: ret69 %load = load <vscale x 2 x float>, ptr %ptr, align 470 %load.ext = fpext <vscale x 2 x float> %load to <vscale x 2 x double>71 ret <vscale x 2 x double> %load.ext72}73 74; fpext <vscale x 4 x float> -> <vscale x 4 x double>75define <vscale x 4 x double> @ext4_f32_f64(ptr %ptr, i64 %index) {76; CHECK-LABEL: ext4_f32_f64:77; CHECK: // %bb.0:78; CHECK-NEXT: ldr z0, [x0]79; CHECK-NEXT: ptrue p0.d80; CHECK-NEXT: uunpklo z1.d, z0.s81; CHECK-NEXT: uunpkhi z2.d, z0.s82; CHECK-NEXT: movprfx z0, z183; CHECK-NEXT: fcvt z0.d, p0/m, z1.s84; CHECK-NEXT: movprfx z1, z285; CHECK-NEXT: fcvt z1.d, p0/m, z2.s86; CHECK-NEXT: ret87 %load = load <vscale x 4 x float>, ptr %ptr, align 488 %load.ext = fpext <vscale x 4 x float> %load to <vscale x 4 x double>89 ret <vscale x 4 x double> %load.ext90}91