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1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py2; RUN: llc -mtriple=aarch64--linux-gnu -mattr=+sve < %s | FileCheck %s3 4define void @fptrunc2_f64_f32(ptr %dst, ptr %src) {5; CHECK-LABEL: fptrunc2_f64_f32:6; CHECK: // %bb.0: // %entry7; CHECK-NEXT: ldr z0, [x1]8; CHECK-NEXT: ptrue p0.d9; CHECK-NEXT: fcvt z0.s, p0/m, z0.d10; CHECK-NEXT: st1w { z0.d }, p0, [x0]11; CHECK-NEXT: ret12entry:13 %0 = load <vscale x 2 x double>, ptr %src, align 814 %1 = fptrunc <vscale x 2 x double> %0 to <vscale x 2 x float>15 store <vscale x 2 x float> %1, ptr %dst, align 416 ret void17}18 19define void @fptrunc2_f64_f16(ptr %dst, ptr %src) {20; CHECK-LABEL: fptrunc2_f64_f16:21; CHECK: // %bb.0: // %entry22; CHECK-NEXT: ldr z0, [x1]23; CHECK-NEXT: ptrue p0.d24; CHECK-NEXT: fcvt z0.h, p0/m, z0.d25; CHECK-NEXT: st1h { z0.d }, p0, [x0]26; CHECK-NEXT: ret27entry:28 %0 = load <vscale x 2 x double>, ptr %src, align 829 %1 = fptrunc <vscale x 2 x double> %0 to <vscale x 2 x half>30 store <vscale x 2 x half> %1, ptr %dst, align 231 ret void32}33 34define void @fptrunc4_f32_f16(ptr %dst, ptr %src) {35; CHECK-LABEL: fptrunc4_f32_f16:36; CHECK: // %bb.0: // %entry37; CHECK-NEXT: ldr z0, [x1]38; CHECK-NEXT: ptrue p0.s39; CHECK-NEXT: fcvt z0.h, p0/m, z0.s40; CHECK-NEXT: st1h { z0.s }, p0, [x0]41; CHECK-NEXT: ret42entry:43 %0 = load <vscale x 4 x float>, ptr %src, align 844 %1 = fptrunc <vscale x 4 x float> %0 to <vscale x 4 x half>45 store <vscale x 4 x half> %1, ptr %dst, align 246 ret void47}48 49define void @fptrunc2_f32_f16(ptr %dst, ptr %src) {50; CHECK-LABEL: fptrunc2_f32_f16:51; CHECK: // %bb.0: // %entry52; CHECK-NEXT: ptrue p0.d53; CHECK-NEXT: ld1w { z0.d }, p0/z, [x1]54; CHECK-NEXT: fcvt z0.h, p0/m, z0.s55; CHECK-NEXT: st1h { z0.d }, p0, [x0]56; CHECK-NEXT: ret57entry:58 %0 = load <vscale x 2 x float>, ptr %src, align 859 %1 = fptrunc <vscale x 2 x float> %0 to <vscale x 2 x half>60 store <vscale x 2 x half> %1, ptr %dst, align 261 ret void62}63 64define void @fptrunc8_f64_f16(ptr %dst, ptr %src) {65; CHECK-LABEL: fptrunc8_f64_f16:66; CHECK: // %bb.0: // %entry67; CHECK-NEXT: ldr z0, [x1, #3, mul vl]68; CHECK-NEXT: ldr z1, [x1]69; CHECK-NEXT: ptrue p0.d70; CHECK-NEXT: ldr z2, [x1, #1, mul vl]71; CHECK-NEXT: ldr z3, [x1, #2, mul vl]72; CHECK-NEXT: fcvt z0.h, p0/m, z0.d73; CHECK-NEXT: fcvt z1.h, p0/m, z1.d74; CHECK-NEXT: fcvt z3.h, p0/m, z3.d75; CHECK-NEXT: fcvt z2.h, p0/m, z2.d76; CHECK-NEXT: uzp1 z0.s, z3.s, z0.s77; CHECK-NEXT: uzp1 z1.s, z1.s, z2.s78; CHECK-NEXT: uzp1 z0.h, z1.h, z0.h79; CHECK-NEXT: str z0, [x0]80; CHECK-NEXT: ret81entry:82 %0 = load <vscale x 8 x double>, ptr %src, align 883 %1 = fptrunc <vscale x 8 x double> %0 to <vscale x 8 x half>84 store <vscale x 8 x half> %1, ptr %dst, align 285 ret void86}87