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1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py2; RUN: llc -mtriple=aarch64-linux-gnu -mattr=+sve,+bf16 < %s | FileCheck %s3 4;5; BFDOT6;7 8define <vscale x 4 x float> @bfdot_f32(<vscale x 4 x float> %a, <vscale x 8 x bfloat> %b, <vscale x 8 x bfloat> %c) nounwind {9; CHECK-LABEL: bfdot_f32:10; CHECK: // %bb.0:11; CHECK-NEXT: bfdot z0.s, z1.h, z2.h12; CHECK-NEXT: ret13 %out = call <vscale x 4 x float> @llvm.aarch64.sve.bfdot(<vscale x 4 x float> %a, <vscale x 8 x bfloat> %b, <vscale x 8 x bfloat> %c)14 ret <vscale x 4 x float> %out15}16 17define <vscale x 4 x float> @bfdot_lane_0_f32(<vscale x 4 x float> %a, <vscale x 8 x bfloat> %b, <vscale x 8 x bfloat> %c) nounwind {18; CHECK-LABEL: bfdot_lane_0_f32:19; CHECK: // %bb.0:20; CHECK-NEXT: bfdot z0.s, z1.h, z2.h[0]21; CHECK-NEXT: ret22 %out = call <vscale x 4 x float> @llvm.aarch64.sve.bfdot.lane.v2(<vscale x 4 x float> %a, <vscale x 8 x bfloat> %b, <vscale x 8 x bfloat> %c, i32 0)23 ret <vscale x 4 x float> %out24}25 26define <vscale x 4 x float> @bfdot_lane_1_f32(<vscale x 4 x float> %a, <vscale x 8 x bfloat> %b, <vscale x 8 x bfloat> %c) nounwind {27; CHECK-LABEL: bfdot_lane_1_f32:28; CHECK: // %bb.0:29; CHECK-NEXT: bfdot z0.s, z1.h, z2.h[1]30; CHECK-NEXT: ret31 %out = call <vscale x 4 x float> @llvm.aarch64.sve.bfdot.lane.v2(<vscale x 4 x float> %a, <vscale x 8 x bfloat> %b, <vscale x 8 x bfloat> %c, i32 1)32 ret <vscale x 4 x float> %out33}34 35define <vscale x 4 x float> @bfdot_lane_2_f32(<vscale x 4 x float> %a, <vscale x 8 x bfloat> %b, <vscale x 8 x bfloat> %c) nounwind {36; CHECK-LABEL: bfdot_lane_2_f32:37; CHECK: // %bb.0:38; CHECK-NEXT: bfdot z0.s, z1.h, z2.h[2]39; CHECK-NEXT: ret40 %out = call <vscale x 4 x float> @llvm.aarch64.sve.bfdot.lane.v2(<vscale x 4 x float> %a, <vscale x 8 x bfloat> %b, <vscale x 8 x bfloat> %c, i32 2)41 ret <vscale x 4 x float> %out42}43 44define <vscale x 4 x float> @bfdot_lane_3_f32(<vscale x 4 x float> %a, <vscale x 8 x bfloat> %b, <vscale x 8 x bfloat> %c) nounwind {45; CHECK-LABEL: bfdot_lane_3_f32:46; CHECK: // %bb.0:47; CHECK-NEXT: bfdot z0.s, z1.h, z2.h[3]48; CHECK-NEXT: ret49 %out = call <vscale x 4 x float> @llvm.aarch64.sve.bfdot.lane.v2(<vscale x 4 x float> %a, <vscale x 8 x bfloat> %b, <vscale x 8 x bfloat> %c, i32 3)50 ret <vscale x 4 x float> %out51}52 53;54; BFMLALB55;56 57define <vscale x 4 x float> @bfmlalb_f32(<vscale x 4 x float> %a, <vscale x 8 x bfloat> %b, <vscale x 8 x bfloat> %c) nounwind {58; CHECK-LABEL: bfmlalb_f32:59; CHECK: // %bb.0:60; CHECK-NEXT: bfmlalb z0.s, z1.h, z2.h61; CHECK-NEXT: ret62 %out = call <vscale x 4 x float> @llvm.aarch64.sve.bfmlalb(<vscale x 4 x float> %a, <vscale x 8 x bfloat> %b, <vscale x 8 x bfloat> %c)63 ret <vscale x 4 x float> %out64}65 66define <vscale x 4 x float> @bfmlalb_lane_0_f32(<vscale x 4 x float> %a, <vscale x 8 x bfloat> %b, <vscale x 8 x bfloat> %c) nounwind {67; CHECK-LABEL: bfmlalb_lane_0_f32:68; CHECK: // %bb.0:69; CHECK-NEXT: bfmlalb z0.s, z1.h, z2.h[0]70; CHECK-NEXT: ret71 %out = call <vscale x 4 x float> @llvm.aarch64.sve.bfmlalb.lane.v2(<vscale x 4 x float> %a, <vscale x 8 x bfloat> %b, <vscale x 8 x bfloat> %c, i32 0)72 ret <vscale x 4 x float> %out73}74 75define <vscale x 4 x float> @bfmlalb_lane_1_f32(<vscale x 4 x float> %a, <vscale x 8 x bfloat> %b, <vscale x 8 x bfloat> %c) nounwind {76; CHECK-LABEL: bfmlalb_lane_1_f32:77; CHECK: // %bb.0:78; CHECK-NEXT: bfmlalb z0.s, z1.h, z2.h[1]79; CHECK-NEXT: ret80 %out = call <vscale x 4 x float> @llvm.aarch64.sve.bfmlalb.lane.v2(<vscale x 4 x float> %a, <vscale x 8 x bfloat> %b, <vscale x 8 x bfloat> %c, i32 1)81 ret <vscale x 4 x float> %out82}83 84define <vscale x 4 x float> @bfmlalb_lane_2_f32(<vscale x 4 x float> %a, <vscale x 8 x bfloat> %b, <vscale x 8 x bfloat> %c) nounwind {85; CHECK-LABEL: bfmlalb_lane_2_f32:86; CHECK: // %bb.0:87; CHECK-NEXT: bfmlalb z0.s, z1.h, z2.h[2]88; CHECK-NEXT: ret89 %out = call <vscale x 4 x float> @llvm.aarch64.sve.bfmlalb.lane.v2(<vscale x 4 x float> %a, <vscale x 8 x bfloat> %b, <vscale x 8 x bfloat> %c, i32 2)90 ret <vscale x 4 x float> %out91}92 93define <vscale x 4 x float> @bfmlalb_lane_3_f32(<vscale x 4 x float> %a, <vscale x 8 x bfloat> %b, <vscale x 8 x bfloat> %c) nounwind {94; CHECK-LABEL: bfmlalb_lane_3_f32:95; CHECK: // %bb.0:96; CHECK-NEXT: bfmlalb z0.s, z1.h, z2.h[3]97; CHECK-NEXT: ret98 %out = call <vscale x 4 x float> @llvm.aarch64.sve.bfmlalb.lane.v2(<vscale x 4 x float> %a, <vscale x 8 x bfloat> %b, <vscale x 8 x bfloat> %c, i32 3)99 ret <vscale x 4 x float> %out100}101 102define <vscale x 4 x float> @bfmlalb_lane_4_f32(<vscale x 4 x float> %a, <vscale x 8 x bfloat> %b, <vscale x 8 x bfloat> %c) nounwind {103; CHECK-LABEL: bfmlalb_lane_4_f32:104; CHECK: // %bb.0:105; CHECK-NEXT: bfmlalb z0.s, z1.h, z2.h[4]106; CHECK-NEXT: ret107 %out = call <vscale x 4 x float> @llvm.aarch64.sve.bfmlalb.lane.v2(<vscale x 4 x float> %a, <vscale x 8 x bfloat> %b, <vscale x 8 x bfloat> %c, i32 4)108 ret <vscale x 4 x float> %out109}110 111define <vscale x 4 x float> @bfmlalb_lane_5_f32(<vscale x 4 x float> %a, <vscale x 8 x bfloat> %b, <vscale x 8 x bfloat> %c) nounwind {112; CHECK-LABEL: bfmlalb_lane_5_f32:113; CHECK: // %bb.0:114; CHECK-NEXT: bfmlalb z0.s, z1.h, z2.h[5]115; CHECK-NEXT: ret116 %out = call <vscale x 4 x float> @llvm.aarch64.sve.bfmlalb.lane.v2(<vscale x 4 x float> %a, <vscale x 8 x bfloat> %b, <vscale x 8 x bfloat> %c, i32 5)117 ret <vscale x 4 x float> %out118}119 120define <vscale x 4 x float> @bfmlalb_lane_6_f32(<vscale x 4 x float> %a, <vscale x 8 x bfloat> %b, <vscale x 8 x bfloat> %c) nounwind {121; CHECK-LABEL: bfmlalb_lane_6_f32:122; CHECK: // %bb.0:123; CHECK-NEXT: bfmlalb z0.s, z1.h, z2.h[6]124; CHECK-NEXT: ret125 %out = call <vscale x 4 x float> @llvm.aarch64.sve.bfmlalb.lane.v2(<vscale x 4 x float> %a, <vscale x 8 x bfloat> %b, <vscale x 8 x bfloat> %c, i32 6)126 ret <vscale x 4 x float> %out127}128 129define <vscale x 4 x float> @bfmlalb_lane_7_f32(<vscale x 4 x float> %a, <vscale x 8 x bfloat> %b, <vscale x 8 x bfloat> %c) nounwind {130; CHECK-LABEL: bfmlalb_lane_7_f32:131; CHECK: // %bb.0:132; CHECK-NEXT: bfmlalb z0.s, z1.h, z2.h[7]133; CHECK-NEXT: ret134 %out = call <vscale x 4 x float> @llvm.aarch64.sve.bfmlalb.lane.v2(<vscale x 4 x float> %a, <vscale x 8 x bfloat> %b, <vscale x 8 x bfloat> %c, i32 7)135 ret <vscale x 4 x float> %out136}137 138;139; BFMLALT140;141 142define <vscale x 4 x float> @bfmlalt_f32(<vscale x 4 x float> %a, <vscale x 8 x bfloat> %b, <vscale x 8 x bfloat> %c) nounwind {143; CHECK-LABEL: bfmlalt_f32:144; CHECK: // %bb.0:145; CHECK-NEXT: bfmlalt z0.s, z1.h, z2.h146; CHECK-NEXT: ret147 %out = call <vscale x 4 x float> @llvm.aarch64.sve.bfmlalt(<vscale x 4 x float> %a, <vscale x 8 x bfloat> %b, <vscale x 8 x bfloat> %c)148 ret <vscale x 4 x float> %out149}150 151define <vscale x 4 x float> @bfmlalt_lane_0_f32(<vscale x 4 x float> %a, <vscale x 8 x bfloat> %b, <vscale x 8 x bfloat> %c) nounwind {152; CHECK-LABEL: bfmlalt_lane_0_f32:153; CHECK: // %bb.0:154; CHECK-NEXT: bfmlalt z0.s, z1.h, z2.h[0]155; CHECK-NEXT: ret156 %out = call <vscale x 4 x float> @llvm.aarch64.sve.bfmlalt.lane.v2(<vscale x 4 x float> %a, <vscale x 8 x bfloat> %b, <vscale x 8 x bfloat> %c, i32 0)157 ret <vscale x 4 x float> %out158}159 160define <vscale x 4 x float> @bfmlalt_lane_1_f32(<vscale x 4 x float> %a, <vscale x 8 x bfloat> %b, <vscale x 8 x bfloat> %c) nounwind {161; CHECK-LABEL: bfmlalt_lane_1_f32:162; CHECK: // %bb.0:163; CHECK-NEXT: bfmlalt z0.s, z1.h, z2.h[1]164; CHECK-NEXT: ret165 %out = call <vscale x 4 x float> @llvm.aarch64.sve.bfmlalt.lane.v2(<vscale x 4 x float> %a, <vscale x 8 x bfloat> %b, <vscale x 8 x bfloat> %c, i32 1)166 ret <vscale x 4 x float> %out167}168 169define <vscale x 4 x float> @bfmlalt_lane_2_f32(<vscale x 4 x float> %a, <vscale x 8 x bfloat> %b, <vscale x 8 x bfloat> %c) nounwind {170; CHECK-LABEL: bfmlalt_lane_2_f32:171; CHECK: // %bb.0:172; CHECK-NEXT: bfmlalt z0.s, z1.h, z2.h[2]173; CHECK-NEXT: ret174 %out = call <vscale x 4 x float> @llvm.aarch64.sve.bfmlalt.lane.v2(<vscale x 4 x float> %a, <vscale x 8 x bfloat> %b, <vscale x 8 x bfloat> %c, i32 2)175 ret <vscale x 4 x float> %out176}177 178define <vscale x 4 x float> @bfmlalt_lane_3_f32(<vscale x 4 x float> %a, <vscale x 8 x bfloat> %b, <vscale x 8 x bfloat> %c) nounwind {179; CHECK-LABEL: bfmlalt_lane_3_f32:180; CHECK: // %bb.0:181; CHECK-NEXT: bfmlalt z0.s, z1.h, z2.h[3]182; CHECK-NEXT: ret183 %out = call <vscale x 4 x float> @llvm.aarch64.sve.bfmlalt.lane.v2(<vscale x 4 x float> %a, <vscale x 8 x bfloat> %b, <vscale x 8 x bfloat> %c, i32 3)184 ret <vscale x 4 x float> %out185}186 187define <vscale x 4 x float> @bfmlalt_lane_4_f32(<vscale x 4 x float> %a, <vscale x 8 x bfloat> %b, <vscale x 8 x bfloat> %c) nounwind {188; CHECK-LABEL: bfmlalt_lane_4_f32:189; CHECK: // %bb.0:190; CHECK-NEXT: bfmlalt z0.s, z1.h, z2.h[4]191; CHECK-NEXT: ret192 %out = call <vscale x 4 x float> @llvm.aarch64.sve.bfmlalt.lane.v2(<vscale x 4 x float> %a, <vscale x 8 x bfloat> %b, <vscale x 8 x bfloat> %c, i32 4)193 ret <vscale x 4 x float> %out194}195 196define <vscale x 4 x float> @bfmlalt_lane_5_f32(<vscale x 4 x float> %a, <vscale x 8 x bfloat> %b, <vscale x 8 x bfloat> %c) nounwind {197; CHECK-LABEL: bfmlalt_lane_5_f32:198; CHECK: // %bb.0:199; CHECK-NEXT: bfmlalt z0.s, z1.h, z2.h[5]200; CHECK-NEXT: ret201 %out = call <vscale x 4 x float> @llvm.aarch64.sve.bfmlalt.lane.v2(<vscale x 4 x float> %a, <vscale x 8 x bfloat> %b, <vscale x 8 x bfloat> %c, i32 5)202 ret <vscale x 4 x float> %out203}204 205define <vscale x 4 x float> @bfmlalt_lane_6_f32(<vscale x 4 x float> %a, <vscale x 8 x bfloat> %b, <vscale x 8 x bfloat> %c) nounwind {206; CHECK-LABEL: bfmlalt_lane_6_f32:207; CHECK: // %bb.0:208; CHECK-NEXT: bfmlalt z0.s, z1.h, z2.h[6]209; CHECK-NEXT: ret210 %out = call <vscale x 4 x float> @llvm.aarch64.sve.bfmlalt.lane.v2(<vscale x 4 x float> %a, <vscale x 8 x bfloat> %b, <vscale x 8 x bfloat> %c, i32 6)211 ret <vscale x 4 x float> %out212}213 214define <vscale x 4 x float> @bfmlalt_lane_7_f32(<vscale x 4 x float> %a, <vscale x 8 x bfloat> %b, <vscale x 8 x bfloat> %c) nounwind {215; CHECK-LABEL: bfmlalt_lane_7_f32:216; CHECK: // %bb.0:217; CHECK-NEXT: bfmlalt z0.s, z1.h, z2.h[7]218; CHECK-NEXT: ret219 %out = call <vscale x 4 x float> @llvm.aarch64.sve.bfmlalt.lane.v2(<vscale x 4 x float> %a, <vscale x 8 x bfloat> %b, <vscale x 8 x bfloat> %c, i32 7)220 ret <vscale x 4 x float> %out221}222 223;224; BFMMLA225;226 227define <vscale x 4 x float> @bfmmla_f32(<vscale x 4 x float> %a, <vscale x 8 x bfloat> %b, <vscale x 8 x bfloat> %c) nounwind {228; CHECK-LABEL: bfmmla_f32:229; CHECK: // %bb.0:230; CHECK-NEXT: bfmmla z0.s, z1.h, z2.h231; CHECK-NEXT: ret232 %out = call <vscale x 4 x float> @llvm.aarch64.sve.bfmmla(<vscale x 4 x float> %a, <vscale x 8 x bfloat> %b, <vscale x 8 x bfloat> %c)233 ret <vscale x 4 x float> %out234}235 236;237; BFCVT238;239 240define <vscale x 8 x bfloat> @fcvt_bf16_f32(<vscale x 8 x bfloat> %a, <vscale x 4 x i1> %pg, <vscale x 4 x float> %b) nounwind {241; CHECK-LABEL: fcvt_bf16_f32:242; CHECK: // %bb.0:243; CHECK-NEXT: bfcvt z0.h, p0/m, z1.s244; CHECK-NEXT: ret245 %out = call <vscale x 8 x bfloat> @llvm.aarch64.sve.fcvt.bf16f32.v2(<vscale x 8 x bfloat> %a, <vscale x 4 x i1> %pg, <vscale x 4 x float> %b)246 ret <vscale x 8 x bfloat> %out247}248 249define <vscale x 8 x bfloat> @fcvt_bf16_f32_deprecated(<vscale x 8 x bfloat> %a, <vscale x 8 x i1> %pg, <vscale x 4 x float> %b) nounwind {250; CHECK-LABEL: fcvt_bf16_f32_deprecated:251; CHECK: // %bb.0:252; CHECK-NEXT: bfcvt z0.h, p0/m, z1.s253; CHECK-NEXT: ret254 %out = call <vscale x 8 x bfloat> @llvm.aarch64.sve.fcvt.bf16f32(<vscale x 8 x bfloat> %a, <vscale x 8 x i1> %pg, <vscale x 4 x float> %b)255 ret <vscale x 8 x bfloat> %out256}257 258;259; BFCVTNT260;261 262define <vscale x 8 x bfloat> @fcvtnt_bf16_f32(<vscale x 8 x bfloat> %a, <vscale x 4 x i1> %pg, <vscale x 4 x float> %b) nounwind {263; CHECK-LABEL: fcvtnt_bf16_f32:264; CHECK: // %bb.0:265; CHECK-NEXT: bfcvtnt z0.h, p0/m, z1.s266; CHECK-NEXT: ret267 %out = call <vscale x 8 x bfloat> @llvm.aarch64.sve.fcvtnt.bf16f32.v2(<vscale x 8 x bfloat> %a, <vscale x 4 x i1> %pg, <vscale x 4 x float> %b)268 ret <vscale x 8 x bfloat> %out269}270 271define <vscale x 8 x bfloat> @fcvtnt_bf16_f32_deprecated(<vscale x 8 x bfloat> %a, <vscale x 8 x i1> %pg, <vscale x 4 x float> %b) nounwind {272; CHECK-LABEL: fcvtnt_bf16_f32_deprecated:273; CHECK: // %bb.0:274; CHECK-NEXT: bfcvtnt z0.h, p0/m, z1.s275; CHECK-NEXT: ret276 %out = call <vscale x 8 x bfloat> @llvm.aarch64.sve.fcvtnt.bf16f32(<vscale x 8 x bfloat> %a, <vscale x 8 x i1> %pg, <vscale x 4 x float> %b)277 ret <vscale x 8 x bfloat> %out278}279 280declare <vscale x 4 x float> @llvm.aarch64.sve.bfdot(<vscale x 4 x float>, <vscale x 8 x bfloat>, <vscale x 8 x bfloat>)281declare <vscale x 4 x float> @llvm.aarch64.sve.bfdot.lane.v2(<vscale x 4 x float>, <vscale x 8 x bfloat>, <vscale x 8 x bfloat>, i32)282declare <vscale x 4 x float> @llvm.aarch64.sve.bfmlalb(<vscale x 4 x float>, <vscale x 8 x bfloat>, <vscale x 8 x bfloat>)283declare <vscale x 4 x float> @llvm.aarch64.sve.bfmlalb.lane.v2(<vscale x 4 x float>, <vscale x 8 x bfloat>, <vscale x 8 x bfloat>, i32)284declare <vscale x 4 x float> @llvm.aarch64.sve.bfmlalt(<vscale x 4 x float>, <vscale x 8 x bfloat>, <vscale x 8 x bfloat>)285declare <vscale x 4 x float> @llvm.aarch64.sve.bfmlalt.lane.v2(<vscale x 4 x float>, <vscale x 8 x bfloat>, <vscale x 8 x bfloat>, i32)286declare <vscale x 4 x float> @llvm.aarch64.sve.bfmmla(<vscale x 4 x float>, <vscale x 8 x bfloat>, <vscale x 8 x bfloat>)287declare <vscale x 8 x bfloat> @llvm.aarch64.sve.fcvt.bf16f32(<vscale x 8 x bfloat>, <vscale x 8 x i1>, <vscale x 4 x float>)288declare <vscale x 8 x bfloat> @llvm.aarch64.sve.fcvt.bf16f32.v2(<vscale x 8 x bfloat>, <vscale x 4 x i1>, <vscale x 4 x float>)289declare <vscale x 8 x bfloat> @llvm.aarch64.sve.fcvtnt.bf16f32(<vscale x 8 x bfloat>, <vscale x 8 x i1>, <vscale x 4 x float>)290declare <vscale x 8 x bfloat> @llvm.aarch64.sve.fcvtnt.bf16f32.v2(<vscale x 8 x bfloat>, <vscale x 4 x i1>, <vscale x 4 x float>)291