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1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py2; RUN: llc -mtriple=aarch64-linux-gnu -mattr=+sve -verify-machineinstrs < %s | FileCheck %s3 4;5; LDFF1H, LDFF1W, LDFF1D: base + 64-bit scaled offset6; e.g. ldff1h z0.d, p0/z, [x0, z0.d, lsl #1]7;8 9define <vscale x 2 x i64> @gldff1h_index(<vscale x 2 x i1> %pg, ptr %base, <vscale x 2 x i64> %b) {10; CHECK-LABEL: gldff1h_index:11; CHECK: // %bb.0:12; CHECK-NEXT: ldff1h { z0.d }, p0/z, [x0, z0.d, lsl #1]13; CHECK-NEXT: ret14 %load = call <vscale x 2 x i16> @llvm.aarch64.sve.ldff1.gather.index.nxv2i16(<vscale x 2 x i1> %pg,15 ptr %base,16 <vscale x 2 x i64> %b)17 %res = zext <vscale x 2 x i16> %load to <vscale x 2 x i64>18 ret <vscale x 2 x i64> %res19}20 21define <vscale x 2 x i64> @gldff1w_index(<vscale x 2 x i1> %pg, ptr %base, <vscale x 2 x i64> %b) {22; CHECK-LABEL: gldff1w_index:23; CHECK: // %bb.0:24; CHECK-NEXT: ldff1w { z0.d }, p0/z, [x0, z0.d, lsl #2]25; CHECK-NEXT: ret26 %load = call <vscale x 2 x i32> @llvm.aarch64.sve.ldff1.gather.index.nxv2i32(<vscale x 2 x i1> %pg,27 ptr %base,28 <vscale x 2 x i64> %b)29 %res = zext <vscale x 2 x i32> %load to <vscale x 2 x i64>30 ret <vscale x 2 x i64> %res31}32 33define <vscale x 2 x i64> @gldff1d_index(<vscale x 2 x i1> %pg, ptr %base, <vscale x 2 x i64> %b) {34; CHECK-LABEL: gldff1d_index:35; CHECK: // %bb.0:36; CHECK-NEXT: ldff1d { z0.d }, p0/z, [x0, z0.d, lsl #3]37; CHECK-NEXT: ret38 %load = call <vscale x 2 x i64> @llvm.aarch64.sve.ldff1.gather.index.nxv2i64(<vscale x 2 x i1> %pg,39 ptr %base,40 <vscale x 2 x i64> %b)41 ret <vscale x 2 x i64> %load42}43 44define <vscale x 2 x double> @gldff1d_index_double(<vscale x 2 x i1> %pg, ptr %base, <vscale x 2 x i64> %b) {45; CHECK-LABEL: gldff1d_index_double:46; CHECK: // %bb.0:47; CHECK-NEXT: ldff1d { z0.d }, p0/z, [x0, z0.d, lsl #3]48; CHECK-NEXT: ret49 %load = call <vscale x 2 x double> @llvm.aarch64.sve.ldff1.gather.index.nxv2f64(<vscale x 2 x i1> %pg,50 ptr %base,51 <vscale x 2 x i64> %b)52 ret <vscale x 2 x double> %load53}54 55;56; LDFF1SH, LDFF1SW: base + 64-bit scaled offset57; e.g. ldff1sh z0.d, p0/z, [x0, z0.d, lsl #1]58;59 60define <vscale x 2 x i64> @gldff1sh_index(<vscale x 2 x i1> %pg, ptr %base, <vscale x 2 x i64> %b) {61; CHECK-LABEL: gldff1sh_index:62; CHECK: // %bb.0:63; CHECK-NEXT: ldff1sh { z0.d }, p0/z, [x0, z0.d, lsl #1]64; CHECK-NEXT: ret65 %load = call <vscale x 2 x i16> @llvm.aarch64.sve.ldff1.gather.index.nxv2i16(<vscale x 2 x i1> %pg,66 ptr %base,67 <vscale x 2 x i64> %b)68 %res = sext <vscale x 2 x i16> %load to <vscale x 2 x i64>69 ret <vscale x 2 x i64> %res70}71 72define <vscale x 2 x i64> @gldff1sw_index(<vscale x 2 x i1> %pg, ptr %base, <vscale x 2 x i64> %b) {73; CHECK-LABEL: gldff1sw_index:74; CHECK: // %bb.0:75; CHECK-NEXT: ldff1sw { z0.d }, p0/z, [x0, z0.d, lsl #2]76; CHECK-NEXT: ret77 %load = call <vscale x 2 x i32> @llvm.aarch64.sve.ldff1.gather.index.nxv2i32(<vscale x 2 x i1> %pg,78 ptr %base,79 <vscale x 2 x i64> %b)80 %res = sext <vscale x 2 x i32> %load to <vscale x 2 x i64>81 ret <vscale x 2 x i64> %res82}83 84declare <vscale x 2 x i16> @llvm.aarch64.sve.ldff1.gather.index.nxv2i16(<vscale x 2 x i1>, ptr, <vscale x 2 x i64>)85declare <vscale x 2 x i32> @llvm.aarch64.sve.ldff1.gather.index.nxv2i32(<vscale x 2 x i1>, ptr, <vscale x 2 x i64>)86declare <vscale x 2 x i64> @llvm.aarch64.sve.ldff1.gather.index.nxv2i64(<vscale x 2 x i1>, ptr, <vscale x 2 x i64>)87declare <vscale x 2 x double> @llvm.aarch64.sve.ldff1.gather.index.nxv2f64(<vscale x 2 x i1>, ptr, <vscale x 2 x i64>)88