113 lines · plain
1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py2; RUN: llc -mtriple=aarch64-linux-gnu -mattr=+sve -verify-machineinstrs < %s | FileCheck %s3 4;5; LDFF1B, LDFF1W, LDFF1H, LDFF1D: base + 64-bit unscaled offset6; e.g. ldff1h { z0.d }, p0/z, [x0, z0.d]7;8 9define <vscale x 2 x i64> @gldff1b_d(<vscale x 2 x i1> %pg, ptr %base, <vscale x 2 x i64> %b) {10; CHECK-LABEL: gldff1b_d:11; CHECK: // %bb.0:12; CHECK-NEXT: ldff1b { z0.d }, p0/z, [x0, z0.d]13; CHECK-NEXT: ret14 %load = call <vscale x 2 x i8> @llvm.aarch64.sve.ldff1.gather.nxv2i8(<vscale x 2 x i1> %pg,15 ptr %base,16 <vscale x 2 x i64> %b)17 %res = zext <vscale x 2 x i8> %load to <vscale x 2 x i64>18 ret <vscale x 2 x i64> %res19}20 21define <vscale x 2 x i64> @gldff1h_d(<vscale x 2 x i1> %pg, ptr %base, <vscale x 2 x i64> %b) {22; CHECK-LABEL: gldff1h_d:23; CHECK: // %bb.0:24; CHECK-NEXT: ldff1h { z0.d }, p0/z, [x0, z0.d]25; CHECK-NEXT: ret26 %load = call <vscale x 2 x i16> @llvm.aarch64.sve.ldff1.gather.nxv2i16(<vscale x 2 x i1> %pg,27 ptr %base,28 <vscale x 2 x i64> %b)29 %res = zext <vscale x 2 x i16> %load to <vscale x 2 x i64>30 ret <vscale x 2 x i64> %res31}32 33define <vscale x 2 x i64> @gldff1w_d(<vscale x 2 x i1> %pg, ptr %base, <vscale x 2 x i64> %offsets) {34; CHECK-LABEL: gldff1w_d:35; CHECK: // %bb.0:36; CHECK-NEXT: ldff1w { z0.d }, p0/z, [x0, z0.d]37; CHECK-NEXT: ret38 %load = call <vscale x 2 x i32> @llvm.aarch64.sve.ldff1.gather.nxv2i32(<vscale x 2 x i1> %pg,39 ptr %base,40 <vscale x 2 x i64> %offsets)41 %res = zext <vscale x 2 x i32> %load to <vscale x 2 x i64>42 ret <vscale x 2 x i64> %res43}44 45define <vscale x 2 x i64> @gldff1d_d(<vscale x 2 x i1> %pg, ptr %base, <vscale x 2 x i64> %b) {46; CHECK-LABEL: gldff1d_d:47; CHECK: // %bb.0:48; CHECK-NEXT: ldff1d { z0.d }, p0/z, [x0, z0.d]49; CHECK-NEXT: ret50 %load = call <vscale x 2 x i64> @llvm.aarch64.sve.ldff1.gather.nxv2i64(<vscale x 2 x i1> %pg,51 ptr %base,52 <vscale x 2 x i64> %b)53 ret <vscale x 2 x i64> %load54}55 56define <vscale x 2 x double> @gldff1d_d_double(<vscale x 2 x i1> %pg, ptr %base, <vscale x 2 x i64> %b) {57; CHECK-LABEL: gldff1d_d_double:58; CHECK: // %bb.0:59; CHECK-NEXT: ldff1d { z0.d }, p0/z, [x0, z0.d]60; CHECK-NEXT: ret61 %load = call <vscale x 2 x double> @llvm.aarch64.sve.ldff1.gather.nxv2f64(<vscale x 2 x i1> %pg,62 ptr %base,63 <vscale x 2 x i64> %b)64 ret <vscale x 2 x double> %load65}66 67;68; LDFF1SB, LDFF1SW, LDFF1SH: base + 64-bit unscaled offset69; e.g. ldff1sh { z0.d }, p0/z, [x0, z0.d]70;71 72define <vscale x 2 x i64> @gldff1sb_d(<vscale x 2 x i1> %pg, ptr %base, <vscale x 2 x i64> %b) {73; CHECK-LABEL: gldff1sb_d:74; CHECK: // %bb.0:75; CHECK-NEXT: ldff1sb { z0.d }, p0/z, [x0, z0.d]76; CHECK-NEXT: ret77 %load = call <vscale x 2 x i8> @llvm.aarch64.sve.ldff1.gather.nxv2i8(<vscale x 2 x i1> %pg,78 ptr %base,79 <vscale x 2 x i64> %b)80 %res = sext <vscale x 2 x i8> %load to <vscale x 2 x i64>81 ret <vscale x 2 x i64> %res82}83 84define <vscale x 2 x i64> @gldff1sh_d(<vscale x 2 x i1> %pg, ptr %base, <vscale x 2 x i64> %b) {85; CHECK-LABEL: gldff1sh_d:86; CHECK: // %bb.0:87; CHECK-NEXT: ldff1sh { z0.d }, p0/z, [x0, z0.d]88; CHECK-NEXT: ret89 %load = call <vscale x 2 x i16> @llvm.aarch64.sve.ldff1.gather.nxv2i16(<vscale x 2 x i1> %pg,90 ptr %base,91 <vscale x 2 x i64> %b)92 %res = sext <vscale x 2 x i16> %load to <vscale x 2 x i64>93 ret <vscale x 2 x i64> %res94}95 96define <vscale x 2 x i64> @gldff1sw_d(<vscale x 2 x i1> %pg, ptr %base, <vscale x 2 x i64> %offsets) {97; CHECK-LABEL: gldff1sw_d:98; CHECK: // %bb.0:99; CHECK-NEXT: ldff1sw { z0.d }, p0/z, [x0, z0.d]100; CHECK-NEXT: ret101 %load = call <vscale x 2 x i32> @llvm.aarch64.sve.ldff1.gather.nxv2i32(<vscale x 2 x i1> %pg,102 ptr %base,103 <vscale x 2 x i64> %offsets)104 %res = sext <vscale x 2 x i32> %load to <vscale x 2 x i64>105 ret <vscale x 2 x i64> %res106}107 108declare <vscale x 2 x i8> @llvm.aarch64.sve.ldff1.gather.nxv2i8(<vscale x 2 x i1>, ptr, <vscale x 2 x i64>)109declare <vscale x 2 x i16> @llvm.aarch64.sve.ldff1.gather.nxv2i16(<vscale x 2 x i1>, ptr, <vscale x 2 x i64>)110declare <vscale x 2 x i32> @llvm.aarch64.sve.ldff1.gather.nxv2i32(<vscale x 2 x i1>, ptr, <vscale x 2 x i64>)111declare <vscale x 2 x i64> @llvm.aarch64.sve.ldff1.gather.nxv2i64(<vscale x 2 x i1>, ptr, <vscale x 2 x i64>)112declare <vscale x 2 x double> @llvm.aarch64.sve.ldff1.gather.nxv2f64(<vscale x 2 x i1>, ptr, <vscale x 2 x i64>)113