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1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py2; RUN: llc < %s | FileCheck %s3 4target triple = "aarch64-unknown-linux-gnu"5 6define <vscale x 8 x half> @fadd_h_immhalf(<vscale x 8 x i1> %pg, <vscale x 8 x half> %a) #0 {7; CHECK-LABEL: fadd_h_immhalf:8; CHECK: // %bb.0:9; CHECK-NEXT: fadd z0.h, p0/m, z0.h, #0.510; CHECK-NEXT: ret11 %out = call <vscale x 8 x half> @llvm.aarch64.sve.fadd.nxv8f16(<vscale x 8 x i1> %pg,12 <vscale x 8 x half> %a,13 <vscale x 8 x half> splat(half 0.500000e+00))14 ret <vscale x 8 x half> %out15}16 17 18define <vscale x 8 x half> @fadd_h_immhalf_zero(<vscale x 8 x i1> %pg, <vscale x 8 x half> %a) #1 {19; CHECK-LABEL: fadd_h_immhalf_zero:20; CHECK: // %bb.0:21; CHECK-NEXT: movprfx z0.h, p0/z, z0.h22; CHECK-NEXT: fadd z0.h, p0/m, z0.h, #0.523; CHECK-NEXT: ret24 %a_z = select <vscale x 8 x i1> %pg, <vscale x 8 x half> %a, <vscale x 8 x half> zeroinitializer25 %out = call <vscale x 8 x half> @llvm.aarch64.sve.fadd.nxv8f16(<vscale x 8 x i1> %pg,26 <vscale x 8 x half> %a_z,27 <vscale x 8 x half> splat(half 0.500000e+00))28 ret <vscale x 8 x half> %out29}30 31define <vscale x 8 x half> @fadd_h_immone(<vscale x 8 x i1> %pg, <vscale x 8 x half> %a) #0 {32; CHECK-LABEL: fadd_h_immone:33; CHECK: // %bb.0:34; CHECK-NEXT: fadd z0.h, p0/m, z0.h, #1.035; CHECK-NEXT: ret36 %out = call <vscale x 8 x half> @llvm.aarch64.sve.fadd.nxv8f16(<vscale x 8 x i1> %pg,37 <vscale x 8 x half> %a,38 <vscale x 8 x half> splat(half 1.000000e+00))39 ret <vscale x 8 x half> %out40}41 42define <vscale x 8 x half> @fadd_h_immone_zero(<vscale x 8 x i1> %pg, <vscale x 8 x half> %a) #1 {43; CHECK-LABEL: fadd_h_immone_zero:44; CHECK: // %bb.0:45; CHECK-NEXT: movprfx z0.h, p0/z, z0.h46; CHECK-NEXT: fadd z0.h, p0/m, z0.h, #1.047; CHECK-NEXT: ret48 %a_z = select <vscale x 8 x i1> %pg, <vscale x 8 x half> %a, <vscale x 8 x half> zeroinitializer49 %out = call <vscale x 8 x half> @llvm.aarch64.sve.fadd.nxv8f16(<vscale x 8 x i1> %pg,50 <vscale x 8 x half> %a_z,51 <vscale x 8 x half> splat(half 1.000000e+00))52 ret <vscale x 8 x half> %out53}54 55define <vscale x 4 x float> @fadd_s_immhalf(<vscale x 4 x i1> %pg, <vscale x 4 x float> %a) #0 {56; CHECK-LABEL: fadd_s_immhalf:57; CHECK: // %bb.0:58; CHECK-NEXT: fadd z0.s, p0/m, z0.s, #0.559; CHECK-NEXT: ret60 %out = call <vscale x 4 x float> @llvm.aarch64.sve.fadd.nxv4f32(<vscale x 4 x i1> %pg,61 <vscale x 4 x float> %a,62 <vscale x 4 x float> splat(float 0.500000e+00))63 ret <vscale x 4 x float> %out64}65 66define <vscale x 4 x float> @fadd_s_immhalf_zero(<vscale x 4 x i1> %pg, <vscale x 4 x float> %a) #1 {67; CHECK-LABEL: fadd_s_immhalf_zero:68; CHECK: // %bb.0:69; CHECK-NEXT: movprfx z0.s, p0/z, z0.s70; CHECK-NEXT: fadd z0.s, p0/m, z0.s, #0.571; CHECK-NEXT: ret72 %a_z = select <vscale x 4 x i1> %pg, <vscale x 4 x float> %a, <vscale x 4 x float> zeroinitializer73 %out = call <vscale x 4 x float> @llvm.aarch64.sve.fadd.nxv4f32(<vscale x 4 x i1> %pg,74 <vscale x 4 x float> %a_z,75 <vscale x 4 x float> splat(float 0.500000e+00))76 ret <vscale x 4 x float> %out77}78 79define <vscale x 4 x float> @fadd_s_immone(<vscale x 4 x i1> %pg, <vscale x 4 x float> %a) #0 {80; CHECK-LABEL: fadd_s_immone:81; CHECK: // %bb.0:82; CHECK-NEXT: fadd z0.s, p0/m, z0.s, #1.083; CHECK-NEXT: ret84 %out = call <vscale x 4 x float> @llvm.aarch64.sve.fadd.nxv4f32(<vscale x 4 x i1> %pg,85 <vscale x 4 x float> %a,86 <vscale x 4 x float> splat(float 1.000000e+00))87 ret <vscale x 4 x float> %out88}89 90define <vscale x 4 x float> @fadd_s_immone_zero(<vscale x 4 x i1> %pg, <vscale x 4 x float> %a) #1 {91; CHECK-LABEL: fadd_s_immone_zero:92; CHECK: // %bb.0:93; CHECK-NEXT: movprfx z0.s, p0/z, z0.s94; CHECK-NEXT: fadd z0.s, p0/m, z0.s, #1.095; CHECK-NEXT: ret96 %a_z = select <vscale x 4 x i1> %pg, <vscale x 4 x float> %a, <vscale x 4 x float> zeroinitializer97 %out = call <vscale x 4 x float> @llvm.aarch64.sve.fadd.nxv4f32(<vscale x 4 x i1> %pg,98 <vscale x 4 x float> %a_z,99 <vscale x 4 x float> splat(float 1.000000e+00))100 ret <vscale x 4 x float> %out101}102 103define <vscale x 2 x double> @fadd_d_immhalf(<vscale x 2 x i1> %pg, <vscale x 2 x double> %a) #0 {104; CHECK-LABEL: fadd_d_immhalf:105; CHECK: // %bb.0:106; CHECK-NEXT: fadd z0.d, p0/m, z0.d, #0.5107; CHECK-NEXT: ret108 %out = call <vscale x 2 x double> @llvm.aarch64.sve.fadd.nxv2f64(<vscale x 2 x i1> %pg,109 <vscale x 2 x double> %a,110 <vscale x 2 x double> splat(double 0.500000e+00))111 ret <vscale x 2 x double> %out112}113 114define <vscale x 2 x double> @fadd_d_immhalf_zero(<vscale x 2 x i1> %pg, <vscale x 2 x double> %a) #1 {115; CHECK-LABEL: fadd_d_immhalf_zero:116; CHECK: // %bb.0:117; CHECK-NEXT: movprfx z0.d, p0/z, z0.d118; CHECK-NEXT: fadd z0.d, p0/m, z0.d, #0.5119; CHECK-NEXT: ret120 %a_z = select <vscale x 2 x i1> %pg, <vscale x 2 x double> %a, <vscale x 2 x double> zeroinitializer121 %out = call <vscale x 2 x double> @llvm.aarch64.sve.fadd.nxv2f64(<vscale x 2 x i1> %pg,122 <vscale x 2 x double> %a_z,123 <vscale x 2 x double> splat(double 0.500000e+00))124 ret <vscale x 2 x double> %out125}126 127define <vscale x 2 x double> @fadd_d_immone(<vscale x 2 x i1> %pg, <vscale x 2 x double> %a) #0 {128; CHECK-LABEL: fadd_d_immone:129; CHECK: // %bb.0:130; CHECK-NEXT: fadd z0.d, p0/m, z0.d, #1.0131; CHECK-NEXT: ret132 %out = call <vscale x 2 x double> @llvm.aarch64.sve.fadd.nxv2f64(<vscale x 2 x i1> %pg,133 <vscale x 2 x double> %a,134 <vscale x 2 x double> splat(double 1.000000e+00))135 ret <vscale x 2 x double> %out136}137 138define <vscale x 2 x double> @fadd_d_immone_zero(<vscale x 2 x i1> %pg, <vscale x 2 x double> %a) #1 {139; CHECK-LABEL: fadd_d_immone_zero:140; CHECK: // %bb.0:141; CHECK-NEXT: movprfx z0.d, p0/z, z0.d142; CHECK-NEXT: fadd z0.d, p0/m, z0.d, #1.0143; CHECK-NEXT: ret144 %a_z = select <vscale x 2 x i1> %pg, <vscale x 2 x double> %a, <vscale x 2 x double> zeroinitializer145 %out = call <vscale x 2 x double> @llvm.aarch64.sve.fadd.nxv2f64(<vscale x 2 x i1> %pg,146 <vscale x 2 x double> %a_z,147 <vscale x 2 x double> splat(double 1.000000e+00))148 ret <vscale x 2 x double> %out149}150 151define <vscale x 8 x half> @fmax_h_immzero(<vscale x 8 x i1> %pg, <vscale x 8 x half> %a) #0 {152; CHECK-LABEL: fmax_h_immzero:153; CHECK: // %bb.0:154; CHECK-NEXT: fmax z0.h, p0/m, z0.h, #0.0155; CHECK-NEXT: ret156 %out = call <vscale x 8 x half> @llvm.aarch64.sve.fmax.nxv8f16(<vscale x 8 x i1> %pg,157 <vscale x 8 x half> %a,158 <vscale x 8 x half> zeroinitializer)159 ret <vscale x 8 x half> %out160}161 162define <vscale x 8 x half> @fmax_h_immzero_zero(<vscale x 8 x i1> %pg, <vscale x 8 x half> %a) #1 {163; CHECK-LABEL: fmax_h_immzero_zero:164; CHECK: // %bb.0:165; CHECK-NEXT: movprfx z0.h, p0/z, z0.h166; CHECK-NEXT: fmax z0.h, p0/m, z0.h, #0.0167; CHECK-NEXT: ret168 %a_z = select <vscale x 8 x i1> %pg, <vscale x 8 x half> %a, <vscale x 8 x half> zeroinitializer169 %out = call <vscale x 8 x half> @llvm.aarch64.sve.fmax.nxv8f16(<vscale x 8 x i1> %pg,170 <vscale x 8 x half> %a_z,171 <vscale x 8 x half> zeroinitializer)172 ret <vscale x 8 x half> %out173}174 175define <vscale x 8 x half> @fmax_h_immone(<vscale x 8 x i1> %pg, <vscale x 8 x half> %a) #0 {176; CHECK-LABEL: fmax_h_immone:177; CHECK: // %bb.0:178; CHECK-NEXT: fmax z0.h, p0/m, z0.h, #1.0179; CHECK-NEXT: ret180 %out = call <vscale x 8 x half> @llvm.aarch64.sve.fmax.nxv8f16(<vscale x 8 x i1> %pg,181 <vscale x 8 x half> %a,182 <vscale x 8 x half> splat(half 1.000000e+00))183 ret <vscale x 8 x half> %out184}185 186define <vscale x 8 x half> @fmax_h_immone_zero(<vscale x 8 x i1> %pg, <vscale x 8 x half> %a) #1 {187; CHECK-LABEL: fmax_h_immone_zero:188; CHECK: // %bb.0:189; CHECK-NEXT: movprfx z0.h, p0/z, z0.h190; CHECK-NEXT: fmax z0.h, p0/m, z0.h, #1.0191; CHECK-NEXT: ret192 %a_z = select <vscale x 8 x i1> %pg, <vscale x 8 x half> %a, <vscale x 8 x half> zeroinitializer193 %out = call <vscale x 8 x half> @llvm.aarch64.sve.fmax.nxv8f16(<vscale x 8 x i1> %pg,194 <vscale x 8 x half> %a_z,195 <vscale x 8 x half> splat(half 1.000000e+00))196 ret <vscale x 8 x half> %out197}198 199define <vscale x 4 x float> @fmax_s_immzero(<vscale x 4 x i1> %pg, <vscale x 4 x float> %a) #0 {200; CHECK-LABEL: fmax_s_immzero:201; CHECK: // %bb.0:202; CHECK-NEXT: fmax z0.s, p0/m, z0.s, #0.0203; CHECK-NEXT: ret204 %out = call <vscale x 4 x float> @llvm.aarch64.sve.fmax.nxv4f32(<vscale x 4 x i1> %pg,205 <vscale x 4 x float> %a,206 <vscale x 4 x float> zeroinitializer)207 ret <vscale x 4 x float> %out208}209 210define <vscale x 4 x float> @fmax_s_immzero_zero(<vscale x 4 x i1> %pg, <vscale x 4 x float> %a) #1 {211; CHECK-LABEL: fmax_s_immzero_zero:212; CHECK: // %bb.0:213; CHECK-NEXT: movprfx z0.s, p0/z, z0.s214; CHECK-NEXT: fmax z0.s, p0/m, z0.s, #0.0215; CHECK-NEXT: ret216 %a_z = select <vscale x 4 x i1> %pg, <vscale x 4 x float> %a, <vscale x 4 x float> zeroinitializer217 %out = call <vscale x 4 x float> @llvm.aarch64.sve.fmax.nxv4f32(<vscale x 4 x i1> %pg,218 <vscale x 4 x float> %a_z,219 <vscale x 4 x float> zeroinitializer)220 ret <vscale x 4 x float> %out221}222 223define <vscale x 4 x float> @fmax_s_immone(<vscale x 4 x i1> %pg, <vscale x 4 x float> %a) #0 {224; CHECK-LABEL: fmax_s_immone:225; CHECK: // %bb.0:226; CHECK-NEXT: fmax z0.s, p0/m, z0.s, #1.0227; CHECK-NEXT: ret228 %out = call <vscale x 4 x float> @llvm.aarch64.sve.fmax.nxv4f32(<vscale x 4 x i1> %pg,229 <vscale x 4 x float> %a,230 <vscale x 4 x float> splat(float 1.000000e+00))231 ret <vscale x 4 x float> %out232}233 234define <vscale x 4 x float> @fmax_s_immone_zero(<vscale x 4 x i1> %pg, <vscale x 4 x float> %a) #1 {235; CHECK-LABEL: fmax_s_immone_zero:236; CHECK: // %bb.0:237; CHECK-NEXT: movprfx z0.s, p0/z, z0.s238; CHECK-NEXT: fmax z0.s, p0/m, z0.s, #1.0239; CHECK-NEXT: ret240 %a_z = select <vscale x 4 x i1> %pg, <vscale x 4 x float> %a, <vscale x 4 x float> zeroinitializer241 %out = call <vscale x 4 x float> @llvm.aarch64.sve.fmax.nxv4f32(<vscale x 4 x i1> %pg,242 <vscale x 4 x float> %a_z,243 <vscale x 4 x float> splat(float 1.000000e+00))244 ret <vscale x 4 x float> %out245}246 247define <vscale x 2 x double> @fmax_d_immzero(<vscale x 2 x i1> %pg, <vscale x 2 x double> %a) #0 {248; CHECK-LABEL: fmax_d_immzero:249; CHECK: // %bb.0:250; CHECK-NEXT: fmax z0.d, p0/m, z0.d, #0.0251; CHECK-NEXT: ret252 %out = call <vscale x 2 x double> @llvm.aarch64.sve.fmax.nxv2f64(<vscale x 2 x i1> %pg,253 <vscale x 2 x double> %a,254 <vscale x 2 x double> zeroinitializer)255 ret <vscale x 2 x double> %out256}257 258define <vscale x 2 x double> @fmax_d_immzero_zero(<vscale x 2 x i1> %pg, <vscale x 2 x double> %a) #1 {259; CHECK-LABEL: fmax_d_immzero_zero:260; CHECK: // %bb.0:261; CHECK-NEXT: movprfx z0.d, p0/z, z0.d262; CHECK-NEXT: fmax z0.d, p0/m, z0.d, #0.0263; CHECK-NEXT: ret264 %a_z = select <vscale x 2 x i1> %pg, <vscale x 2 x double> %a, <vscale x 2 x double> zeroinitializer265 %out = call <vscale x 2 x double> @llvm.aarch64.sve.fmax.nxv2f64(<vscale x 2 x i1> %pg,266 <vscale x 2 x double> %a_z,267 <vscale x 2 x double> zeroinitializer)268 ret <vscale x 2 x double> %out269}270 271define <vscale x 2 x double> @fmax_d_immone(<vscale x 2 x i1> %pg, <vscale x 2 x double> %a) #0 {272; CHECK-LABEL: fmax_d_immone:273; CHECK: // %bb.0:274; CHECK-NEXT: fmax z0.d, p0/m, z0.d, #1.0275; CHECK-NEXT: ret276 %out = call <vscale x 2 x double> @llvm.aarch64.sve.fmax.nxv2f64(<vscale x 2 x i1> %pg,277 <vscale x 2 x double> %a,278 <vscale x 2 x double> splat(double 1.000000e+00))279 ret <vscale x 2 x double> %out280}281 282define <vscale x 2 x double> @fmax_d_immone_zero(<vscale x 2 x i1> %pg, <vscale x 2 x double> %a) #1 {283; CHECK-LABEL: fmax_d_immone_zero:284; CHECK: // %bb.0:285; CHECK-NEXT: movprfx z0.d, p0/z, z0.d286; CHECK-NEXT: fmax z0.d, p0/m, z0.d, #1.0287; CHECK-NEXT: ret288 %a_z = select <vscale x 2 x i1> %pg, <vscale x 2 x double> %a, <vscale x 2 x double> zeroinitializer289 %out = call <vscale x 2 x double> @llvm.aarch64.sve.fmax.nxv2f64(<vscale x 2 x i1> %pg,290 <vscale x 2 x double> %a_z,291 <vscale x 2 x double> splat(double 1.000000e+00))292 ret <vscale x 2 x double> %out293}294 295define <vscale x 8 x half> @fmaxnm_h_immzero(<vscale x 8 x i1> %pg, <vscale x 8 x half> %a) #0 {296; CHECK-LABEL: fmaxnm_h_immzero:297; CHECK: // %bb.0:298; CHECK-NEXT: fmaxnm z0.h, p0/m, z0.h, #0.0299; CHECK-NEXT: ret300 %out = call <vscale x 8 x half> @llvm.aarch64.sve.fmaxnm.nxv8f16(<vscale x 8 x i1> %pg,301 <vscale x 8 x half> %a,302 <vscale x 8 x half> zeroinitializer)303 ret <vscale x 8 x half> %out304}305 306define <vscale x 8 x half> @fmaxnm_h_immzero_zero(<vscale x 8 x i1> %pg, <vscale x 8 x half> %a) #1 {307; CHECK-LABEL: fmaxnm_h_immzero_zero:308; CHECK: // %bb.0:309; CHECK-NEXT: movprfx z0.h, p0/z, z0.h310; CHECK-NEXT: fmaxnm z0.h, p0/m, z0.h, #0.0311; CHECK-NEXT: ret312 %a_z = select <vscale x 8 x i1> %pg, <vscale x 8 x half> %a, <vscale x 8 x half> zeroinitializer313 %out = call <vscale x 8 x half> @llvm.aarch64.sve.fmaxnm.nxv8f16(<vscale x 8 x i1> %pg,314 <vscale x 8 x half> %a_z,315 <vscale x 8 x half> zeroinitializer)316 ret <vscale x 8 x half> %out317}318 319define <vscale x 8 x half> @fmaxnm_h_immone(<vscale x 8 x i1> %pg, <vscale x 8 x half> %a) #0 {320; CHECK-LABEL: fmaxnm_h_immone:321; CHECK: // %bb.0:322; CHECK-NEXT: fmaxnm z0.h, p0/m, z0.h, #1.0323; CHECK-NEXT: ret324 %out = call <vscale x 8 x half> @llvm.aarch64.sve.fmaxnm.nxv8f16(<vscale x 8 x i1> %pg,325 <vscale x 8 x half> %a,326 <vscale x 8 x half> splat(half 1.000000e+00))327 ret <vscale x 8 x half> %out328}329 330define <vscale x 8 x half> @fmaxnm_h_immone_zero(<vscale x 8 x i1> %pg, <vscale x 8 x half> %a) #1 {331; CHECK-LABEL: fmaxnm_h_immone_zero:332; CHECK: // %bb.0:333; CHECK-NEXT: movprfx z0.h, p0/z, z0.h334; CHECK-NEXT: fmaxnm z0.h, p0/m, z0.h, #1.0335; CHECK-NEXT: ret336 %a_z = select <vscale x 8 x i1> %pg, <vscale x 8 x half> %a, <vscale x 8 x half> zeroinitializer337 %out = call <vscale x 8 x half> @llvm.aarch64.sve.fmaxnm.nxv8f16(<vscale x 8 x i1> %pg,338 <vscale x 8 x half> %a_z,339 <vscale x 8 x half> splat(half 1.000000e+00))340 ret <vscale x 8 x half> %out341}342 343define <vscale x 4 x float> @fmaxnm_s_immzero(<vscale x 4 x i1> %pg, <vscale x 4 x float> %a) #0 {344; CHECK-LABEL: fmaxnm_s_immzero:345; CHECK: // %bb.0:346; CHECK-NEXT: fmaxnm z0.s, p0/m, z0.s, #0.0347; CHECK-NEXT: ret348 %out = call <vscale x 4 x float> @llvm.aarch64.sve.fmaxnm.nxv4f32(<vscale x 4 x i1> %pg,349 <vscale x 4 x float> %a,350 <vscale x 4 x float> zeroinitializer)351 ret <vscale x 4 x float> %out352}353 354define <vscale x 4 x float> @fmaxnm_s_immzero_zero(<vscale x 4 x i1> %pg, <vscale x 4 x float> %a) #1 {355; CHECK-LABEL: fmaxnm_s_immzero_zero:356; CHECK: // %bb.0:357; CHECK-NEXT: movprfx z0.s, p0/z, z0.s358; CHECK-NEXT: fmaxnm z0.s, p0/m, z0.s, #0.0359; CHECK-NEXT: ret360 %a_z = select <vscale x 4 x i1> %pg, <vscale x 4 x float> %a, <vscale x 4 x float> zeroinitializer361 %out = call <vscale x 4 x float> @llvm.aarch64.sve.fmaxnm.nxv4f32(<vscale x 4 x i1> %pg,362 <vscale x 4 x float> %a_z,363 <vscale x 4 x float> zeroinitializer)364 ret <vscale x 4 x float> %out365}366 367define <vscale x 4 x float> @fmaxnm_s_immone(<vscale x 4 x i1> %pg, <vscale x 4 x float> %a) #0 {368; CHECK-LABEL: fmaxnm_s_immone:369; CHECK: // %bb.0:370; CHECK-NEXT: fmaxnm z0.s, p0/m, z0.s, #1.0371; CHECK-NEXT: ret372 %out = call <vscale x 4 x float> @llvm.aarch64.sve.fmaxnm.nxv4f32(<vscale x 4 x i1> %pg,373 <vscale x 4 x float> %a,374 <vscale x 4 x float> splat(float 1.000000e+00))375 ret <vscale x 4 x float> %out376}377 378define <vscale x 4 x float> @fmaxnm_s_immone_zero(<vscale x 4 x i1> %pg, <vscale x 4 x float> %a) #1 {379; CHECK-LABEL: fmaxnm_s_immone_zero:380; CHECK: // %bb.0:381; CHECK-NEXT: movprfx z0.s, p0/z, z0.s382; CHECK-NEXT: fmaxnm z0.s, p0/m, z0.s, #1.0383; CHECK-NEXT: ret384 %a_z = select <vscale x 4 x i1> %pg, <vscale x 4 x float> %a, <vscale x 4 x float> zeroinitializer385 %out = call <vscale x 4 x float> @llvm.aarch64.sve.fmaxnm.nxv4f32(<vscale x 4 x i1> %pg,386 <vscale x 4 x float> %a_z,387 <vscale x 4 x float> splat(float 1.000000e+00))388 ret <vscale x 4 x float> %out389}390 391define <vscale x 2 x double> @fmaxnm_d_immzero(<vscale x 2 x i1> %pg, <vscale x 2 x double> %a) #0 {392; CHECK-LABEL: fmaxnm_d_immzero:393; CHECK: // %bb.0:394; CHECK-NEXT: fmaxnm z0.d, p0/m, z0.d, #0.0395; CHECK-NEXT: ret396 %out = call <vscale x 2 x double> @llvm.aarch64.sve.fmaxnm.nxv2f64(<vscale x 2 x i1> %pg,397 <vscale x 2 x double> %a,398 <vscale x 2 x double> zeroinitializer)399 ret <vscale x 2 x double> %out400}401 402define <vscale x 2 x double> @fmaxnm_d_immzero_zero(<vscale x 2 x i1> %pg, <vscale x 2 x double> %a) #1 {403; CHECK-LABEL: fmaxnm_d_immzero_zero:404; CHECK: // %bb.0:405; CHECK-NEXT: movprfx z0.d, p0/z, z0.d406; CHECK-NEXT: fmaxnm z0.d, p0/m, z0.d, #0.0407; CHECK-NEXT: ret408 %a_z = select <vscale x 2 x i1> %pg, <vscale x 2 x double> %a, <vscale x 2 x double> zeroinitializer409 %out = call <vscale x 2 x double> @llvm.aarch64.sve.fmaxnm.nxv2f64(<vscale x 2 x i1> %pg,410 <vscale x 2 x double> %a_z,411 <vscale x 2 x double> zeroinitializer)412 ret <vscale x 2 x double> %out413}414 415define <vscale x 2 x double> @fmaxnm_d_immone(<vscale x 2 x i1> %pg, <vscale x 2 x double> %a) #0 {416; CHECK-LABEL: fmaxnm_d_immone:417; CHECK: // %bb.0:418; CHECK-NEXT: fmaxnm z0.d, p0/m, z0.d, #1.0419; CHECK-NEXT: ret420 %out = call <vscale x 2 x double> @llvm.aarch64.sve.fmaxnm.nxv2f64(<vscale x 2 x i1> %pg,421 <vscale x 2 x double> %a,422 <vscale x 2 x double> splat(double 1.000000e+00))423 ret <vscale x 2 x double> %out424}425 426define <vscale x 2 x double> @fmaxnm_d_immone_zero(<vscale x 2 x i1> %pg, <vscale x 2 x double> %a) #1 {427; CHECK-LABEL: fmaxnm_d_immone_zero:428; CHECK: // %bb.0:429; CHECK-NEXT: movprfx z0.d, p0/z, z0.d430; CHECK-NEXT: fmaxnm z0.d, p0/m, z0.d, #1.0431; CHECK-NEXT: ret432 %a_z = select <vscale x 2 x i1> %pg, <vscale x 2 x double> %a, <vscale x 2 x double> zeroinitializer433 %out = call <vscale x 2 x double> @llvm.aarch64.sve.fmaxnm.nxv2f64(<vscale x 2 x i1> %pg,434 <vscale x 2 x double> %a_z,435 <vscale x 2 x double> splat(double 1.000000e+00))436 ret <vscale x 2 x double> %out437}438 439define <vscale x 8 x half> @fmin_h_immzero(<vscale x 8 x i1> %pg, <vscale x 8 x half> %a) #0 {440; CHECK-LABEL: fmin_h_immzero:441; CHECK: // %bb.0:442; CHECK-NEXT: fmin z0.h, p0/m, z0.h, #0.0443; CHECK-NEXT: ret444 %out = call <vscale x 8 x half> @llvm.aarch64.sve.fmin.nxv8f16(<vscale x 8 x i1> %pg,445 <vscale x 8 x half> %a,446 <vscale x 8 x half> zeroinitializer)447 ret <vscale x 8 x half> %out448}449 450define <vscale x 8 x half> @fmin_h_immzero_zero(<vscale x 8 x i1> %pg, <vscale x 8 x half> %a) #1 {451; CHECK-LABEL: fmin_h_immzero_zero:452; CHECK: // %bb.0:453; CHECK-NEXT: movprfx z0.h, p0/z, z0.h454; CHECK-NEXT: fmin z0.h, p0/m, z0.h, #0.0455; CHECK-NEXT: ret456 %a_z = select <vscale x 8 x i1> %pg, <vscale x 8 x half> %a, <vscale x 8 x half> zeroinitializer457 %out = call <vscale x 8 x half> @llvm.aarch64.sve.fmin.nxv8f16(<vscale x 8 x i1> %pg,458 <vscale x 8 x half> %a_z,459 <vscale x 8 x half> zeroinitializer)460 ret <vscale x 8 x half> %out461}462 463define <vscale x 8 x half> @fmin_h_immone(<vscale x 8 x i1> %pg, <vscale x 8 x half> %a) #0 {464; CHECK-LABEL: fmin_h_immone:465; CHECK: // %bb.0:466; CHECK-NEXT: fmin z0.h, p0/m, z0.h, #1.0467; CHECK-NEXT: ret468 %out = call <vscale x 8 x half> @llvm.aarch64.sve.fmin.nxv8f16(<vscale x 8 x i1> %pg,469 <vscale x 8 x half> %a,470 <vscale x 8 x half> splat(half 1.000000e+00))471 ret <vscale x 8 x half> %out472}473 474define <vscale x 8 x half> @fmin_h_immone_zero(<vscale x 8 x i1> %pg, <vscale x 8 x half> %a) #1 {475; CHECK-LABEL: fmin_h_immone_zero:476; CHECK: // %bb.0:477; CHECK-NEXT: movprfx z0.h, p0/z, z0.h478; CHECK-NEXT: fmin z0.h, p0/m, z0.h, #1.0479; CHECK-NEXT: ret480 %a_z = select <vscale x 8 x i1> %pg, <vscale x 8 x half> %a, <vscale x 8 x half> zeroinitializer481 %out = call <vscale x 8 x half> @llvm.aarch64.sve.fmin.nxv8f16(<vscale x 8 x i1> %pg,482 <vscale x 8 x half> %a_z,483 <vscale x 8 x half> splat(half 1.000000e+00))484 ret <vscale x 8 x half> %out485}486 487define <vscale x 4 x float> @fmin_s_immzero(<vscale x 4 x i1> %pg, <vscale x 4 x float> %a) #0 {488; CHECK-LABEL: fmin_s_immzero:489; CHECK: // %bb.0:490; CHECK-NEXT: fmin z0.s, p0/m, z0.s, #0.0491; CHECK-NEXT: ret492 %out = call <vscale x 4 x float> @llvm.aarch64.sve.fmin.nxv4f32(<vscale x 4 x i1> %pg,493 <vscale x 4 x float> %a,494 <vscale x 4 x float> zeroinitializer)495 ret <vscale x 4 x float> %out496}497 498define <vscale x 4 x float> @fmin_s_immzero_zero(<vscale x 4 x i1> %pg, <vscale x 4 x float> %a) #1 {499; CHECK-LABEL: fmin_s_immzero_zero:500; CHECK: // %bb.0:501; CHECK-NEXT: movprfx z0.s, p0/z, z0.s502; CHECK-NEXT: fmin z0.s, p0/m, z0.s, #0.0503; CHECK-NEXT: ret504 %a_z = select <vscale x 4 x i1> %pg, <vscale x 4 x float> %a, <vscale x 4 x float> zeroinitializer505 %out = call <vscale x 4 x float> @llvm.aarch64.sve.fmin.nxv4f32(<vscale x 4 x i1> %pg,506 <vscale x 4 x float> %a_z,507 <vscale x 4 x float> zeroinitializer)508 ret <vscale x 4 x float> %out509}510 511define <vscale x 4 x float> @fmin_s_immone(<vscale x 4 x i1> %pg, <vscale x 4 x float> %a) #0 {512; CHECK-LABEL: fmin_s_immone:513; CHECK: // %bb.0:514; CHECK-NEXT: fmin z0.s, p0/m, z0.s, #1.0515; CHECK-NEXT: ret516 %out = call <vscale x 4 x float> @llvm.aarch64.sve.fmin.nxv4f32(<vscale x 4 x i1> %pg,517 <vscale x 4 x float> %a,518 <vscale x 4 x float> splat(float 1.000000e+00))519 ret <vscale x 4 x float> %out520}521 522define <vscale x 4 x float> @fmin_s_immone_zero(<vscale x 4 x i1> %pg, <vscale x 4 x float> %a) #1 {523; CHECK-LABEL: fmin_s_immone_zero:524; CHECK: // %bb.0:525; CHECK-NEXT: movprfx z0.s, p0/z, z0.s526; CHECK-NEXT: fmin z0.s, p0/m, z0.s, #1.0527; CHECK-NEXT: ret528 %a_z = select <vscale x 4 x i1> %pg, <vscale x 4 x float> %a, <vscale x 4 x float> zeroinitializer529 %out = call <vscale x 4 x float> @llvm.aarch64.sve.fmin.nxv4f32(<vscale x 4 x i1> %pg,530 <vscale x 4 x float> %a_z,531 <vscale x 4 x float> splat(float 1.000000e+00))532 ret <vscale x 4 x float> %out533}534 535define <vscale x 2 x double> @fmin_d_immzero(<vscale x 2 x i1> %pg, <vscale x 2 x double> %a) #0 {536; CHECK-LABEL: fmin_d_immzero:537; CHECK: // %bb.0:538; CHECK-NEXT: fmin z0.d, p0/m, z0.d, #0.0539; CHECK-NEXT: ret540 %out = call <vscale x 2 x double> @llvm.aarch64.sve.fmin.nxv2f64(<vscale x 2 x i1> %pg,541 <vscale x 2 x double> %a,542 <vscale x 2 x double> zeroinitializer)543 ret <vscale x 2 x double> %out544}545 546define <vscale x 2 x double> @fmin_d_immzero_zero(<vscale x 2 x i1> %pg, <vscale x 2 x double> %a) #1 {547; CHECK-LABEL: fmin_d_immzero_zero:548; CHECK: // %bb.0:549; CHECK-NEXT: movprfx z0.d, p0/z, z0.d550; CHECK-NEXT: fmin z0.d, p0/m, z0.d, #0.0551; CHECK-NEXT: ret552 %a_z = select <vscale x 2 x i1> %pg, <vscale x 2 x double> %a, <vscale x 2 x double> zeroinitializer553 %out = call <vscale x 2 x double> @llvm.aarch64.sve.fmin.nxv2f64(<vscale x 2 x i1> %pg,554 <vscale x 2 x double> %a_z,555 <vscale x 2 x double> zeroinitializer)556 ret <vscale x 2 x double> %out557}558 559define <vscale x 2 x double> @fmin_d_immone(<vscale x 2 x i1> %pg, <vscale x 2 x double> %a) #0 {560; CHECK-LABEL: fmin_d_immone:561; CHECK: // %bb.0:562; CHECK-NEXT: fmin z0.d, p0/m, z0.d, #1.0563; CHECK-NEXT: ret564 %out = call <vscale x 2 x double> @llvm.aarch64.sve.fmin.nxv2f64(<vscale x 2 x i1> %pg,565 <vscale x 2 x double> %a,566 <vscale x 2 x double> splat(double 1.000000e+00))567 ret <vscale x 2 x double> %out568}569 570define <vscale x 2 x double> @fmin_d_immone_zero(<vscale x 2 x i1> %pg, <vscale x 2 x double> %a) #1 {571; CHECK-LABEL: fmin_d_immone_zero:572; CHECK: // %bb.0:573; CHECK-NEXT: movprfx z0.d, p0/z, z0.d574; CHECK-NEXT: fmin z0.d, p0/m, z0.d, #1.0575; CHECK-NEXT: ret576 %a_z = select <vscale x 2 x i1> %pg, <vscale x 2 x double> %a, <vscale x 2 x double> zeroinitializer577 %out = call <vscale x 2 x double> @llvm.aarch64.sve.fmin.nxv2f64(<vscale x 2 x i1> %pg,578 <vscale x 2 x double> %a_z,579 <vscale x 2 x double> splat(double 1.000000e+00))580 ret <vscale x 2 x double> %out581}582 583define <vscale x 8 x half> @fminnm_h_immzero(<vscale x 8 x i1> %pg, <vscale x 8 x half> %a) #0 {584; CHECK-LABEL: fminnm_h_immzero:585; CHECK: // %bb.0:586; CHECK-NEXT: fminnm z0.h, p0/m, z0.h, #0.0587; CHECK-NEXT: ret588 %out = call <vscale x 8 x half> @llvm.aarch64.sve.fminnm.nxv8f16(<vscale x 8 x i1> %pg,589 <vscale x 8 x half> %a,590 <vscale x 8 x half> zeroinitializer)591 ret <vscale x 8 x half> %out592}593 594define <vscale x 8 x half> @fminnm_h_immzero_zero(<vscale x 8 x i1> %pg, <vscale x 8 x half> %a) #1 {595; CHECK-LABEL: fminnm_h_immzero_zero:596; CHECK: // %bb.0:597; CHECK-NEXT: movprfx z0.h, p0/z, z0.h598; CHECK-NEXT: fminnm z0.h, p0/m, z0.h, #0.0599; CHECK-NEXT: ret600 %a_z = select <vscale x 8 x i1> %pg, <vscale x 8 x half> %a, <vscale x 8 x half> zeroinitializer601 %out = call <vscale x 8 x half> @llvm.aarch64.sve.fminnm.nxv8f16(<vscale x 8 x i1> %pg,602 <vscale x 8 x half> %a_z,603 <vscale x 8 x half> zeroinitializer)604 ret <vscale x 8 x half> %out605}606 607define <vscale x 8 x half> @fminnm_h_immone(<vscale x 8 x i1> %pg, <vscale x 8 x half> %a) #0 {608; CHECK-LABEL: fminnm_h_immone:609; CHECK: // %bb.0:610; CHECK-NEXT: fminnm z0.h, p0/m, z0.h, #1.0611; CHECK-NEXT: ret612 %out = call <vscale x 8 x half> @llvm.aarch64.sve.fminnm.nxv8f16(<vscale x 8 x i1> %pg,613 <vscale x 8 x half> %a,614 <vscale x 8 x half> splat(half 1.000000e+00))615 ret <vscale x 8 x half> %out616}617 618define <vscale x 8 x half> @fminnm_h_immone_zero(<vscale x 8 x i1> %pg, <vscale x 8 x half> %a) #1 {619; CHECK-LABEL: fminnm_h_immone_zero:620; CHECK: // %bb.0:621; CHECK-NEXT: movprfx z0.h, p0/z, z0.h622; CHECK-NEXT: fminnm z0.h, p0/m, z0.h, #1.0623; CHECK-NEXT: ret624 %a_z = select <vscale x 8 x i1> %pg, <vscale x 8 x half> %a, <vscale x 8 x half> zeroinitializer625 %out = call <vscale x 8 x half> @llvm.aarch64.sve.fminnm.nxv8f16(<vscale x 8 x i1> %pg,626 <vscale x 8 x half> %a_z,627 <vscale x 8 x half> splat(half 1.000000e+00))628 ret <vscale x 8 x half> %out629}630 631define <vscale x 4 x float> @fminnm_s_immzero(<vscale x 4 x i1> %pg, <vscale x 4 x float> %a) #0 {632; CHECK-LABEL: fminnm_s_immzero:633; CHECK: // %bb.0:634; CHECK-NEXT: fminnm z0.s, p0/m, z0.s, #0.0635; CHECK-NEXT: ret636 %out = call <vscale x 4 x float> @llvm.aarch64.sve.fminnm.nxv4f32(<vscale x 4 x i1> %pg,637 <vscale x 4 x float> %a,638 <vscale x 4 x float> zeroinitializer)639 ret <vscale x 4 x float> %out640}641 642define <vscale x 4 x float> @fminnm_s_immzero_zero(<vscale x 4 x i1> %pg, <vscale x 4 x float> %a) #1 {643; CHECK-LABEL: fminnm_s_immzero_zero:644; CHECK: // %bb.0:645; CHECK-NEXT: movprfx z0.s, p0/z, z0.s646; CHECK-NEXT: fminnm z0.s, p0/m, z0.s, #0.0647; CHECK-NEXT: ret648 %a_z = select <vscale x 4 x i1> %pg, <vscale x 4 x float> %a, <vscale x 4 x float> zeroinitializer649 %out = call <vscale x 4 x float> @llvm.aarch64.sve.fminnm.nxv4f32(<vscale x 4 x i1> %pg,650 <vscale x 4 x float> %a_z,651 <vscale x 4 x float> zeroinitializer)652 ret <vscale x 4 x float> %out653}654 655define <vscale x 4 x float> @fminnm_s_immone(<vscale x 4 x i1> %pg, <vscale x 4 x float> %a) #0 {656; CHECK-LABEL: fminnm_s_immone:657; CHECK: // %bb.0:658; CHECK-NEXT: fminnm z0.s, p0/m, z0.s, #1.0659; CHECK-NEXT: ret660 %out = call <vscale x 4 x float> @llvm.aarch64.sve.fminnm.nxv4f32(<vscale x 4 x i1> %pg,661 <vscale x 4 x float> %a,662 <vscale x 4 x float> splat(float 1.000000e+00))663 ret <vscale x 4 x float> %out664}665 666define <vscale x 4 x float> @fminnm_s_immone_zero(<vscale x 4 x i1> %pg, <vscale x 4 x float> %a) #1 {667; CHECK-LABEL: fminnm_s_immone_zero:668; CHECK: // %bb.0:669; CHECK-NEXT: movprfx z0.s, p0/z, z0.s670; CHECK-NEXT: fminnm z0.s, p0/m, z0.s, #1.0671; CHECK-NEXT: ret672 %a_z = select <vscale x 4 x i1> %pg, <vscale x 4 x float> %a, <vscale x 4 x float> zeroinitializer673 %out = call <vscale x 4 x float> @llvm.aarch64.sve.fminnm.nxv4f32(<vscale x 4 x i1> %pg,674 <vscale x 4 x float> %a_z,675 <vscale x 4 x float> splat(float 1.000000e+00))676 ret <vscale x 4 x float> %out677}678 679define <vscale x 2 x double> @fminnm_d_immzero(<vscale x 2 x i1> %pg, <vscale x 2 x double> %a) #0 {680; CHECK-LABEL: fminnm_d_immzero:681; CHECK: // %bb.0:682; CHECK-NEXT: fminnm z0.d, p0/m, z0.d, #0.0683; CHECK-NEXT: ret684 %out = call <vscale x 2 x double> @llvm.aarch64.sve.fminnm.nxv2f64(<vscale x 2 x i1> %pg,685 <vscale x 2 x double> %a,686 <vscale x 2 x double> zeroinitializer)687 ret <vscale x 2 x double> %out688}689 690define <vscale x 2 x double> @fminnm_d_immzero_zero(<vscale x 2 x i1> %pg, <vscale x 2 x double> %a) #1 {691; CHECK-LABEL: fminnm_d_immzero_zero:692; CHECK: // %bb.0:693; CHECK-NEXT: movprfx z0.d, p0/z, z0.d694; CHECK-NEXT: fminnm z0.d, p0/m, z0.d, #0.0695; CHECK-NEXT: ret696 %a_z = select <vscale x 2 x i1> %pg, <vscale x 2 x double> %a, <vscale x 2 x double> zeroinitializer697 %out = call <vscale x 2 x double> @llvm.aarch64.sve.fminnm.nxv2f64(<vscale x 2 x i1> %pg,698 <vscale x 2 x double> %a_z,699 <vscale x 2 x double> zeroinitializer)700 ret <vscale x 2 x double> %out701}702 703define <vscale x 2 x double> @fminnm_d_immone(<vscale x 2 x i1> %pg, <vscale x 2 x double> %a) #0 {704; CHECK-LABEL: fminnm_d_immone:705; CHECK: // %bb.0:706; CHECK-NEXT: fminnm z0.d, p0/m, z0.d, #1.0707; CHECK-NEXT: ret708 %out = call <vscale x 2 x double> @llvm.aarch64.sve.fminnm.nxv2f64(<vscale x 2 x i1> %pg,709 <vscale x 2 x double> %a,710 <vscale x 2 x double> splat(double 1.000000e+00))711 ret <vscale x 2 x double> %out712}713 714define <vscale x 2 x double> @fminnm_d_immone_zero(<vscale x 2 x i1> %pg, <vscale x 2 x double> %a) #1 {715; CHECK-LABEL: fminnm_d_immone_zero:716; CHECK: // %bb.0:717; CHECK-NEXT: movprfx z0.d, p0/z, z0.d718; CHECK-NEXT: fminnm z0.d, p0/m, z0.d, #1.0719; CHECK-NEXT: ret720 %a_z = select <vscale x 2 x i1> %pg, <vscale x 2 x double> %a, <vscale x 2 x double> zeroinitializer721 %out = call <vscale x 2 x double> @llvm.aarch64.sve.fminnm.nxv2f64(<vscale x 2 x i1> %pg,722 <vscale x 2 x double> %a_z,723 <vscale x 2 x double> splat(double 1.000000e+00))724 ret <vscale x 2 x double> %out725}726 727define <vscale x 8 x half> @fmul_h_immhalf(<vscale x 8 x i1> %pg, <vscale x 8 x half> %a) #0 {728; CHECK-LABEL: fmul_h_immhalf:729; CHECK: // %bb.0:730; CHECK-NEXT: fmul z0.h, p0/m, z0.h, #0.5731; CHECK-NEXT: ret732 %out = call <vscale x 8 x half> @llvm.aarch64.sve.fmul.nxv8f16(<vscale x 8 x i1> %pg,733 <vscale x 8 x half> %a,734 <vscale x 8 x half> splat(half 0.500000e+00))735 ret <vscale x 8 x half> %out736}737 738define <vscale x 8 x half> @fmul_h_immhalf_zero(<vscale x 8 x i1> %pg, <vscale x 8 x half> %a) #1 {739; CHECK-LABEL: fmul_h_immhalf_zero:740; CHECK: // %bb.0:741; CHECK-NEXT: movprfx z0.h, p0/z, z0.h742; CHECK-NEXT: fmul z0.h, p0/m, z0.h, #0.5743; CHECK-NEXT: ret744 %a_z = select <vscale x 8 x i1> %pg, <vscale x 8 x half> %a, <vscale x 8 x half> zeroinitializer745 %out = call <vscale x 8 x half> @llvm.aarch64.sve.fmul.nxv8f16(<vscale x 8 x i1> %pg,746 <vscale x 8 x half> %a_z,747 <vscale x 8 x half> splat(half 0.500000e+00))748 ret <vscale x 8 x half> %out749}750 751define <vscale x 8 x half> @fmul_h_immtwo(<vscale x 8 x i1> %pg, <vscale x 8 x half> %a) #0 {752; CHECK-LABEL: fmul_h_immtwo:753; CHECK: // %bb.0:754; CHECK-NEXT: fmul z0.h, p0/m, z0.h, #2.0755; CHECK-NEXT: ret756 %out = call <vscale x 8 x half> @llvm.aarch64.sve.fmul.nxv8f16(<vscale x 8 x i1> %pg,757 <vscale x 8 x half> %a,758 <vscale x 8 x half> splat(half 2.000000e+00))759 ret <vscale x 8 x half> %out760}761 762define <vscale x 8 x half> @fmul_h_immtwo_zero(<vscale x 8 x i1> %pg, <vscale x 8 x half> %a) #1 {763; CHECK-LABEL: fmul_h_immtwo_zero:764; CHECK: // %bb.0:765; CHECK-NEXT: movprfx z0.h, p0/z, z0.h766; CHECK-NEXT: fmul z0.h, p0/m, z0.h, #2.0767; CHECK-NEXT: ret768 %a_z = select <vscale x 8 x i1> %pg, <vscale x 8 x half> %a, <vscale x 8 x half> zeroinitializer769 %out = call <vscale x 8 x half> @llvm.aarch64.sve.fmul.nxv8f16(<vscale x 8 x i1> %pg,770 <vscale x 8 x half> %a_z,771 <vscale x 8 x half> splat(half 2.000000e+00))772 ret <vscale x 8 x half> %out773}774 775define <vscale x 4 x float> @fmul_s_immhalf(<vscale x 4 x i1> %pg, <vscale x 4 x float> %a) #0 {776; CHECK-LABEL: fmul_s_immhalf:777; CHECK: // %bb.0:778; CHECK-NEXT: fmul z0.s, p0/m, z0.s, #0.5779; CHECK-NEXT: ret780 %out = call <vscale x 4 x float> @llvm.aarch64.sve.fmul.nxv4f32(<vscale x 4 x i1> %pg,781 <vscale x 4 x float> %a,782 <vscale x 4 x float> splat(float 0.500000e+00))783 ret <vscale x 4 x float> %out784}785 786define <vscale x 4 x float> @fmul_s_immhalf_zero(<vscale x 4 x i1> %pg, <vscale x 4 x float> %a) #1 {787; CHECK-LABEL: fmul_s_immhalf_zero:788; CHECK: // %bb.0:789; CHECK-NEXT: movprfx z0.s, p0/z, z0.s790; CHECK-NEXT: fmul z0.s, p0/m, z0.s, #0.5791; CHECK-NEXT: ret792 %a_z = select <vscale x 4 x i1> %pg, <vscale x 4 x float> %a, <vscale x 4 x float> zeroinitializer793 %out = call <vscale x 4 x float> @llvm.aarch64.sve.fmul.nxv4f32(<vscale x 4 x i1> %pg,794 <vscale x 4 x float> %a_z,795 <vscale x 4 x float> splat(float 0.500000e+00))796 ret <vscale x 4 x float> %out797}798 799define <vscale x 4 x float> @fmul_s_immtwo(<vscale x 4 x i1> %pg, <vscale x 4 x float> %a) #0 {800; CHECK-LABEL: fmul_s_immtwo:801; CHECK: // %bb.0:802; CHECK-NEXT: fmul z0.s, p0/m, z0.s, #2.0803; CHECK-NEXT: ret804 %out = call <vscale x 4 x float> @llvm.aarch64.sve.fmul.nxv4f32(<vscale x 4 x i1> %pg,805 <vscale x 4 x float> %a,806 <vscale x 4 x float> splat(float 2.000000e+00))807 ret <vscale x 4 x float> %out808}809 810define <vscale x 4 x float> @fmul_s_immtwo_zero(<vscale x 4 x i1> %pg, <vscale x 4 x float> %a) #1 {811; CHECK-LABEL: fmul_s_immtwo_zero:812; CHECK: // %bb.0:813; CHECK-NEXT: movprfx z0.s, p0/z, z0.s814; CHECK-NEXT: fmul z0.s, p0/m, z0.s, #2.0815; CHECK-NEXT: ret816 %a_z = select <vscale x 4 x i1> %pg, <vscale x 4 x float> %a, <vscale x 4 x float> zeroinitializer817 %out = call <vscale x 4 x float> @llvm.aarch64.sve.fmul.nxv4f32(<vscale x 4 x i1> %pg,818 <vscale x 4 x float> %a_z,819 <vscale x 4 x float> splat(float 2.000000e+00))820 ret <vscale x 4 x float> %out821}822 823define <vscale x 2 x double> @fmul_d_immhalf(<vscale x 2 x i1> %pg, <vscale x 2 x double> %a) #0 {824; CHECK-LABEL: fmul_d_immhalf:825; CHECK: // %bb.0:826; CHECK-NEXT: fmul z0.d, p0/m, z0.d, #0.5827; CHECK-NEXT: ret828 %out = call <vscale x 2 x double> @llvm.aarch64.sve.fmul.nxv2f64(<vscale x 2 x i1> %pg,829 <vscale x 2 x double> %a,830 <vscale x 2 x double> splat(double 0.500000e+00))831 ret <vscale x 2 x double> %out832}833 834define <vscale x 2 x double> @fmul_d_immhalf_zero(<vscale x 2 x i1> %pg, <vscale x 2 x double> %a) #1 {835; CHECK-LABEL: fmul_d_immhalf_zero:836; CHECK: // %bb.0:837; CHECK-NEXT: movprfx z0.d, p0/z, z0.d838; CHECK-NEXT: fmul z0.d, p0/m, z0.d, #0.5839; CHECK-NEXT: ret840 %a_z = select <vscale x 2 x i1> %pg, <vscale x 2 x double> %a, <vscale x 2 x double> zeroinitializer841 %out = call <vscale x 2 x double> @llvm.aarch64.sve.fmul.nxv2f64(<vscale x 2 x i1> %pg,842 <vscale x 2 x double> %a_z,843 <vscale x 2 x double> splat(double 0.500000e+00))844 ret <vscale x 2 x double> %out845}846 847define <vscale x 2 x double> @fmul_d_immtwo(<vscale x 2 x i1> %pg, <vscale x 2 x double> %a) #0 {848; CHECK-LABEL: fmul_d_immtwo:849; CHECK: // %bb.0:850; CHECK-NEXT: fmul z0.d, p0/m, z0.d, #2.0851; CHECK-NEXT: ret852 %out = call <vscale x 2 x double> @llvm.aarch64.sve.fmul.nxv2f64(<vscale x 2 x i1> %pg,853 <vscale x 2 x double> %a,854 <vscale x 2 x double> splat(double 2.000000e+00))855 ret <vscale x 2 x double> %out856}857 858define <vscale x 2 x double> @fmul_d_immtwo_zero(<vscale x 2 x i1> %pg, <vscale x 2 x double> %a) #1 {859; CHECK-LABEL: fmul_d_immtwo_zero:860; CHECK: // %bb.0:861; CHECK-NEXT: movprfx z0.d, p0/z, z0.d862; CHECK-NEXT: fmul z0.d, p0/m, z0.d, #2.0863; CHECK-NEXT: ret864 %a_z = select <vscale x 2 x i1> %pg, <vscale x 2 x double> %a, <vscale x 2 x double> zeroinitializer865 %out = call <vscale x 2 x double> @llvm.aarch64.sve.fmul.nxv2f64(<vscale x 2 x i1> %pg,866 <vscale x 2 x double> %a_z,867 <vscale x 2 x double> splat(double 2.000000e+00))868 ret <vscale x 2 x double> %out869}870 871define <vscale x 8 x half> @fsub_h_immhalf(<vscale x 8 x i1> %pg, <vscale x 8 x half> %a) #0 {872; CHECK-LABEL: fsub_h_immhalf:873; CHECK: // %bb.0:874; CHECK-NEXT: fsub z0.h, p0/m, z0.h, #0.5875; CHECK-NEXT: ret876 %out = call <vscale x 8 x half> @llvm.aarch64.sve.fsub.nxv8f16(<vscale x 8 x i1> %pg,877 <vscale x 8 x half> %a,878 <vscale x 8 x half> splat(half 0.500000e+00))879 ret <vscale x 8 x half> %out880}881 882define <vscale x 8 x half> @fsub_h_immhalf_zero(<vscale x 8 x i1> %pg, <vscale x 8 x half> %a) #1 {883; CHECK-LABEL: fsub_h_immhalf_zero:884; CHECK: // %bb.0:885; CHECK-NEXT: movprfx z0.h, p0/z, z0.h886; CHECK-NEXT: fsub z0.h, p0/m, z0.h, #0.5887; CHECK-NEXT: ret888 %a_z = select <vscale x 8 x i1> %pg, <vscale x 8 x half> %a, <vscale x 8 x half> zeroinitializer889 %out = call <vscale x 8 x half> @llvm.aarch64.sve.fsub.nxv8f16(<vscale x 8 x i1> %pg,890 <vscale x 8 x half> %a_z,891 <vscale x 8 x half> splat(half 0.500000e+00))892 ret <vscale x 8 x half> %out893}894 895define <vscale x 8 x half> @fsub_h_immone(<vscale x 8 x i1> %pg, <vscale x 8 x half> %a) #0 {896; CHECK-LABEL: fsub_h_immone:897; CHECK: // %bb.0:898; CHECK-NEXT: fsub z0.h, p0/m, z0.h, #1.0899; CHECK-NEXT: ret900 %out = call <vscale x 8 x half> @llvm.aarch64.sve.fsub.nxv8f16(<vscale x 8 x i1> %pg,901 <vscale x 8 x half> %a,902 <vscale x 8 x half> splat(half 1.000000e+00))903 ret <vscale x 8 x half> %out904}905 906define <vscale x 8 x half> @fsub_h_immone_zero(<vscale x 8 x i1> %pg, <vscale x 8 x half> %a) #1 {907; CHECK-LABEL: fsub_h_immone_zero:908; CHECK: // %bb.0:909; CHECK-NEXT: movprfx z0.h, p0/z, z0.h910; CHECK-NEXT: fsub z0.h, p0/m, z0.h, #1.0911; CHECK-NEXT: ret912 %a_z = select <vscale x 8 x i1> %pg, <vscale x 8 x half> %a, <vscale x 8 x half> zeroinitializer913 %out = call <vscale x 8 x half> @llvm.aarch64.sve.fsub.nxv8f16(<vscale x 8 x i1> %pg,914 <vscale x 8 x half> %a_z,915 <vscale x 8 x half> splat(half 1.000000e+00))916 ret <vscale x 8 x half> %out917}918 919define <vscale x 4 x float> @fsub_s_immhalf(<vscale x 4 x i1> %pg, <vscale x 4 x float> %a) #0 {920; CHECK-LABEL: fsub_s_immhalf:921; CHECK: // %bb.0:922; CHECK-NEXT: fsub z0.s, p0/m, z0.s, #0.5923; CHECK-NEXT: ret924 %out = call <vscale x 4 x float> @llvm.aarch64.sve.fsub.nxv4f32(<vscale x 4 x i1> %pg,925 <vscale x 4 x float> %a,926 <vscale x 4 x float> splat(float 0.500000e+00))927 ret <vscale x 4 x float> %out928}929 930define <vscale x 4 x float> @fsub_s_immhalf_zero(<vscale x 4 x i1> %pg, <vscale x 4 x float> %a) #1 {931; CHECK-LABEL: fsub_s_immhalf_zero:932; CHECK: // %bb.0:933; CHECK-NEXT: movprfx z0.s, p0/z, z0.s934; CHECK-NEXT: fsub z0.s, p0/m, z0.s, #0.5935; CHECK-NEXT: ret936 %a_z = select <vscale x 4 x i1> %pg, <vscale x 4 x float> %a, <vscale x 4 x float> zeroinitializer937 %out = call <vscale x 4 x float> @llvm.aarch64.sve.fsub.nxv4f32(<vscale x 4 x i1> %pg,938 <vscale x 4 x float> %a_z,939 <vscale x 4 x float> splat(float 0.500000e+00))940 ret <vscale x 4 x float> %out941}942 943define <vscale x 4 x float> @fsub_s_immone(<vscale x 4 x i1> %pg, <vscale x 4 x float> %a) #0 {944; CHECK-LABEL: fsub_s_immone:945; CHECK: // %bb.0:946; CHECK-NEXT: fsub z0.s, p0/m, z0.s, #1.0947; CHECK-NEXT: ret948 %out = call <vscale x 4 x float> @llvm.aarch64.sve.fsub.nxv4f32(<vscale x 4 x i1> %pg,949 <vscale x 4 x float> %a,950 <vscale x 4 x float> splat(float 1.000000e+00))951 ret <vscale x 4 x float> %out952}953 954define <vscale x 4 x float> @fsub_s_immone_zero(<vscale x 4 x i1> %pg, <vscale x 4 x float> %a) #1 {955; CHECK-LABEL: fsub_s_immone_zero:956; CHECK: // %bb.0:957; CHECK-NEXT: movprfx z0.s, p0/z, z0.s958; CHECK-NEXT: fsub z0.s, p0/m, z0.s, #1.0959; CHECK-NEXT: ret960 %a_z = select <vscale x 4 x i1> %pg, <vscale x 4 x float> %a, <vscale x 4 x float> zeroinitializer961 %out = call <vscale x 4 x float> @llvm.aarch64.sve.fsub.nxv4f32(<vscale x 4 x i1> %pg,962 <vscale x 4 x float> %a_z,963 <vscale x 4 x float> splat(float 1.000000e+00))964 ret <vscale x 4 x float> %out965}966 967define <vscale x 2 x double> @fsub_d_immhalf(<vscale x 2 x i1> %pg, <vscale x 2 x double> %a) #0 {968; CHECK-LABEL: fsub_d_immhalf:969; CHECK: // %bb.0:970; CHECK-NEXT: fsub z0.d, p0/m, z0.d, #0.5971; CHECK-NEXT: ret972 %out = call <vscale x 2 x double> @llvm.aarch64.sve.fsub.nxv2f64(<vscale x 2 x i1> %pg,973 <vscale x 2 x double> %a,974 <vscale x 2 x double> splat(double 0.500000e+00))975 ret <vscale x 2 x double> %out976}977 978define <vscale x 2 x double> @fsub_d_immhalf_zero(<vscale x 2 x i1> %pg, <vscale x 2 x double> %a) #1 {979; CHECK-LABEL: fsub_d_immhalf_zero:980; CHECK: // %bb.0:981; CHECK-NEXT: movprfx z0.d, p0/z, z0.d982; CHECK-NEXT: fsub z0.d, p0/m, z0.d, #0.5983; CHECK-NEXT: ret984 %a_z = select <vscale x 2 x i1> %pg, <vscale x 2 x double> %a, <vscale x 2 x double> zeroinitializer985 %out = call <vscale x 2 x double> @llvm.aarch64.sve.fsub.nxv2f64(<vscale x 2 x i1> %pg,986 <vscale x 2 x double> %a_z,987 <vscale x 2 x double> splat(double 0.500000e+00))988 ret <vscale x 2 x double> %out989}990 991define <vscale x 2 x double> @fsub_d_immone(<vscale x 2 x i1> %pg, <vscale x 2 x double> %a) #0 {992; CHECK-LABEL: fsub_d_immone:993; CHECK: // %bb.0:994; CHECK-NEXT: fsub z0.d, p0/m, z0.d, #1.0995; CHECK-NEXT: ret996 %out = call <vscale x 2 x double> @llvm.aarch64.sve.fsub.nxv2f64(<vscale x 2 x i1> %pg,997 <vscale x 2 x double> %a,998 <vscale x 2 x double> splat(double 1.000000e+00))999 ret <vscale x 2 x double> %out1000}1001 1002define <vscale x 2 x double> @fsub_d_immone_zero(<vscale x 2 x i1> %pg, <vscale x 2 x double> %a) #1 {1003; CHECK-LABEL: fsub_d_immone_zero:1004; CHECK: // %bb.0:1005; CHECK-NEXT: movprfx z0.d, p0/z, z0.d1006; CHECK-NEXT: fsub z0.d, p0/m, z0.d, #1.01007; CHECK-NEXT: ret1008 %a_z = select <vscale x 2 x i1> %pg, <vscale x 2 x double> %a, <vscale x 2 x double> zeroinitializer1009 %out = call <vscale x 2 x double> @llvm.aarch64.sve.fsub.nxv2f64(<vscale x 2 x i1> %pg,1010 <vscale x 2 x double> %a_z,1011 <vscale x 2 x double> splat(double 1.000000e+00))1012 ret <vscale x 2 x double> %out1013}1014 1015define <vscale x 8 x half> @fsubr_h_immhalf(<vscale x 8 x i1> %pg, <vscale x 8 x half> %a) #1 {1016; CHECK-LABEL: fsubr_h_immhalf:1017; CHECK: // %bb.0:1018; CHECK-NEXT: movprfx z0.h, p0/z, z0.h1019; CHECK-NEXT: fsubr z0.h, p0/m, z0.h, #0.51020; CHECK-NEXT: ret1021 %a_z = select <vscale x 8 x i1> %pg, <vscale x 8 x half> %a, <vscale x 8 x half> zeroinitializer1022 %out = call <vscale x 8 x half> @llvm.aarch64.sve.fsubr.nxv8f16(<vscale x 8 x i1> %pg,1023 <vscale x 8 x half> %a_z,1024 <vscale x 8 x half> splat(half 0.500000e+00))1025 ret <vscale x 8 x half> %out1026}1027 1028define <vscale x 8 x half> @fsubr_h_immone(<vscale x 8 x i1> %pg, <vscale x 8 x half> %a) #1 {1029; CHECK-LABEL: fsubr_h_immone:1030; CHECK: // %bb.0:1031; CHECK-NEXT: movprfx z0.h, p0/z, z0.h1032; CHECK-NEXT: fsubr z0.h, p0/m, z0.h, #1.01033; CHECK-NEXT: ret1034 %a_z = select <vscale x 8 x i1> %pg, <vscale x 8 x half> %a, <vscale x 8 x half> zeroinitializer1035 %out = call <vscale x 8 x half> @llvm.aarch64.sve.fsubr.nxv8f16(<vscale x 8 x i1> %pg,1036 <vscale x 8 x half> %a_z,1037 <vscale x 8 x half> splat(half 1.000000e+00))1038 ret <vscale x 8 x half> %out1039}1040 1041define <vscale x 4 x float> @fsubr_s_immhalf(<vscale x 4 x i1> %pg, <vscale x 4 x float> %a) #1 {1042; CHECK-LABEL: fsubr_s_immhalf:1043; CHECK: // %bb.0:1044; CHECK-NEXT: movprfx z0.s, p0/z, z0.s1045; CHECK-NEXT: fsubr z0.s, p0/m, z0.s, #0.51046; CHECK-NEXT: ret1047 %a_z = select <vscale x 4 x i1> %pg, <vscale x 4 x float> %a, <vscale x 4 x float> zeroinitializer1048 %out = call <vscale x 4 x float> @llvm.aarch64.sve.fsubr.nxv4f32(<vscale x 4 x i1> %pg,1049 <vscale x 4 x float> %a_z,1050 <vscale x 4 x float> splat(float 0.500000e+00))1051 ret <vscale x 4 x float> %out1052}1053 1054define <vscale x 4 x float> @fsubr_s_immone(<vscale x 4 x i1> %pg, <vscale x 4 x float> %a) #1 {1055; CHECK-LABEL: fsubr_s_immone:1056; CHECK: // %bb.0:1057; CHECK-NEXT: movprfx z0.s, p0/z, z0.s1058; CHECK-NEXT: fsubr z0.s, p0/m, z0.s, #1.01059; CHECK-NEXT: ret1060 %a_z = select <vscale x 4 x i1> %pg, <vscale x 4 x float> %a, <vscale x 4 x float> zeroinitializer1061 %out = call <vscale x 4 x float> @llvm.aarch64.sve.fsubr.nxv4f32(<vscale x 4 x i1> %pg,1062 <vscale x 4 x float> %a_z,1063 <vscale x 4 x float> splat(float 1.000000e+00))1064 ret <vscale x 4 x float> %out1065}1066 1067define <vscale x 2 x double> @fsubr_d_immhalf(<vscale x 2 x i1> %pg, <vscale x 2 x double> %a) #1 {1068; CHECK-LABEL: fsubr_d_immhalf:1069; CHECK: // %bb.0:1070; CHECK-NEXT: movprfx z0.d, p0/z, z0.d1071; CHECK-NEXT: fsubr z0.d, p0/m, z0.d, #0.51072; CHECK-NEXT: ret1073 %a_z = select <vscale x 2 x i1> %pg, <vscale x 2 x double> %a, <vscale x 2 x double> zeroinitializer1074 %out = call <vscale x 2 x double> @llvm.aarch64.sve.fsubr.nxv2f64(<vscale x 2 x i1> %pg,1075 <vscale x 2 x double> %a_z,1076 <vscale x 2 x double> splat(double 0.500000e+00))1077 ret <vscale x 2 x double> %out1078}1079 1080define <vscale x 2 x double> @fsubr_d_immone(<vscale x 2 x i1> %pg, <vscale x 2 x double> %a) #1 {1081; CHECK-LABEL: fsubr_d_immone:1082; CHECK: // %bb.0:1083; CHECK-NEXT: movprfx z0.d, p0/z, z0.d1084; CHECK-NEXT: fsubr z0.d, p0/m, z0.d, #1.01085; CHECK-NEXT: ret1086 %a_z = select <vscale x 2 x i1> %pg, <vscale x 2 x double> %a, <vscale x 2 x double> zeroinitializer1087 %out = call <vscale x 2 x double> @llvm.aarch64.sve.fsubr.nxv2f64(<vscale x 2 x i1> %pg,1088 <vscale x 2 x double> %a_z,1089 <vscale x 2 x double> splat(double 1.000000e+00))1090 ret <vscale x 2 x double> %out1091}1092 1093declare <vscale x 8 x half> @llvm.aarch64.sve.fadd.nxv8f16(<vscale x 8 x i1>, <vscale x 8 x half>, <vscale x 8 x half>)1094declare <vscale x 4 x float> @llvm.aarch64.sve.fadd.nxv4f32(<vscale x 4 x i1>, <vscale x 4 x float>, <vscale x 4 x float>)1095declare <vscale x 2 x double> @llvm.aarch64.sve.fadd.nxv2f64(<vscale x 2 x i1>, <vscale x 2 x double>, <vscale x 2 x double>)1096 1097declare <vscale x 8 x half> @llvm.aarch64.sve.fmax.nxv8f16(<vscale x 8 x i1>, <vscale x 8 x half>, <vscale x 8 x half>)1098declare <vscale x 4 x float> @llvm.aarch64.sve.fmax.nxv4f32(<vscale x 4 x i1>, <vscale x 4 x float>, <vscale x 4 x float>)1099declare <vscale x 2 x double> @llvm.aarch64.sve.fmax.nxv2f64(<vscale x 2 x i1>, <vscale x 2 x double>, <vscale x 2 x double>)1100 1101declare <vscale x 8 x half> @llvm.aarch64.sve.fmaxnm.nxv8f16(<vscale x 8 x i1>, <vscale x 8 x half>, <vscale x 8 x half>)1102declare <vscale x 4 x float> @llvm.aarch64.sve.fmaxnm.nxv4f32(<vscale x 4 x i1>, <vscale x 4 x float>, <vscale x 4 x float>)1103declare <vscale x 2 x double> @llvm.aarch64.sve.fmaxnm.nxv2f64(<vscale x 2 x i1>, <vscale x 2 x double>, <vscale x 2 x double>)1104 1105declare <vscale x 8 x half> @llvm.aarch64.sve.fmin.nxv8f16(<vscale x 8 x i1>, <vscale x 8 x half>, <vscale x 8 x half>)1106declare <vscale x 4 x float> @llvm.aarch64.sve.fmin.nxv4f32(<vscale x 4 x i1>, <vscale x 4 x float>, <vscale x 4 x float>)1107declare <vscale x 2 x double> @llvm.aarch64.sve.fmin.nxv2f64(<vscale x 2 x i1>, <vscale x 2 x double>, <vscale x 2 x double>)1108 1109declare <vscale x 8 x half> @llvm.aarch64.sve.fminnm.nxv8f16(<vscale x 8 x i1>, <vscale x 8 x half>, <vscale x 8 x half>)1110declare <vscale x 4 x float> @llvm.aarch64.sve.fminnm.nxv4f32(<vscale x 4 x i1>, <vscale x 4 x float>, <vscale x 4 x float>)1111declare <vscale x 2 x double> @llvm.aarch64.sve.fminnm.nxv2f64(<vscale x 2 x i1>, <vscale x 2 x double>, <vscale x 2 x double>)1112 1113declare <vscale x 8 x half> @llvm.aarch64.sve.fmul.nxv8f16(<vscale x 8 x i1>, <vscale x 8 x half>, <vscale x 8 x half>)1114declare <vscale x 4 x float> @llvm.aarch64.sve.fmul.nxv4f32(<vscale x 4 x i1>, <vscale x 4 x float>, <vscale x 4 x float>)1115declare <vscale x 2 x double> @llvm.aarch64.sve.fmul.nxv2f64(<vscale x 2 x i1>, <vscale x 2 x double>, <vscale x 2 x double>)1116 1117declare <vscale x 8 x half> @llvm.aarch64.sve.fsub.nxv8f16(<vscale x 8 x i1>, <vscale x 8 x half>, <vscale x 8 x half>)1118declare <vscale x 4 x float> @llvm.aarch64.sve.fsub.nxv4f32(<vscale x 4 x i1>, <vscale x 4 x float>, <vscale x 4 x float>)1119declare <vscale x 2 x double> @llvm.aarch64.sve.fsub.nxv2f64(<vscale x 2 x i1>, <vscale x 2 x double>, <vscale x 2 x double>)1120 1121declare <vscale x 8 x half> @llvm.aarch64.sve.fsubr.nxv8f16(<vscale x 8 x i1>, <vscale x 8 x half>, <vscale x 8 x half>)1122declare <vscale x 4 x float> @llvm.aarch64.sve.fsubr.nxv4f32(<vscale x 4 x i1>, <vscale x 4 x float>, <vscale x 4 x float>)1123declare <vscale x 2 x double> @llvm.aarch64.sve.fsubr.nxv2f64(<vscale x 2 x i1>, <vscale x 2 x double>, <vscale x 2 x double>)1124 1125attributes #0 = { "target-features"="+sve" }1126attributes #1 = { "target-features"="+sve,+use-experimental-zeroing-pseudos" }1127