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1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py2; RUN: llc -mtriple=aarch64-linux-gnu -mattr=+sve < %s | FileCheck %s3 4;5; FABD6;7 8define <vscale x 8 x half> @fabd_h(<vscale x 8 x i1> %pg, <vscale x 8 x half> %a, <vscale x 8 x half> %b) {9; CHECK-LABEL: fabd_h:10; CHECK: // %bb.0:11; CHECK-NEXT: fabd z0.h, p0/m, z0.h, z1.h12; CHECK-NEXT: ret13 %out = call <vscale x 8 x half> @llvm.aarch64.sve.fabd.nxv8f16(<vscale x 8 x i1> %pg,14 <vscale x 8 x half> %a,15 <vscale x 8 x half> %b)16 ret <vscale x 8 x half> %out17}18 19define <vscale x 4 x float> @fabd_s(<vscale x 4 x i1> %pg, <vscale x 4 x float> %a, <vscale x 4 x float> %b) {20; CHECK-LABEL: fabd_s:21; CHECK: // %bb.0:22; CHECK-NEXT: fabd z0.s, p0/m, z0.s, z1.s23; CHECK-NEXT: ret24 %out = call <vscale x 4 x float> @llvm.aarch64.sve.fabd.nxv4f32(<vscale x 4 x i1> %pg,25 <vscale x 4 x float> %a,26 <vscale x 4 x float> %b)27 ret <vscale x 4 x float> %out28}29 30define <vscale x 2 x double> @fabd_d(<vscale x 2 x i1> %pg, <vscale x 2 x double> %a, <vscale x 2 x double> %b) {31; CHECK-LABEL: fabd_d:32; CHECK: // %bb.0:33; CHECK-NEXT: fabd z0.d, p0/m, z0.d, z1.d34; CHECK-NEXT: ret35 %out = call <vscale x 2 x double> @llvm.aarch64.sve.fabd.nxv2f64(<vscale x 2 x i1> %pg,36 <vscale x 2 x double> %a,37 <vscale x 2 x double> %b)38 ret <vscale x 2 x double> %out39}40 41;42; FABS43;44 45define <vscale x 8 x half> @fabs_h(<vscale x 8 x half> %a, <vscale x 8 x i1> %pg, <vscale x 8 x half> %b) {46; CHECK-LABEL: fabs_h:47; CHECK: // %bb.0:48; CHECK-NEXT: fabs z0.h, p0/m, z1.h49; CHECK-NEXT: ret50 %out = call <vscale x 8 x half> @llvm.aarch64.sve.fabs.nxv8f16(<vscale x 8 x half> %a,51 <vscale x 8 x i1> %pg,52 <vscale x 8 x half> %b)53 ret <vscale x 8 x half> %out54}55 56define <vscale x 4 x float> @fabs_s(<vscale x 4 x float> %a, <vscale x 4 x i1> %pg, <vscale x 4 x float> %b) {57; CHECK-LABEL: fabs_s:58; CHECK: // %bb.0:59; CHECK-NEXT: fabs z0.s, p0/m, z1.s60; CHECK-NEXT: ret61 %out = call <vscale x 4 x float> @llvm.aarch64.sve.fabs.nxv4f32(<vscale x 4 x float> %a,62 <vscale x 4 x i1> %pg,63 <vscale x 4 x float> %b)64 ret <vscale x 4 x float> %out65}66 67define <vscale x 2 x double> @fabs_d(<vscale x 2 x double> %a, <vscale x 2 x i1> %pg, <vscale x 2 x double> %b) {68; CHECK-LABEL: fabs_d:69; CHECK: // %bb.0:70; CHECK-NEXT: fabs z0.d, p0/m, z1.d71; CHECK-NEXT: ret72 %out = call <vscale x 2 x double> @llvm.aarch64.sve.fabs.nxv2f64(<vscale x 2 x double> %a,73 <vscale x 2 x i1> %pg,74 <vscale x 2 x double> %b)75 ret <vscale x 2 x double> %out76}77 78define <vscale x 8 x bfloat> @fabs_bf(<vscale x 8 x bfloat> %a, <vscale x 8 x i1> %pg, <vscale x 8 x bfloat> %b) {79; CHECK-LABEL: fabs_bf:80; CHECK: // %bb.0:81; CHECK-NEXT: fabs z0.h, p0/m, z1.h82; CHECK-NEXT: ret83 %out = call <vscale x 8 x bfloat> @llvm.aarch64.sve.fabs.nxv8bf16(<vscale x 8 x bfloat> %a,84 <vscale x 8 x i1> %pg,85 <vscale x 8 x bfloat> %b)86 ret <vscale x 8 x bfloat> %out87}88 89;90; FADD91;92 93define <vscale x 8 x half> @fadd_h(<vscale x 8 x i1> %pg, <vscale x 8 x half> %a, <vscale x 8 x half> %b) {94; CHECK-LABEL: fadd_h:95; CHECK: // %bb.0:96; CHECK-NEXT: fadd z0.h, p0/m, z0.h, z1.h97; CHECK-NEXT: ret98 %out = call <vscale x 8 x half> @llvm.aarch64.sve.fadd.nxv8f16(<vscale x 8 x i1> %pg,99 <vscale x 8 x half> %a,100 <vscale x 8 x half> %b)101 ret <vscale x 8 x half> %out102}103 104define <vscale x 4 x float> @fadd_s(<vscale x 4 x i1> %pg, <vscale x 4 x float> %a, <vscale x 4 x float> %b) {105; CHECK-LABEL: fadd_s:106; CHECK: // %bb.0:107; CHECK-NEXT: fadd z0.s, p0/m, z0.s, z1.s108; CHECK-NEXT: ret109 %out = call <vscale x 4 x float> @llvm.aarch64.sve.fadd.nxv4f32(<vscale x 4 x i1> %pg,110 <vscale x 4 x float> %a,111 <vscale x 4 x float> %b)112 ret <vscale x 4 x float> %out113}114 115define <vscale x 2 x double> @fadd_d(<vscale x 2 x i1> %pg, <vscale x 2 x double> %a, <vscale x 2 x double> %b) {116; CHECK-LABEL: fadd_d:117; CHECK: // %bb.0:118; CHECK-NEXT: fadd z0.d, p0/m, z0.d, z1.d119; CHECK-NEXT: ret120 %out = call <vscale x 2 x double> @llvm.aarch64.sve.fadd.nxv2f64(<vscale x 2 x i1> %pg,121 <vscale x 2 x double> %a,122 <vscale x 2 x double> %b)123 ret <vscale x 2 x double> %out124}125 126;127; FCADD128;129 130define <vscale x 8 x half> @fcadd_h(<vscale x 8 x i1> %pg, <vscale x 8 x half> %a, <vscale x 8 x half> %b) {131; CHECK-LABEL: fcadd_h:132; CHECK: // %bb.0:133; CHECK-NEXT: fcadd z0.h, p0/m, z0.h, z1.h, #90134; CHECK-NEXT: ret135 %out = call <vscale x 8 x half> @llvm.aarch64.sve.fcadd.nxv8f16(<vscale x 8 x i1> %pg,136 <vscale x 8 x half> %a,137 <vscale x 8 x half> %b,138 i32 90)139 ret <vscale x 8 x half> %out140}141 142define <vscale x 4 x float> @fcadd_s(<vscale x 4 x i1> %pg, <vscale x 4 x float> %a, <vscale x 4 x float> %b) {143; CHECK-LABEL: fcadd_s:144; CHECK: // %bb.0:145; CHECK-NEXT: fcadd z0.s, p0/m, z0.s, z1.s, #270146; CHECK-NEXT: ret147 %out = call <vscale x 4 x float> @llvm.aarch64.sve.fcadd.nxv4f32(<vscale x 4 x i1> %pg,148 <vscale x 4 x float> %a,149 <vscale x 4 x float> %b,150 i32 270)151 ret <vscale x 4 x float> %out152}153 154define <vscale x 2 x double> @fcadd_d(<vscale x 2 x i1> %pg, <vscale x 2 x double> %a, <vscale x 2 x double> %b) {155; CHECK-LABEL: fcadd_d:156; CHECK: // %bb.0:157; CHECK-NEXT: fcadd z0.d, p0/m, z0.d, z1.d, #90158; CHECK-NEXT: ret159 %out = call <vscale x 2 x double> @llvm.aarch64.sve.fcadd.nxv2f64(<vscale x 2 x i1> %pg,160 <vscale x 2 x double> %a,161 <vscale x 2 x double> %b,162 i32 90)163 ret <vscale x 2 x double> %out164}165 166;167; FCMLA168;169 170define <vscale x 8 x half> @fcmla_h(<vscale x 8 x i1> %pg, <vscale x 8 x half> %a, <vscale x 8 x half> %b, <vscale x 8 x half> %c) {171; CHECK-LABEL: fcmla_h:172; CHECK: // %bb.0:173; CHECK-NEXT: fcmla z0.h, p0/m, z1.h, z2.h, #90174; CHECK-NEXT: ret175 %out = call <vscale x 8 x half> @llvm.aarch64.sve.fcmla.nxv8f16(<vscale x 8 x i1> %pg,176 <vscale x 8 x half> %a,177 <vscale x 8 x half> %b,178 <vscale x 8 x half> %c,179 i32 90)180 ret <vscale x 8 x half> %out181}182 183define <vscale x 4 x float> @fcmla_s(<vscale x 4 x i1> %pg, <vscale x 4 x float> %a, <vscale x 4 x float> %b, <vscale x 4 x float> %c) {184; CHECK-LABEL: fcmla_s:185; CHECK: // %bb.0:186; CHECK-NEXT: fcmla z0.s, p0/m, z1.s, z2.s, #180187; CHECK-NEXT: ret188 %out = call <vscale x 4 x float> @llvm.aarch64.sve.fcmla.nxv4f32(<vscale x 4 x i1> %pg,189 <vscale x 4 x float> %a,190 <vscale x 4 x float> %b,191 <vscale x 4 x float> %c,192 i32 180)193 ret <vscale x 4 x float> %out194}195 196define <vscale x 2 x double> @fcmla_d(<vscale x 2 x i1> %pg, <vscale x 2 x double> %a, <vscale x 2 x double> %b, <vscale x 2 x double> %c) {197; CHECK-LABEL: fcmla_d:198; CHECK: // %bb.0:199; CHECK-NEXT: fcmla z0.d, p0/m, z1.d, z2.d, #270200; CHECK-NEXT: ret201 %out = call <vscale x 2 x double> @llvm.aarch64.sve.fcmla.nxv2f64(<vscale x 2 x i1> %pg,202 <vscale x 2 x double> %a,203 <vscale x 2 x double> %b,204 <vscale x 2 x double> %c,205 i32 270)206 ret <vscale x 2 x double> %out207}208 209;210; FCMLA (Indexed)211;212 213define <vscale x 8 x half> @fcmla_lane_h(<vscale x 8 x half> %a, <vscale x 8 x half> %b, <vscale x 8 x half> %c) {214; CHECK-LABEL: fcmla_lane_h:215; CHECK: // %bb.0:216; CHECK-NEXT: fcmla z0.h, z1.h, z2.h[3], #0217; CHECK-NEXT: ret218 %out = call <vscale x 8 x half> @llvm.aarch64.sve.fcmla.lane.nxv8f16(<vscale x 8 x half> %a,219 <vscale x 8 x half> %b,220 <vscale x 8 x half> %c,221 i32 3,222 i32 0)223 ret <vscale x 8 x half> %out224}225 226define <vscale x 4 x float> @fcmla_lane_s(<vscale x 4 x float> %a, <vscale x 4 x float> %b, <vscale x 4 x float> %c) {227; CHECK-LABEL: fcmla_lane_s:228; CHECK: // %bb.0:229; CHECK-NEXT: fcmla z0.s, z1.s, z2.s[1], #90230; CHECK-NEXT: ret231 %out = call <vscale x 4 x float> @llvm.aarch64.sve.fcmla.lane.nxv4f32(<vscale x 4 x float> %a,232 <vscale x 4 x float> %b,233 <vscale x 4 x float> %c,234 i32 1,235 i32 90)236 ret <vscale x 4 x float> %out237}238 239;240; FDIV241;242 243define <vscale x 8 x half> @fdiv_h(<vscale x 8 x i1> %pg, <vscale x 8 x half> %a, <vscale x 8 x half> %b) {244; CHECK-LABEL: fdiv_h:245; CHECK: // %bb.0:246; CHECK-NEXT: fdiv z0.h, p0/m, z0.h, z1.h247; CHECK-NEXT: ret248 %out = call <vscale x 8 x half> @llvm.aarch64.sve.fdiv.nxv8f16(<vscale x 8 x i1> %pg,249 <vscale x 8 x half> %a,250 <vscale x 8 x half> %b)251 ret <vscale x 8 x half> %out252}253 254define <vscale x 4 x float> @fdiv_s(<vscale x 4 x i1> %pg, <vscale x 4 x float> %a, <vscale x 4 x float> %b) {255; CHECK-LABEL: fdiv_s:256; CHECK: // %bb.0:257; CHECK-NEXT: fdiv z0.s, p0/m, z0.s, z1.s258; CHECK-NEXT: ret259 %out = call <vscale x 4 x float> @llvm.aarch64.sve.fdiv.nxv4f32(<vscale x 4 x i1> %pg,260 <vscale x 4 x float> %a,261 <vscale x 4 x float> %b)262 ret <vscale x 4 x float> %out263}264 265define <vscale x 2 x double> @fdiv_d(<vscale x 2 x i1> %pg, <vscale x 2 x double> %a, <vscale x 2 x double> %b) {266; CHECK-LABEL: fdiv_d:267; CHECK: // %bb.0:268; CHECK-NEXT: fdiv z0.d, p0/m, z0.d, z1.d269; CHECK-NEXT: ret270 %out = call <vscale x 2 x double> @llvm.aarch64.sve.fdiv.nxv2f64(<vscale x 2 x i1> %pg,271 <vscale x 2 x double> %a,272 <vscale x 2 x double> %b)273 ret <vscale x 2 x double> %out274}275 276;277; FDIVR278;279 280define <vscale x 8 x half> @fdivr_h(<vscale x 8 x i1> %pg, <vscale x 8 x half> %a, <vscale x 8 x half> %b) {281; CHECK-LABEL: fdivr_h:282; CHECK: // %bb.0:283; CHECK-NEXT: fdivr z0.h, p0/m, z0.h, z1.h284; CHECK-NEXT: ret285 %out = call <vscale x 8 x half> @llvm.aarch64.sve.fdivr.nxv8f16(<vscale x 8 x i1> %pg,286 <vscale x 8 x half> %a,287 <vscale x 8 x half> %b)288 ret <vscale x 8 x half> %out289}290 291define <vscale x 4 x float> @fdivr_s(<vscale x 4 x i1> %pg, <vscale x 4 x float> %a, <vscale x 4 x float> %b) {292; CHECK-LABEL: fdivr_s:293; CHECK: // %bb.0:294; CHECK-NEXT: fdivr z0.s, p0/m, z0.s, z1.s295; CHECK-NEXT: ret296 %out = call <vscale x 4 x float> @llvm.aarch64.sve.fdivr.nxv4f32(<vscale x 4 x i1> %pg,297 <vscale x 4 x float> %a,298 <vscale x 4 x float> %b)299 ret <vscale x 4 x float> %out300}301 302define <vscale x 2 x double> @fdivr_d(<vscale x 2 x i1> %pg, <vscale x 2 x double> %a, <vscale x 2 x double> %b) {303; CHECK-LABEL: fdivr_d:304; CHECK: // %bb.0:305; CHECK-NEXT: fdivr z0.d, p0/m, z0.d, z1.d306; CHECK-NEXT: ret307 %out = call <vscale x 2 x double> @llvm.aarch64.sve.fdivr.nxv2f64(<vscale x 2 x i1> %pg,308 <vscale x 2 x double> %a,309 <vscale x 2 x double> %b)310 ret <vscale x 2 x double> %out311}312 313;314; FMAD315;316 317define <vscale x 8 x half> @fmad_h(<vscale x 8 x i1> %pg, <vscale x 8 x half> %a, <vscale x 8 x half> %b, <vscale x 8 x half> %c) {318; CHECK-LABEL: fmad_h:319; CHECK: // %bb.0:320; CHECK-NEXT: fmad z0.h, p0/m, z1.h, z2.h321; CHECK-NEXT: ret322 %out = call <vscale x 8 x half> @llvm.aarch64.sve.fmad.nxv8f16(<vscale x 8 x i1> %pg,323 <vscale x 8 x half> %a,324 <vscale x 8 x half> %b,325 <vscale x 8 x half> %c)326 ret <vscale x 8 x half> %out327}328 329define <vscale x 4 x float> @fmad_s(<vscale x 4 x i1> %pg, <vscale x 4 x float> %a, <vscale x 4 x float> %b, <vscale x 4 x float> %c) {330; CHECK-LABEL: fmad_s:331; CHECK: // %bb.0:332; CHECK-NEXT: fmad z0.s, p0/m, z1.s, z2.s333; CHECK-NEXT: ret334 %out = call <vscale x 4 x float> @llvm.aarch64.sve.fmad.nxv4f32(<vscale x 4 x i1> %pg,335 <vscale x 4 x float> %a,336 <vscale x 4 x float> %b,337 <vscale x 4 x float> %c)338 ret <vscale x 4 x float> %out339}340 341define <vscale x 2 x double> @fmad_d(<vscale x 2 x i1> %pg, <vscale x 2 x double> %a, <vscale x 2 x double> %b, <vscale x 2 x double> %c) {342; CHECK-LABEL: fmad_d:343; CHECK: // %bb.0:344; CHECK-NEXT: fmad z0.d, p0/m, z1.d, z2.d345; CHECK-NEXT: ret346 %out = call <vscale x 2 x double> @llvm.aarch64.sve.fmad.nxv2f64(<vscale x 2 x i1> %pg,347 <vscale x 2 x double> %a,348 <vscale x 2 x double> %b,349 <vscale x 2 x double> %c)350 ret <vscale x 2 x double> %out351}352 353;354; FMAX355;356 357define <vscale x 8 x half> @fmax_h(<vscale x 8 x i1> %pg, <vscale x 8 x half> %a, <vscale x 8 x half> %b) {358; CHECK-LABEL: fmax_h:359; CHECK: // %bb.0:360; CHECK-NEXT: fmax z0.h, p0/m, z0.h, z1.h361; CHECK-NEXT: ret362 %out = call <vscale x 8 x half> @llvm.aarch64.sve.fmax.nxv8f16(<vscale x 8 x i1> %pg,363 <vscale x 8 x half> %a,364 <vscale x 8 x half> %b)365 ret <vscale x 8 x half> %out366}367 368define <vscale x 4 x float> @fmax_s(<vscale x 4 x i1> %pg, <vscale x 4 x float> %a, <vscale x 4 x float> %b) {369; CHECK-LABEL: fmax_s:370; CHECK: // %bb.0:371; CHECK-NEXT: fmax z0.s, p0/m, z0.s, z1.s372; CHECK-NEXT: ret373 %out = call <vscale x 4 x float> @llvm.aarch64.sve.fmax.nxv4f32(<vscale x 4 x i1> %pg,374 <vscale x 4 x float> %a,375 <vscale x 4 x float> %b)376 ret <vscale x 4 x float> %out377}378 379define <vscale x 2 x double> @fmax_d(<vscale x 2 x i1> %pg, <vscale x 2 x double> %a, <vscale x 2 x double> %b) {380; CHECK-LABEL: fmax_d:381; CHECK: // %bb.0:382; CHECK-NEXT: fmax z0.d, p0/m, z0.d, z1.d383; CHECK-NEXT: ret384 %out = call <vscale x 2 x double> @llvm.aarch64.sve.fmax.nxv2f64(<vscale x 2 x i1> %pg,385 <vscale x 2 x double> %a,386 <vscale x 2 x double> %b)387 ret <vscale x 2 x double> %out388}389 390;391; FMAXNM392;393 394define <vscale x 8 x half> @fmaxnm_h(<vscale x 8 x i1> %pg, <vscale x 8 x half> %a, <vscale x 8 x half> %b) {395; CHECK-LABEL: fmaxnm_h:396; CHECK: // %bb.0:397; CHECK-NEXT: fmaxnm z0.h, p0/m, z0.h, z1.h398; CHECK-NEXT: ret399 %out = call <vscale x 8 x half> @llvm.aarch64.sve.fmaxnm.nxv8f16(<vscale x 8 x i1> %pg,400 <vscale x 8 x half> %a,401 <vscale x 8 x half> %b)402 ret <vscale x 8 x half> %out403}404 405define <vscale x 4 x float> @fmaxnm_s(<vscale x 4 x i1> %pg, <vscale x 4 x float> %a, <vscale x 4 x float> %b) {406; CHECK-LABEL: fmaxnm_s:407; CHECK: // %bb.0:408; CHECK-NEXT: fmaxnm z0.s, p0/m, z0.s, z1.s409; CHECK-NEXT: ret410 %out = call <vscale x 4 x float> @llvm.aarch64.sve.fmaxnm.nxv4f32(<vscale x 4 x i1> %pg,411 <vscale x 4 x float> %a,412 <vscale x 4 x float> %b)413 ret <vscale x 4 x float> %out414}415 416define <vscale x 2 x double> @fmaxnm_d(<vscale x 2 x i1> %pg, <vscale x 2 x double> %a, <vscale x 2 x double> %b) {417; CHECK-LABEL: fmaxnm_d:418; CHECK: // %bb.0:419; CHECK-NEXT: fmaxnm z0.d, p0/m, z0.d, z1.d420; CHECK-NEXT: ret421 %out = call <vscale x 2 x double> @llvm.aarch64.sve.fmaxnm.nxv2f64(<vscale x 2 x i1> %pg,422 <vscale x 2 x double> %a,423 <vscale x 2 x double> %b)424 ret <vscale x 2 x double> %out425}426 427;428; FMIN429;430 431define <vscale x 8 x half> @fmin_h(<vscale x 8 x i1> %pg, <vscale x 8 x half> %a, <vscale x 8 x half> %b) {432; CHECK-LABEL: fmin_h:433; CHECK: // %bb.0:434; CHECK-NEXT: fmin z0.h, p0/m, z0.h, z1.h435; CHECK-NEXT: ret436 %out = call <vscale x 8 x half> @llvm.aarch64.sve.fmin.nxv8f16(<vscale x 8 x i1> %pg,437 <vscale x 8 x half> %a,438 <vscale x 8 x half> %b)439 ret <vscale x 8 x half> %out440}441 442define <vscale x 4 x float> @fmin_s(<vscale x 4 x i1> %pg, <vscale x 4 x float> %a, <vscale x 4 x float> %b) {443; CHECK-LABEL: fmin_s:444; CHECK: // %bb.0:445; CHECK-NEXT: fmin z0.s, p0/m, z0.s, z1.s446; CHECK-NEXT: ret447 %out = call <vscale x 4 x float> @llvm.aarch64.sve.fmin.nxv4f32(<vscale x 4 x i1> %pg,448 <vscale x 4 x float> %a,449 <vscale x 4 x float> %b)450 ret <vscale x 4 x float> %out451}452 453define <vscale x 2 x double> @fmin_d(<vscale x 2 x i1> %pg, <vscale x 2 x double> %a, <vscale x 2 x double> %b) {454; CHECK-LABEL: fmin_d:455; CHECK: // %bb.0:456; CHECK-NEXT: fmin z0.d, p0/m, z0.d, z1.d457; CHECK-NEXT: ret458 %out = call <vscale x 2 x double> @llvm.aarch64.sve.fmin.nxv2f64(<vscale x 2 x i1> %pg,459 <vscale x 2 x double> %a,460 <vscale x 2 x double> %b)461 ret <vscale x 2 x double> %out462}463 464;465; FMINNM466;467 468define <vscale x 8 x half> @fminnm_h(<vscale x 8 x i1> %pg, <vscale x 8 x half> %a, <vscale x 8 x half> %b) {469; CHECK-LABEL: fminnm_h:470; CHECK: // %bb.0:471; CHECK-NEXT: fminnm z0.h, p0/m, z0.h, z1.h472; CHECK-NEXT: ret473 %out = call <vscale x 8 x half> @llvm.aarch64.sve.fminnm.nxv8f16(<vscale x 8 x i1> %pg,474 <vscale x 8 x half> %a,475 <vscale x 8 x half> %b)476 ret <vscale x 8 x half> %out477}478 479define <vscale x 4 x float> @fminnm_s(<vscale x 4 x i1> %pg, <vscale x 4 x float> %a, <vscale x 4 x float> %b) {480; CHECK-LABEL: fminnm_s:481; CHECK: // %bb.0:482; CHECK-NEXT: fminnm z0.s, p0/m, z0.s, z1.s483; CHECK-NEXT: ret484 %out = call <vscale x 4 x float> @llvm.aarch64.sve.fminnm.nxv4f32(<vscale x 4 x i1> %pg,485 <vscale x 4 x float> %a,486 <vscale x 4 x float> %b)487 ret <vscale x 4 x float> %out488}489 490define <vscale x 2 x double> @fminnm_d(<vscale x 2 x i1> %pg, <vscale x 2 x double> %a, <vscale x 2 x double> %b) {491; CHECK-LABEL: fminnm_d:492; CHECK: // %bb.0:493; CHECK-NEXT: fminnm z0.d, p0/m, z0.d, z1.d494; CHECK-NEXT: ret495 %out = call <vscale x 2 x double> @llvm.aarch64.sve.fminnm.nxv2f64(<vscale x 2 x i1> %pg,496 <vscale x 2 x double> %a,497 <vscale x 2 x double> %b)498 ret <vscale x 2 x double> %out499}500 501;502; FMLA503;504 505define <vscale x 8 x half> @fmla_h(<vscale x 8 x i1> %pg, <vscale x 8 x half> %a, <vscale x 8 x half> %b, <vscale x 8 x half> %c) {506; CHECK-LABEL: fmla_h:507; CHECK: // %bb.0:508; CHECK-NEXT: fmla z0.h, p0/m, z1.h, z2.h509; CHECK-NEXT: ret510 %out = call <vscale x 8 x half> @llvm.aarch64.sve.fmla.nxv8f16(<vscale x 8 x i1> %pg,511 <vscale x 8 x half> %a,512 <vscale x 8 x half> %b,513 <vscale x 8 x half> %c)514 ret <vscale x 8 x half> %out515}516 517define <vscale x 4 x float> @fmla_s(<vscale x 4 x i1> %pg, <vscale x 4 x float> %a, <vscale x 4 x float> %b, <vscale x 4 x float> %c) {518; CHECK-LABEL: fmla_s:519; CHECK: // %bb.0:520; CHECK-NEXT: fmla z0.s, p0/m, z1.s, z2.s521; CHECK-NEXT: ret522 %out = call <vscale x 4 x float> @llvm.aarch64.sve.fmla.nxv4f32(<vscale x 4 x i1> %pg,523 <vscale x 4 x float> %a,524 <vscale x 4 x float> %b,525 <vscale x 4 x float> %c)526 ret <vscale x 4 x float> %out527}528 529define <vscale x 2 x double> @fmla_d(<vscale x 2 x i1> %pg, <vscale x 2 x double> %a, <vscale x 2 x double> %b, <vscale x 2 x double> %c) {530; CHECK-LABEL: fmla_d:531; CHECK: // %bb.0:532; CHECK-NEXT: fmla z0.d, p0/m, z1.d, z2.d533; CHECK-NEXT: ret534 %out = call <vscale x 2 x double> @llvm.aarch64.sve.fmla.nxv2f64(<vscale x 2 x i1> %pg,535 <vscale x 2 x double> %a,536 <vscale x 2 x double> %b,537 <vscale x 2 x double> %c)538 ret <vscale x 2 x double> %out539}540 541;542; FMLA (Indexed)543;544 545define <vscale x 8 x half> @fmla_lane_h(<vscale x 8 x half> %a, <vscale x 8 x half> %b, <vscale x 8 x half> %c) {546; CHECK-LABEL: fmla_lane_h:547; CHECK: // %bb.0:548; CHECK-NEXT: fmla z0.h, z1.h, z2.h[3]549; CHECK-NEXT: ret550 %out = call <vscale x 8 x half> @llvm.aarch64.sve.fmla.lane.nxv8f16(<vscale x 8 x half> %a,551 <vscale x 8 x half> %b,552 <vscale x 8 x half> %c,553 i32 3)554 ret <vscale x 8 x half> %out555}556 557define <vscale x 4 x float> @fmla_lane_s(<vscale x 4 x float> %a, <vscale x 4 x float> %b, <vscale x 4 x float> %c) {558; CHECK-LABEL: fmla_lane_s:559; CHECK: // %bb.0:560; CHECK-NEXT: fmla z0.s, z1.s, z2.s[2]561; CHECK-NEXT: ret562 %out = call <vscale x 4 x float> @llvm.aarch64.sve.fmla.lane.nxv4f32(<vscale x 4 x float> %a,563 <vscale x 4 x float> %b,564 <vscale x 4 x float> %c,565 i32 2)566 ret <vscale x 4 x float> %out567}568 569define <vscale x 2 x double> @fmla_lane_d(<vscale x 2 x double> %a, <vscale x 2 x double> %b, <vscale x 2 x double> %c) {570; CHECK-LABEL: fmla_lane_d:571; CHECK: // %bb.0:572; CHECK-NEXT: fmla z0.d, z1.d, z2.d[1]573; CHECK-NEXT: ret574 %out = call <vscale x 2 x double> @llvm.aarch64.sve.fmla.lane.nxv2f64(<vscale x 2 x double> %a,575 <vscale x 2 x double> %b,576 <vscale x 2 x double> %c,577 i32 1)578 ret <vscale x 2 x double> %out579}580 581;582; FMLS583;584 585define <vscale x 8 x half> @fmls_h(<vscale x 8 x i1> %pg, <vscale x 8 x half> %a, <vscale x 8 x half> %b, <vscale x 8 x half> %c) {586; CHECK-LABEL: fmls_h:587; CHECK: // %bb.0:588; CHECK-NEXT: fmls z0.h, p0/m, z1.h, z2.h589; CHECK-NEXT: ret590 %out = call <vscale x 8 x half> @llvm.aarch64.sve.fmls.nxv8f16(<vscale x 8 x i1> %pg,591 <vscale x 8 x half> %a,592 <vscale x 8 x half> %b,593 <vscale x 8 x half> %c)594 ret <vscale x 8 x half> %out595}596 597define <vscale x 4 x float> @fmls_s(<vscale x 4 x i1> %pg, <vscale x 4 x float> %a, <vscale x 4 x float> %b, <vscale x 4 x float> %c) {598; CHECK-LABEL: fmls_s:599; CHECK: // %bb.0:600; CHECK-NEXT: fmls z0.s, p0/m, z1.s, z2.s601; CHECK-NEXT: ret602 %out = call <vscale x 4 x float> @llvm.aarch64.sve.fmls.nxv4f32(<vscale x 4 x i1> %pg,603 <vscale x 4 x float> %a,604 <vscale x 4 x float> %b,605 <vscale x 4 x float> %c)606 ret <vscale x 4 x float> %out607}608 609define <vscale x 2 x double> @fmls_d(<vscale x 2 x i1> %pg, <vscale x 2 x double> %a, <vscale x 2 x double> %b, <vscale x 2 x double> %c) {610; CHECK-LABEL: fmls_d:611; CHECK: // %bb.0:612; CHECK-NEXT: fmls z0.d, p0/m, z1.d, z2.d613; CHECK-NEXT: ret614 %out = call <vscale x 2 x double> @llvm.aarch64.sve.fmls.nxv2f64(<vscale x 2 x i1> %pg,615 <vscale x 2 x double> %a,616 <vscale x 2 x double> %b,617 <vscale x 2 x double> %c)618 ret <vscale x 2 x double> %out619}620 621;622; FMLS (Indexed)623;624 625define <vscale x 8 x half> @fmls_lane_h(<vscale x 8 x half> %a, <vscale x 8 x half> %b, <vscale x 8 x half> %c) {626; CHECK-LABEL: fmls_lane_h:627; CHECK: // %bb.0:628; CHECK-NEXT: fmls z0.h, z1.h, z2.h[3]629; CHECK-NEXT: ret630 %out = call <vscale x 8 x half> @llvm.aarch64.sve.fmls.lane.nxv8f16(<vscale x 8 x half> %a,631 <vscale x 8 x half> %b,632 <vscale x 8 x half> %c,633 i32 3)634 ret <vscale x 8 x half> %out635}636 637define <vscale x 4 x float> @fmls_lane_s(<vscale x 4 x float> %a, <vscale x 4 x float> %b, <vscale x 4 x float> %c) {638; CHECK-LABEL: fmls_lane_s:639; CHECK: // %bb.0:640; CHECK-NEXT: fmls z0.s, z1.s, z2.s[2]641; CHECK-NEXT: ret642 %out = call <vscale x 4 x float> @llvm.aarch64.sve.fmls.lane.nxv4f32(<vscale x 4 x float> %a,643 <vscale x 4 x float> %b,644 <vscale x 4 x float> %c,645 i32 2)646 ret <vscale x 4 x float> %out647}648 649define <vscale x 2 x double> @fmls_lane_d(<vscale x 2 x double> %a, <vscale x 2 x double> %b, <vscale x 2 x double> %c) {650; CHECK-LABEL: fmls_lane_d:651; CHECK: // %bb.0:652; CHECK-NEXT: fmls z0.d, z1.d, z2.d[1]653; CHECK-NEXT: ret654 %out = call <vscale x 2 x double> @llvm.aarch64.sve.fmls.lane.nxv2f64(<vscale x 2 x double> %a,655 <vscale x 2 x double> %b,656 <vscale x 2 x double> %c,657 i32 1)658 ret <vscale x 2 x double> %out659}660 661;662; FMSB663;664 665define <vscale x 8 x half> @fmsb_h(<vscale x 8 x i1> %pg, <vscale x 8 x half> %a, <vscale x 8 x half> %b, <vscale x 8 x half> %c) {666; CHECK-LABEL: fmsb_h:667; CHECK: // %bb.0:668; CHECK-NEXT: fmsb z0.h, p0/m, z1.h, z2.h669; CHECK-NEXT: ret670 %out = call <vscale x 8 x half> @llvm.aarch64.sve.fmsb.nxv8f16(<vscale x 8 x i1> %pg,671 <vscale x 8 x half> %a,672 <vscale x 8 x half> %b,673 <vscale x 8 x half> %c)674 ret <vscale x 8 x half> %out675}676 677define <vscale x 4 x float> @fmsb_s(<vscale x 4 x i1> %pg, <vscale x 4 x float> %a, <vscale x 4 x float> %b, <vscale x 4 x float> %c) {678; CHECK-LABEL: fmsb_s:679; CHECK: // %bb.0:680; CHECK-NEXT: fmsb z0.s, p0/m, z1.s, z2.s681; CHECK-NEXT: ret682 %out = call <vscale x 4 x float> @llvm.aarch64.sve.fmsb.nxv4f32(<vscale x 4 x i1> %pg,683 <vscale x 4 x float> %a,684 <vscale x 4 x float> %b,685 <vscale x 4 x float> %c)686 ret <vscale x 4 x float> %out687}688 689define <vscale x 2 x double> @fmsb_d(<vscale x 2 x i1> %pg, <vscale x 2 x double> %a, <vscale x 2 x double> %b, <vscale x 2 x double> %c) {690; CHECK-LABEL: fmsb_d:691; CHECK: // %bb.0:692; CHECK-NEXT: fmsb z0.d, p0/m, z1.d, z2.d693; CHECK-NEXT: ret694 %out = call <vscale x 2 x double> @llvm.aarch64.sve.fmsb.nxv2f64(<vscale x 2 x i1> %pg,695 <vscale x 2 x double> %a,696 <vscale x 2 x double> %b,697 <vscale x 2 x double> %c)698 ret <vscale x 2 x double> %out699}700 701;702; FMUL703;704 705define <vscale x 8 x half> @fmul_h(<vscale x 8 x i1> %pg, <vscale x 8 x half> %a, <vscale x 8 x half> %b) {706; CHECK-LABEL: fmul_h:707; CHECK: // %bb.0:708; CHECK-NEXT: fmul z0.h, p0/m, z0.h, z1.h709; CHECK-NEXT: ret710 %out = call <vscale x 8 x half> @llvm.aarch64.sve.fmul.nxv8f16(<vscale x 8 x i1> %pg,711 <vscale x 8 x half> %a,712 <vscale x 8 x half> %b)713 ret <vscale x 8 x half> %out714}715 716define <vscale x 4 x float> @fmul_s(<vscale x 4 x i1> %pg, <vscale x 4 x float> %a, <vscale x 4 x float> %b) {717; CHECK-LABEL: fmul_s:718; CHECK: // %bb.0:719; CHECK-NEXT: fmul z0.s, p0/m, z0.s, z1.s720; CHECK-NEXT: ret721 %out = call <vscale x 4 x float> @llvm.aarch64.sve.fmul.nxv4f32(<vscale x 4 x i1> %pg,722 <vscale x 4 x float> %a,723 <vscale x 4 x float> %b)724 ret <vscale x 4 x float> %out725}726 727define <vscale x 2 x double> @fmul_d(<vscale x 2 x i1> %pg, <vscale x 2 x double> %a, <vscale x 2 x double> %b) {728; CHECK-LABEL: fmul_d:729; CHECK: // %bb.0:730; CHECK-NEXT: fmul z0.d, p0/m, z0.d, z1.d731; CHECK-NEXT: ret732 %out = call <vscale x 2 x double> @llvm.aarch64.sve.fmul.nxv2f64(<vscale x 2 x i1> %pg,733 <vscale x 2 x double> %a,734 <vscale x 2 x double> %b)735 ret <vscale x 2 x double> %out736}737 738;739; FMUL (Indexed)740;741 742define <vscale x 8 x half> @fmul_lane_h(<vscale x 8 x half> %a, <vscale x 8 x half> %b) {743; CHECK-LABEL: fmul_lane_h:744; CHECK: // %bb.0:745; CHECK-NEXT: fmul z0.h, z0.h, z1.h[3]746; CHECK-NEXT: ret747 %out = call <vscale x 8 x half> @llvm.aarch64.sve.fmul.lane.nxv8f16(<vscale x 8 x half> %a,748 <vscale x 8 x half> %b,749 i32 3)750 ret <vscale x 8 x half> %out751}752 753define <vscale x 4 x float> @fmul_lane_s(<vscale x 4 x float> %a, <vscale x 4 x float> %b) {754; CHECK-LABEL: fmul_lane_s:755; CHECK: // %bb.0:756; CHECK-NEXT: fmul z0.s, z0.s, z1.s[2]757; CHECK-NEXT: ret758 %out = call <vscale x 4 x float> @llvm.aarch64.sve.fmul.lane.nxv4f32(<vscale x 4 x float> %a,759 <vscale x 4 x float> %b,760 i32 2)761 ret <vscale x 4 x float> %out762}763 764define <vscale x 2 x double> @fmul_lane_d(<vscale x 2 x double> %a, <vscale x 2 x double> %b) {765; CHECK-LABEL: fmul_lane_d:766; CHECK: // %bb.0:767; CHECK-NEXT: fmul z0.d, z0.d, z1.d[1]768; CHECK-NEXT: ret769 %out = call <vscale x 2 x double> @llvm.aarch64.sve.fmul.lane.nxv2f64(<vscale x 2 x double> %a,770 <vscale x 2 x double> %b,771 i32 1)772 ret <vscale x 2 x double> %out773}774 775;776; FMULX777;778 779define <vscale x 8 x half> @fmulx_h(<vscale x 8 x i1> %pg, <vscale x 8 x half> %a, <vscale x 8 x half> %b) {780; CHECK-LABEL: fmulx_h:781; CHECK: // %bb.0:782; CHECK-NEXT: fmulx z0.h, p0/m, z0.h, z1.h783; CHECK-NEXT: ret784 %out = call <vscale x 8 x half> @llvm.aarch64.sve.fmulx.nxv8f16(<vscale x 8 x i1> %pg,785 <vscale x 8 x half> %a,786 <vscale x 8 x half> %b)787 ret <vscale x 8 x half> %out788}789 790define <vscale x 4 x float> @fmulx_s(<vscale x 4 x i1> %pg, <vscale x 4 x float> %a, <vscale x 4 x float> %b) {791; CHECK-LABEL: fmulx_s:792; CHECK: // %bb.0:793; CHECK-NEXT: fmulx z0.s, p0/m, z0.s, z1.s794; CHECK-NEXT: ret795 %out = call <vscale x 4 x float> @llvm.aarch64.sve.fmulx.nxv4f32(<vscale x 4 x i1> %pg,796 <vscale x 4 x float> %a,797 <vscale x 4 x float> %b)798 ret <vscale x 4 x float> %out799}800 801define <vscale x 2 x double> @fmulx_d(<vscale x 2 x i1> %pg, <vscale x 2 x double> %a, <vscale x 2 x double> %b) {802; CHECK-LABEL: fmulx_d:803; CHECK: // %bb.0:804; CHECK-NEXT: fmulx z0.d, p0/m, z0.d, z1.d805; CHECK-NEXT: ret806 %out = call <vscale x 2 x double> @llvm.aarch64.sve.fmulx.nxv2f64(<vscale x 2 x i1> %pg,807 <vscale x 2 x double> %a,808 <vscale x 2 x double> %b)809 ret <vscale x 2 x double> %out810}811 812;813; FNEG814;815 816define <vscale x 8 x half> @fneg_h(<vscale x 8 x half> %a, <vscale x 8 x i1> %pg, <vscale x 8 x half> %b) {817; CHECK-LABEL: fneg_h:818; CHECK: // %bb.0:819; CHECK-NEXT: fneg z0.h, p0/m, z1.h820; CHECK-NEXT: ret821 %out = call <vscale x 8 x half> @llvm.aarch64.sve.fneg.nxv8f16(<vscale x 8 x half> %a,822 <vscale x 8 x i1> %pg,823 <vscale x 8 x half> %b)824 ret <vscale x 8 x half> %out825}826 827define <vscale x 4 x float> @fneg_s(<vscale x 4 x float> %a, <vscale x 4 x i1> %pg, <vscale x 4 x float> %b) {828; CHECK-LABEL: fneg_s:829; CHECK: // %bb.0:830; CHECK-NEXT: fneg z0.s, p0/m, z1.s831; CHECK-NEXT: ret832 %out = call <vscale x 4 x float> @llvm.aarch64.sve.fneg.nxv4f32(<vscale x 4 x float> %a,833 <vscale x 4 x i1> %pg,834 <vscale x 4 x float> %b)835 ret <vscale x 4 x float> %out836}837 838define <vscale x 2 x double> @fneg_d(<vscale x 2 x double> %a, <vscale x 2 x i1> %pg, <vscale x 2 x double> %b) {839; CHECK-LABEL: fneg_d:840; CHECK: // %bb.0:841; CHECK-NEXT: fneg z0.d, p0/m, z1.d842; CHECK-NEXT: ret843 %out = call <vscale x 2 x double> @llvm.aarch64.sve.fneg.nxv2f64(<vscale x 2 x double> %a,844 <vscale x 2 x i1> %pg,845 <vscale x 2 x double> %b)846 ret <vscale x 2 x double> %out847}848 849define <vscale x 8 x bfloat> @fneg_bf(<vscale x 8 x bfloat> %a, <vscale x 8 x i1> %pg, <vscale x 8 x bfloat> %b) {850; CHECK-LABEL: fneg_bf:851; CHECK: // %bb.0:852; CHECK-NEXT: fneg z0.h, p0/m, z1.h853; CHECK-NEXT: ret854 %out = call <vscale x 8 x bfloat> @llvm.aarch64.sve.fneg.nxv8bf16(<vscale x 8 x bfloat> %a,855 <vscale x 8 x i1> %pg,856 <vscale x 8 x bfloat> %b)857 ret <vscale x 8 x bfloat> %out858}859 860;861; FNMAD862;863 864define <vscale x 8 x half> @fnmad_h(<vscale x 8 x i1> %pg, <vscale x 8 x half> %a, <vscale x 8 x half> %b, <vscale x 8 x half> %c) {865; CHECK-LABEL: fnmad_h:866; CHECK: // %bb.0:867; CHECK-NEXT: fnmad z0.h, p0/m, z1.h, z2.h868; CHECK-NEXT: ret869 %out = call <vscale x 8 x half> @llvm.aarch64.sve.fnmad.nxv8f16(<vscale x 8 x i1> %pg,870 <vscale x 8 x half> %a,871 <vscale x 8 x half> %b,872 <vscale x 8 x half> %c)873 ret <vscale x 8 x half> %out874}875 876define <vscale x 4 x float> @fnmad_s(<vscale x 4 x i1> %pg, <vscale x 4 x float> %a, <vscale x 4 x float> %b, <vscale x 4 x float> %c) {877; CHECK-LABEL: fnmad_s:878; CHECK: // %bb.0:879; CHECK-NEXT: fnmad z0.s, p0/m, z1.s, z2.s880; CHECK-NEXT: ret881 %out = call <vscale x 4 x float> @llvm.aarch64.sve.fnmad.nxv4f32(<vscale x 4 x i1> %pg,882 <vscale x 4 x float> %a,883 <vscale x 4 x float> %b,884 <vscale x 4 x float> %c)885 ret <vscale x 4 x float> %out886}887 888define <vscale x 2 x double> @fnmad_d(<vscale x 2 x i1> %pg, <vscale x 2 x double> %a, <vscale x 2 x double> %b, <vscale x 2 x double> %c) {889; CHECK-LABEL: fnmad_d:890; CHECK: // %bb.0:891; CHECK-NEXT: fnmad z0.d, p0/m, z1.d, z2.d892; CHECK-NEXT: ret893 %out = call <vscale x 2 x double> @llvm.aarch64.sve.fnmad.nxv2f64(<vscale x 2 x i1> %pg,894 <vscale x 2 x double> %a,895 <vscale x 2 x double> %b,896 <vscale x 2 x double> %c)897 ret <vscale x 2 x double> %out898}899 900;901; FNMLA902;903 904define <vscale x 8 x half> @fnmla_h(<vscale x 8 x i1> %pg, <vscale x 8 x half> %a, <vscale x 8 x half> %b, <vscale x 8 x half> %c) {905; CHECK-LABEL: fnmla_h:906; CHECK: // %bb.0:907; CHECK-NEXT: fnmla z0.h, p0/m, z1.h, z2.h908; CHECK-NEXT: ret909 %out = call <vscale x 8 x half> @llvm.aarch64.sve.fnmla.nxv8f16(<vscale x 8 x i1> %pg,910 <vscale x 8 x half> %a,911 <vscale x 8 x half> %b,912 <vscale x 8 x half> %c)913 ret <vscale x 8 x half> %out914}915 916define <vscale x 4 x float> @fnmla_s(<vscale x 4 x i1> %pg, <vscale x 4 x float> %a, <vscale x 4 x float> %b, <vscale x 4 x float> %c) {917; CHECK-LABEL: fnmla_s:918; CHECK: // %bb.0:919; CHECK-NEXT: fnmla z0.s, p0/m, z1.s, z2.s920; CHECK-NEXT: ret921 %out = call <vscale x 4 x float> @llvm.aarch64.sve.fnmla.nxv4f32(<vscale x 4 x i1> %pg,922 <vscale x 4 x float> %a,923 <vscale x 4 x float> %b,924 <vscale x 4 x float> %c)925 ret <vscale x 4 x float> %out926}927 928define <vscale x 2 x double> @fnmla_d(<vscale x 2 x i1> %pg, <vscale x 2 x double> %a, <vscale x 2 x double> %b, <vscale x 2 x double> %c) {929; CHECK-LABEL: fnmla_d:930; CHECK: // %bb.0:931; CHECK-NEXT: fnmla z0.d, p0/m, z1.d, z2.d932; CHECK-NEXT: ret933 %out = call <vscale x 2 x double> @llvm.aarch64.sve.fnmla.nxv2f64(<vscale x 2 x i1> %pg,934 <vscale x 2 x double> %a,935 <vscale x 2 x double> %b,936 <vscale x 2 x double> %c)937 ret <vscale x 2 x double> %out938}939 940;941; FNMLS942;943 944define <vscale x 8 x half> @fnmls_h(<vscale x 8 x i1> %pg, <vscale x 8 x half> %a, <vscale x 8 x half> %b, <vscale x 8 x half> %c) {945; CHECK-LABEL: fnmls_h:946; CHECK: // %bb.0:947; CHECK-NEXT: fnmls z0.h, p0/m, z1.h, z2.h948; CHECK-NEXT: ret949 %out = call <vscale x 8 x half> @llvm.aarch64.sve.fnmls.nxv8f16(<vscale x 8 x i1> %pg,950 <vscale x 8 x half> %a,951 <vscale x 8 x half> %b,952 <vscale x 8 x half> %c)953 ret <vscale x 8 x half> %out954}955 956define <vscale x 4 x float> @fnmls_s(<vscale x 4 x i1> %pg, <vscale x 4 x float> %a, <vscale x 4 x float> %b, <vscale x 4 x float> %c) {957; CHECK-LABEL: fnmls_s:958; CHECK: // %bb.0:959; CHECK-NEXT: fnmls z0.s, p0/m, z1.s, z2.s960; CHECK-NEXT: ret961 %out = call <vscale x 4 x float> @llvm.aarch64.sve.fnmls.nxv4f32(<vscale x 4 x i1> %pg,962 <vscale x 4 x float> %a,963 <vscale x 4 x float> %b,964 <vscale x 4 x float> %c)965 ret <vscale x 4 x float> %out966}967 968define <vscale x 2 x double> @fnmls_d(<vscale x 2 x i1> %pg, <vscale x 2 x double> %a, <vscale x 2 x double> %b, <vscale x 2 x double> %c) {969; CHECK-LABEL: fnmls_d:970; CHECK: // %bb.0:971; CHECK-NEXT: fnmls z0.d, p0/m, z1.d, z2.d972; CHECK-NEXT: ret973 %out = call <vscale x 2 x double> @llvm.aarch64.sve.fnmls.nxv2f64(<vscale x 2 x i1> %pg,974 <vscale x 2 x double> %a,975 <vscale x 2 x double> %b,976 <vscale x 2 x double> %c)977 ret <vscale x 2 x double> %out978}979 980;981; FNMSB982;983 984define <vscale x 8 x half> @fnmsb_h(<vscale x 8 x i1> %pg, <vscale x 8 x half> %a, <vscale x 8 x half> %b, <vscale x 8 x half> %c) {985; CHECK-LABEL: fnmsb_h:986; CHECK: // %bb.0:987; CHECK-NEXT: fnmsb z0.h, p0/m, z1.h, z2.h988; CHECK-NEXT: ret989 %out = call <vscale x 8 x half> @llvm.aarch64.sve.fnmsb.nxv8f16(<vscale x 8 x i1> %pg,990 <vscale x 8 x half> %a,991 <vscale x 8 x half> %b,992 <vscale x 8 x half> %c)993 ret <vscale x 8 x half> %out994}995 996define <vscale x 4 x float> @fnmsb_s(<vscale x 4 x i1> %pg, <vscale x 4 x float> %a, <vscale x 4 x float> %b, <vscale x 4 x float> %c) {997; CHECK-LABEL: fnmsb_s:998; CHECK: // %bb.0:999; CHECK-NEXT: fnmsb z0.s, p0/m, z1.s, z2.s1000; CHECK-NEXT: ret1001 %out = call <vscale x 4 x float> @llvm.aarch64.sve.fnmsb.nxv4f32(<vscale x 4 x i1> %pg,1002 <vscale x 4 x float> %a,1003 <vscale x 4 x float> %b,1004 <vscale x 4 x float> %c)1005 ret <vscale x 4 x float> %out1006}1007 1008define <vscale x 2 x double> @fnmsb_d(<vscale x 2 x i1> %pg, <vscale x 2 x double> %a, <vscale x 2 x double> %b, <vscale x 2 x double> %c) {1009; CHECK-LABEL: fnmsb_d:1010; CHECK: // %bb.0:1011; CHECK-NEXT: fnmsb z0.d, p0/m, z1.d, z2.d1012; CHECK-NEXT: ret1013 %out = call <vscale x 2 x double> @llvm.aarch64.sve.fnmsb.nxv2f64(<vscale x 2 x i1> %pg,1014 <vscale x 2 x double> %a,1015 <vscale x 2 x double> %b,1016 <vscale x 2 x double> %c)1017 ret <vscale x 2 x double> %out1018}1019 1020;1021; FRECPE1022;1023 1024define <vscale x 8 x half> @frecpe_h(<vscale x 8 x half> %a) {1025; CHECK-LABEL: frecpe_h:1026; CHECK: // %bb.0:1027; CHECK-NEXT: frecpe z0.h, z0.h1028; CHECK-NEXT: ret1029 %out = call <vscale x 8 x half> @llvm.aarch64.sve.frecpe.x.nxv8f16(<vscale x 8 x half> %a)1030 ret <vscale x 8 x half> %out1031}1032 1033define <vscale x 4 x float> @frecpe_s(<vscale x 4 x float> %a) {1034; CHECK-LABEL: frecpe_s:1035; CHECK: // %bb.0:1036; CHECK-NEXT: frecpe z0.s, z0.s1037; CHECK-NEXT: ret1038 %out = call <vscale x 4 x float> @llvm.aarch64.sve.frecpe.x.nxv4f32(<vscale x 4 x float> %a)1039 ret <vscale x 4 x float> %out1040}1041 1042define <vscale x 2 x double> @frecpe_d(<vscale x 2 x i1> %pg, <vscale x 2 x double> %a) {1043; CHECK-LABEL: frecpe_d:1044; CHECK: // %bb.0:1045; CHECK-NEXT: frecpe z0.d, z0.d1046; CHECK-NEXT: ret1047 %out = call <vscale x 2 x double> @llvm.aarch64.sve.frecpe.x.nxv2f64(<vscale x 2 x double> %a)1048 ret <vscale x 2 x double> %out1049}1050 1051;1052; FRECPX1053;1054 1055define <vscale x 8 x half> @frecpx_h(<vscale x 8 x half> %a, <vscale x 8 x i1> %pg, <vscale x 8 x half> %b) {1056; CHECK-LABEL: frecpx_h:1057; CHECK: // %bb.0:1058; CHECK-NEXT: frecpx z0.h, p0/m, z1.h1059; CHECK-NEXT: ret1060 %out = call <vscale x 8 x half> @llvm.aarch64.sve.frecpx.nxv8f16(<vscale x 8 x half> %a,1061 <vscale x 8 x i1> %pg,1062 <vscale x 8 x half> %b)1063 ret <vscale x 8 x half> %out1064}1065 1066define <vscale x 4 x float> @frecpx_s(<vscale x 4 x float> %a, <vscale x 4 x i1> %pg, <vscale x 4 x float> %b) {1067; CHECK-LABEL: frecpx_s:1068; CHECK: // %bb.0:1069; CHECK-NEXT: frecpx z0.s, p0/m, z1.s1070; CHECK-NEXT: ret1071 %out = call <vscale x 4 x float> @llvm.aarch64.sve.frecpx.nxv4f32(<vscale x 4 x float> %a,1072 <vscale x 4 x i1> %pg,1073 <vscale x 4 x float> %b)1074 ret <vscale x 4 x float> %out1075}1076 1077define <vscale x 2 x double> @frecpx_d(<vscale x 2 x double> %a, <vscale x 2 x i1> %pg, <vscale x 2 x double> %b) {1078; CHECK-LABEL: frecpx_d:1079; CHECK: // %bb.0:1080; CHECK-NEXT: frecpx z0.d, p0/m, z1.d1081; CHECK-NEXT: ret1082 %out = call <vscale x 2 x double> @llvm.aarch64.sve.frecpx.nxv2f64(<vscale x 2 x double> %a,1083 <vscale x 2 x i1> %pg,1084 <vscale x 2 x double> %b)1085 ret <vscale x 2 x double> %out1086}1087 1088;1089; FRINTA1090;1091 1092define <vscale x 8 x half> @frinta_h(<vscale x 8 x half> %a, <vscale x 8 x i1> %pg, <vscale x 8 x half> %b) {1093; CHECK-LABEL: frinta_h:1094; CHECK: // %bb.0:1095; CHECK-NEXT: frinta z0.h, p0/m, z1.h1096; CHECK-NEXT: ret1097 %out = call <vscale x 8 x half> @llvm.aarch64.sve.frinta.nxv8f16(<vscale x 8 x half> %a,1098 <vscale x 8 x i1> %pg,1099 <vscale x 8 x half> %b)1100 ret <vscale x 8 x half> %out1101}1102 1103define <vscale x 4 x float> @frinta_s(<vscale x 4 x float> %a, <vscale x 4 x i1> %pg, <vscale x 4 x float> %b) {1104; CHECK-LABEL: frinta_s:1105; CHECK: // %bb.0:1106; CHECK-NEXT: frinta z0.s, p0/m, z1.s1107; CHECK-NEXT: ret1108 %out = call <vscale x 4 x float> @llvm.aarch64.sve.frinta.nxv4f32(<vscale x 4 x float> %a,1109 <vscale x 4 x i1> %pg,1110 <vscale x 4 x float> %b)1111 ret <vscale x 4 x float> %out1112}1113 1114define <vscale x 2 x double> @frinta_d(<vscale x 2 x double> %a, <vscale x 2 x i1> %pg, <vscale x 2 x double> %b) {1115; CHECK-LABEL: frinta_d:1116; CHECK: // %bb.0:1117; CHECK-NEXT: frinta z0.d, p0/m, z1.d1118; CHECK-NEXT: ret1119 %out = call <vscale x 2 x double> @llvm.aarch64.sve.frinta.nxv2f64(<vscale x 2 x double> %a,1120 <vscale x 2 x i1> %pg,1121 <vscale x 2 x double> %b)1122 ret <vscale x 2 x double> %out1123}1124 1125;1126; FRINTI1127;1128 1129define <vscale x 8 x half> @frinti_h(<vscale x 8 x half> %a, <vscale x 8 x i1> %pg, <vscale x 8 x half> %b) {1130; CHECK-LABEL: frinti_h:1131; CHECK: // %bb.0:1132; CHECK-NEXT: frinti z0.h, p0/m, z1.h1133; CHECK-NEXT: ret1134 %out = call <vscale x 8 x half> @llvm.aarch64.sve.frinti.nxv8f16(<vscale x 8 x half> %a,1135 <vscale x 8 x i1> %pg,1136 <vscale x 8 x half> %b)1137 ret <vscale x 8 x half> %out1138}1139 1140define <vscale x 4 x float> @frinti_s(<vscale x 4 x float> %a, <vscale x 4 x i1> %pg, <vscale x 4 x float> %b) {1141; CHECK-LABEL: frinti_s:1142; CHECK: // %bb.0:1143; CHECK-NEXT: frinti z0.s, p0/m, z1.s1144; CHECK-NEXT: ret1145 %out = call <vscale x 4 x float> @llvm.aarch64.sve.frinti.nxv4f32(<vscale x 4 x float> %a,1146 <vscale x 4 x i1> %pg,1147 <vscale x 4 x float> %b)1148 ret <vscale x 4 x float> %out1149}1150 1151define <vscale x 2 x double> @frinti_d(<vscale x 2 x double> %a, <vscale x 2 x i1> %pg, <vscale x 2 x double> %b) {1152; CHECK-LABEL: frinti_d:1153; CHECK: // %bb.0:1154; CHECK-NEXT: frinti z0.d, p0/m, z1.d1155; CHECK-NEXT: ret1156 %out = call <vscale x 2 x double> @llvm.aarch64.sve.frinti.nxv2f64(<vscale x 2 x double> %a,1157 <vscale x 2 x i1> %pg,1158 <vscale x 2 x double> %b)1159 ret <vscale x 2 x double> %out1160}1161 1162;1163; FRINTM1164;1165 1166define <vscale x 8 x half> @frintm_h(<vscale x 8 x half> %a, <vscale x 8 x i1> %pg, <vscale x 8 x half> %b) {1167; CHECK-LABEL: frintm_h:1168; CHECK: // %bb.0:1169; CHECK-NEXT: frintm z0.h, p0/m, z1.h1170; CHECK-NEXT: ret1171 %out = call <vscale x 8 x half> @llvm.aarch64.sve.frintm.nxv8f16(<vscale x 8 x half> %a,1172 <vscale x 8 x i1> %pg,1173 <vscale x 8 x half> %b)1174 ret <vscale x 8 x half> %out1175}1176 1177define <vscale x 4 x float> @frintm_s(<vscale x 4 x float> %a, <vscale x 4 x i1> %pg, <vscale x 4 x float> %b) {1178; CHECK-LABEL: frintm_s:1179; CHECK: // %bb.0:1180; CHECK-NEXT: frintm z0.s, p0/m, z1.s1181; CHECK-NEXT: ret1182 %out = call <vscale x 4 x float> @llvm.aarch64.sve.frintm.nxv4f32(<vscale x 4 x float> %a,1183 <vscale x 4 x i1> %pg,1184 <vscale x 4 x float> %b)1185 ret <vscale x 4 x float> %out1186}1187 1188define <vscale x 2 x double> @frintm_d(<vscale x 2 x double> %a, <vscale x 2 x i1> %pg, <vscale x 2 x double> %b) {1189; CHECK-LABEL: frintm_d:1190; CHECK: // %bb.0:1191; CHECK-NEXT: frintm z0.d, p0/m, z1.d1192; CHECK-NEXT: ret1193 %out = call <vscale x 2 x double> @llvm.aarch64.sve.frintm.nxv2f64(<vscale x 2 x double> %a,1194 <vscale x 2 x i1> %pg,1195 <vscale x 2 x double> %b)1196 ret <vscale x 2 x double> %out1197}1198 1199;1200; FRINTN1201;1202 1203define <vscale x 8 x half> @frintn_h(<vscale x 8 x half> %a, <vscale x 8 x i1> %pg, <vscale x 8 x half> %b) {1204; CHECK-LABEL: frintn_h:1205; CHECK: // %bb.0:1206; CHECK-NEXT: frintn z0.h, p0/m, z1.h1207; CHECK-NEXT: ret1208 %out = call <vscale x 8 x half> @llvm.aarch64.sve.frintn.nxv8f16(<vscale x 8 x half> %a,1209 <vscale x 8 x i1> %pg,1210 <vscale x 8 x half> %b)1211 ret <vscale x 8 x half> %out1212}1213 1214define <vscale x 4 x float> @frintn_s(<vscale x 4 x float> %a, <vscale x 4 x i1> %pg, <vscale x 4 x float> %b) {1215; CHECK-LABEL: frintn_s:1216; CHECK: // %bb.0:1217; CHECK-NEXT: frintn z0.s, p0/m, z1.s1218; CHECK-NEXT: ret1219 %out = call <vscale x 4 x float> @llvm.aarch64.sve.frintn.nxv4f32(<vscale x 4 x float> %a,1220 <vscale x 4 x i1> %pg,1221 <vscale x 4 x float> %b)1222 ret <vscale x 4 x float> %out1223}1224 1225define <vscale x 2 x double> @frintn_d(<vscale x 2 x double> %a, <vscale x 2 x i1> %pg, <vscale x 2 x double> %b) {1226; CHECK-LABEL: frintn_d:1227; CHECK: // %bb.0:1228; CHECK-NEXT: frintn z0.d, p0/m, z1.d1229; CHECK-NEXT: ret1230 %out = call <vscale x 2 x double> @llvm.aarch64.sve.frintn.nxv2f64(<vscale x 2 x double> %a,1231 <vscale x 2 x i1> %pg,1232 <vscale x 2 x double> %b)1233 ret <vscale x 2 x double> %out1234}1235 1236;1237; FRINTP1238;1239 1240define <vscale x 8 x half> @frintp_h(<vscale x 8 x half> %a, <vscale x 8 x i1> %pg, <vscale x 8 x half> %b) {1241; CHECK-LABEL: frintp_h:1242; CHECK: // %bb.0:1243; CHECK-NEXT: frintp z0.h, p0/m, z1.h1244; CHECK-NEXT: ret1245 %out = call <vscale x 8 x half> @llvm.aarch64.sve.frintp.nxv8f16(<vscale x 8 x half> %a,1246 <vscale x 8 x i1> %pg,1247 <vscale x 8 x half> %b)1248 ret <vscale x 8 x half> %out1249}1250 1251define <vscale x 4 x float> @frintp_s(<vscale x 4 x float> %a, <vscale x 4 x i1> %pg, <vscale x 4 x float> %b) {1252; CHECK-LABEL: frintp_s:1253; CHECK: // %bb.0:1254; CHECK-NEXT: frintp z0.s, p0/m, z1.s1255; CHECK-NEXT: ret1256 %out = call <vscale x 4 x float> @llvm.aarch64.sve.frintp.nxv4f32(<vscale x 4 x float> %a,1257 <vscale x 4 x i1> %pg,1258 <vscale x 4 x float> %b)1259 ret <vscale x 4 x float> %out1260}1261 1262define <vscale x 2 x double> @frintp_d(<vscale x 2 x double> %a, <vscale x 2 x i1> %pg, <vscale x 2 x double> %b) {1263; CHECK-LABEL: frintp_d:1264; CHECK: // %bb.0:1265; CHECK-NEXT: frintp z0.d, p0/m, z1.d1266; CHECK-NEXT: ret1267 %out = call <vscale x 2 x double> @llvm.aarch64.sve.frintp.nxv2f64(<vscale x 2 x double> %a,1268 <vscale x 2 x i1> %pg,1269 <vscale x 2 x double> %b)1270 ret <vscale x 2 x double> %out1271}1272 1273;1274; FRINTX1275;1276 1277define <vscale x 8 x half> @frintx_h(<vscale x 8 x half> %a, <vscale x 8 x i1> %pg, <vscale x 8 x half> %b) {1278; CHECK-LABEL: frintx_h:1279; CHECK: // %bb.0:1280; CHECK-NEXT: frintx z0.h, p0/m, z1.h1281; CHECK-NEXT: ret1282 %out = call <vscale x 8 x half> @llvm.aarch64.sve.frintx.nxv8f16(<vscale x 8 x half> %a,1283 <vscale x 8 x i1> %pg,1284 <vscale x 8 x half> %b)1285 ret <vscale x 8 x half> %out1286}1287 1288define <vscale x 4 x float> @frintx_s(<vscale x 4 x float> %a, <vscale x 4 x i1> %pg, <vscale x 4 x float> %b) {1289; CHECK-LABEL: frintx_s:1290; CHECK: // %bb.0:1291; CHECK-NEXT: frintx z0.s, p0/m, z1.s1292; CHECK-NEXT: ret1293 %out = call <vscale x 4 x float> @llvm.aarch64.sve.frintx.nxv4f32(<vscale x 4 x float> %a,1294 <vscale x 4 x i1> %pg,1295 <vscale x 4 x float> %b)1296 ret <vscale x 4 x float> %out1297}1298 1299define <vscale x 2 x double> @frintx_d(<vscale x 2 x double> %a, <vscale x 2 x i1> %pg, <vscale x 2 x double> %b) {1300; CHECK-LABEL: frintx_d:1301; CHECK: // %bb.0:1302; CHECK-NEXT: frintx z0.d, p0/m, z1.d1303; CHECK-NEXT: ret1304 %out = call <vscale x 2 x double> @llvm.aarch64.sve.frintx.nxv2f64(<vscale x 2 x double> %a,1305 <vscale x 2 x i1> %pg,1306 <vscale x 2 x double> %b)1307 ret <vscale x 2 x double> %out1308}1309 1310;1311; FRINTZ1312;1313 1314define <vscale x 8 x half> @frintz_h(<vscale x 8 x half> %a, <vscale x 8 x i1> %pg, <vscale x 8 x half> %b) {1315; CHECK-LABEL: frintz_h:1316; CHECK: // %bb.0:1317; CHECK-NEXT: frintz z0.h, p0/m, z1.h1318; CHECK-NEXT: ret1319 %out = call <vscale x 8 x half> @llvm.aarch64.sve.frintz.nxv8f16(<vscale x 8 x half> %a,1320 <vscale x 8 x i1> %pg,1321 <vscale x 8 x half> %b)1322 ret <vscale x 8 x half> %out1323}1324 1325define <vscale x 4 x float> @frintz_s(<vscale x 4 x float> %a, <vscale x 4 x i1> %pg, <vscale x 4 x float> %b) {1326; CHECK-LABEL: frintz_s:1327; CHECK: // %bb.0:1328; CHECK-NEXT: frintz z0.s, p0/m, z1.s1329; CHECK-NEXT: ret1330 %out = call <vscale x 4 x float> @llvm.aarch64.sve.frintz.nxv4f32(<vscale x 4 x float> %a,1331 <vscale x 4 x i1> %pg,1332 <vscale x 4 x float> %b)1333 ret <vscale x 4 x float> %out1334}1335 1336define <vscale x 2 x double> @frintz_d(<vscale x 2 x double> %a, <vscale x 2 x i1> %pg, <vscale x 2 x double> %b) {1337; CHECK-LABEL: frintz_d:1338; CHECK: // %bb.0:1339; CHECK-NEXT: frintz z0.d, p0/m, z1.d1340; CHECK-NEXT: ret1341 %out = call <vscale x 2 x double> @llvm.aarch64.sve.frintz.nxv2f64(<vscale x 2 x double> %a,1342 <vscale x 2 x i1> %pg,1343 <vscale x 2 x double> %b)1344 ret <vscale x 2 x double> %out1345}1346 1347;1348; FRSQRTE1349;1350 1351define <vscale x 8 x half> @frsqrte_h(<vscale x 8 x half> %a) {1352; CHECK-LABEL: frsqrte_h:1353; CHECK: // %bb.0:1354; CHECK-NEXT: frsqrte z0.h, z0.h1355; CHECK-NEXT: ret1356 %out = call <vscale x 8 x half> @llvm.aarch64.sve.frsqrte.x.nxv8f16(<vscale x 8 x half> %a)1357 ret <vscale x 8 x half> %out1358}1359 1360define <vscale x 4 x float> @frsqrte_s(<vscale x 4 x float> %a) {1361; CHECK-LABEL: frsqrte_s:1362; CHECK: // %bb.0:1363; CHECK-NEXT: frsqrte z0.s, z0.s1364; CHECK-NEXT: ret1365 %out = call <vscale x 4 x float> @llvm.aarch64.sve.frsqrte.x.nxv4f32(<vscale x 4 x float> %a)1366 ret <vscale x 4 x float> %out1367}1368 1369define <vscale x 2 x double> @frsqrte_d(<vscale x 2 x i1> %pg, <vscale x 2 x double> %a) {1370; CHECK-LABEL: frsqrte_d:1371; CHECK: // %bb.0:1372; CHECK-NEXT: frsqrte z0.d, z0.d1373; CHECK-NEXT: ret1374 %out = call <vscale x 2 x double> @llvm.aarch64.sve.frsqrte.x.nxv2f64(<vscale x 2 x double> %a)1375 ret <vscale x 2 x double> %out1376}1377 1378;1379; FSCALE1380;1381 1382define <vscale x 8 x half> @fscale_h(<vscale x 8 x i1> %pg, <vscale x 8 x half> %a, <vscale x 8 x i16> %b) {1383; CHECK-LABEL: fscale_h:1384; CHECK: // %bb.0:1385; CHECK-NEXT: fscale z0.h, p0/m, z0.h, z1.h1386; CHECK-NEXT: ret1387 %out = call <vscale x 8 x half> @llvm.aarch64.sve.fscale.nxv8f16(<vscale x 8 x i1> %pg,1388 <vscale x 8 x half> %a,1389 <vscale x 8 x i16> %b)1390 ret <vscale x 8 x half> %out1391}1392 1393define <vscale x 4 x float> @fscale_s(<vscale x 4 x i1> %pg, <vscale x 4 x float> %a, <vscale x 4 x i32> %b) {1394; CHECK-LABEL: fscale_s:1395; CHECK: // %bb.0:1396; CHECK-NEXT: fscale z0.s, p0/m, z0.s, z1.s1397; CHECK-NEXT: ret1398 %out = call <vscale x 4 x float> @llvm.aarch64.sve.fscale.nxv4f32(<vscale x 4 x i1> %pg,1399 <vscale x 4 x float> %a,1400 <vscale x 4 x i32> %b)1401 ret <vscale x 4 x float> %out1402}1403 1404define <vscale x 2 x double> @fscale_d(<vscale x 2 x i1> %pg, <vscale x 2 x double> %a, <vscale x 2 x i64> %b) {1405; CHECK-LABEL: fscale_d:1406; CHECK: // %bb.0:1407; CHECK-NEXT: fscale z0.d, p0/m, z0.d, z1.d1408; CHECK-NEXT: ret1409 %out = call <vscale x 2 x double> @llvm.aarch64.sve.fscale.nxv2f64(<vscale x 2 x i1> %pg,1410 <vscale x 2 x double> %a,1411 <vscale x 2 x i64> %b)1412 ret <vscale x 2 x double> %out1413}1414 1415;1416; FSQRT1417;1418 1419define <vscale x 8 x half> @fsqrt_h(<vscale x 8 x half> %a, <vscale x 8 x i1> %pg, <vscale x 8 x half> %b) {1420; CHECK-LABEL: fsqrt_h:1421; CHECK: // %bb.0:1422; CHECK-NEXT: fsqrt z0.h, p0/m, z1.h1423; CHECK-NEXT: ret1424 %out = call <vscale x 8 x half> @llvm.aarch64.sve.fsqrt.nxv8f16(<vscale x 8 x half> %a,1425 <vscale x 8 x i1> %pg,1426 <vscale x 8 x half> %b)1427 ret <vscale x 8 x half> %out1428}1429 1430define <vscale x 4 x float> @fsqrt_s(<vscale x 4 x float> %a, <vscale x 4 x i1> %pg, <vscale x 4 x float> %b) {1431; CHECK-LABEL: fsqrt_s:1432; CHECK: // %bb.0:1433; CHECK-NEXT: fsqrt z0.s, p0/m, z1.s1434; CHECK-NEXT: ret1435 %out = call <vscale x 4 x float> @llvm.aarch64.sve.fsqrt.nxv4f32(<vscale x 4 x float> %a,1436 <vscale x 4 x i1> %pg,1437 <vscale x 4 x float> %b)1438 ret <vscale x 4 x float> %out1439}1440 1441define <vscale x 2 x double> @fsqrt_d(<vscale x 2 x double> %a, <vscale x 2 x i1> %pg, <vscale x 2 x double> %b) {1442; CHECK-LABEL: fsqrt_d:1443; CHECK: // %bb.0:1444; CHECK-NEXT: fsqrt z0.d, p0/m, z1.d1445; CHECK-NEXT: ret1446 %out = call <vscale x 2 x double> @llvm.aarch64.sve.fsqrt.nxv2f64(<vscale x 2 x double> %a,1447 <vscale x 2 x i1> %pg,1448 <vscale x 2 x double> %b)1449 ret <vscale x 2 x double> %out1450}1451 1452;1453; FSUB1454;1455 1456define <vscale x 8 x half> @fsub_h(<vscale x 8 x i1> %pg, <vscale x 8 x half> %a, <vscale x 8 x half> %b) {1457; CHECK-LABEL: fsub_h:1458; CHECK: // %bb.0:1459; CHECK-NEXT: fsub z0.h, p0/m, z0.h, z1.h1460; CHECK-NEXT: ret1461 %out = call <vscale x 8 x half> @llvm.aarch64.sve.fsub.nxv8f16(<vscale x 8 x i1> %pg,1462 <vscale x 8 x half> %a,1463 <vscale x 8 x half> %b)1464 ret <vscale x 8 x half> %out1465}1466 1467define <vscale x 4 x float> @fsub_s(<vscale x 4 x i1> %pg, <vscale x 4 x float> %a, <vscale x 4 x float> %b) {1468; CHECK-LABEL: fsub_s:1469; CHECK: // %bb.0:1470; CHECK-NEXT: fsub z0.s, p0/m, z0.s, z1.s1471; CHECK-NEXT: ret1472 %out = call <vscale x 4 x float> @llvm.aarch64.sve.fsub.nxv4f32(<vscale x 4 x i1> %pg,1473 <vscale x 4 x float> %a,1474 <vscale x 4 x float> %b)1475 ret <vscale x 4 x float> %out1476}1477 1478define <vscale x 2 x double> @fsub_d(<vscale x 2 x i1> %pg, <vscale x 2 x double> %a, <vscale x 2 x double> %b) {1479; CHECK-LABEL: fsub_d:1480; CHECK: // %bb.0:1481; CHECK-NEXT: fsub z0.d, p0/m, z0.d, z1.d1482; CHECK-NEXT: ret1483 %out = call <vscale x 2 x double> @llvm.aarch64.sve.fsub.nxv2f64(<vscale x 2 x i1> %pg,1484 <vscale x 2 x double> %a,1485 <vscale x 2 x double> %b)1486 ret <vscale x 2 x double> %out1487}1488 1489;1490; FSUBR1491;1492 1493define <vscale x 8 x half> @fsubr_h(<vscale x 8 x i1> %pg, <vscale x 8 x half> %a, <vscale x 8 x half> %b) {1494; CHECK-LABEL: fsubr_h:1495; CHECK: // %bb.0:1496; CHECK-NEXT: fsubr z0.h, p0/m, z0.h, z1.h1497; CHECK-NEXT: ret1498 %out = call <vscale x 8 x half> @llvm.aarch64.sve.fsubr.nxv8f16(<vscale x 8 x i1> %pg,1499 <vscale x 8 x half> %a,1500 <vscale x 8 x half> %b)1501 ret <vscale x 8 x half> %out1502}1503 1504define <vscale x 4 x float> @fsubr_s(<vscale x 4 x i1> %pg, <vscale x 4 x float> %a, <vscale x 4 x float> %b) {1505; CHECK-LABEL: fsubr_s:1506; CHECK: // %bb.0:1507; CHECK-NEXT: fsubr z0.s, p0/m, z0.s, z1.s1508; CHECK-NEXT: ret1509 %out = call <vscale x 4 x float> @llvm.aarch64.sve.fsubr.nxv4f32(<vscale x 4 x i1> %pg,1510 <vscale x 4 x float> %a,1511 <vscale x 4 x float> %b)1512 ret <vscale x 4 x float> %out1513}1514 1515define <vscale x 2 x double> @fsubr_d(<vscale x 2 x i1> %pg, <vscale x 2 x double> %a, <vscale x 2 x double> %b) {1516; CHECK-LABEL: fsubr_d:1517; CHECK: // %bb.0:1518; CHECK-NEXT: fsubr z0.d, p0/m, z0.d, z1.d1519; CHECK-NEXT: ret1520 %out = call <vscale x 2 x double> @llvm.aarch64.sve.fsubr.nxv2f64(<vscale x 2 x i1> %pg,1521 <vscale x 2 x double> %a,1522 <vscale x 2 x double> %b)1523 ret <vscale x 2 x double> %out1524}1525 1526;1527; FTMAD1528;1529 1530define <vscale x 8 x half> @ftmad_h(<vscale x 8 x half> %a, <vscale x 8 x half> %b) {1531; CHECK-LABEL: ftmad_h:1532; CHECK: // %bb.0:1533; CHECK-NEXT: ftmad z0.h, z0.h, z1.h, #01534; CHECK-NEXT: ret1535 %out = call <vscale x 8 x half> @llvm.aarch64.sve.ftmad.x.nxv8f16(<vscale x 8 x half> %a,1536 <vscale x 8 x half> %b,1537 i32 0)1538 ret <vscale x 8 x half> %out1539}1540 1541define <vscale x 4 x float> @ftmad_s(<vscale x 4 x float> %a, <vscale x 4 x float> %b) {1542; CHECK-LABEL: ftmad_s:1543; CHECK: // %bb.0:1544; CHECK-NEXT: ftmad z0.s, z0.s, z1.s, #01545; CHECK-NEXT: ret1546 %out = call <vscale x 4 x float> @llvm.aarch64.sve.ftmad.x.nxv4f32(<vscale x 4 x float> %a,1547 <vscale x 4 x float> %b,1548 i32 0)1549 ret <vscale x 4 x float> %out1550}1551 1552define <vscale x 2 x double> @ftmad_d(<vscale x 2 x double> %a, <vscale x 2 x double> %b) {1553; CHECK-LABEL: ftmad_d:1554; CHECK: // %bb.0:1555; CHECK-NEXT: ftmad z0.d, z0.d, z1.d, #71556; CHECK-NEXT: ret1557 %out = call <vscale x 2 x double> @llvm.aarch64.sve.ftmad.x.nxv2f64(<vscale x 2 x double> %a,1558 <vscale x 2 x double> %b,1559 i32 7)1560 ret <vscale x 2 x double> %out1561}1562 1563;1564; FTSMUL1565;1566 1567define <vscale x 8 x half> @ftsmul_h(<vscale x 8 x half> %a, <vscale x 8 x i16> %b) {1568; CHECK-LABEL: ftsmul_h:1569; CHECK: // %bb.0:1570; CHECK-NEXT: ftsmul z0.h, z0.h, z1.h1571; CHECK-NEXT: ret1572 %out = call <vscale x 8 x half> @llvm.aarch64.sve.ftsmul.x.nxv8f16(<vscale x 8 x half> %a,1573 <vscale x 8 x i16> %b)1574 ret <vscale x 8 x half> %out1575}1576 1577define <vscale x 4 x float> @ftsmul_s(<vscale x 4 x float> %a, <vscale x 4 x i32> %b) {1578; CHECK-LABEL: ftsmul_s:1579; CHECK: // %bb.0:1580; CHECK-NEXT: ftsmul z0.s, z0.s, z1.s1581; CHECK-NEXT: ret1582 %out = call <vscale x 4 x float> @llvm.aarch64.sve.ftsmul.x.nxv4f32(<vscale x 4 x float> %a,1583 <vscale x 4 x i32> %b)1584 ret <vscale x 4 x float> %out1585}1586 1587define <vscale x 2 x double> @ftsmul_d(<vscale x 2 x double> %a, <vscale x 2 x i64> %b) {1588; CHECK-LABEL: ftsmul_d:1589; CHECK: // %bb.0:1590; CHECK-NEXT: ftsmul z0.d, z0.d, z1.d1591; CHECK-NEXT: ret1592 %out = call <vscale x 2 x double> @llvm.aarch64.sve.ftsmul.x.nxv2f64(<vscale x 2 x double> %a,1593 <vscale x 2 x i64> %b)1594 ret <vscale x 2 x double> %out1595}1596 1597;1598; FTSSEL1599;1600 1601define <vscale x 8 x half> @ftssel_h(<vscale x 8 x half> %a, <vscale x 8 x i16> %b) {1602; CHECK-LABEL: ftssel_h:1603; CHECK: // %bb.0:1604; CHECK-NEXT: ftssel z0.h, z0.h, z1.h1605; CHECK-NEXT: ret1606 %out = call <vscale x 8 x half> @llvm.aarch64.sve.ftssel.x.nxv8f16(<vscale x 8 x half> %a,1607 <vscale x 8 x i16> %b)1608 ret <vscale x 8 x half> %out1609}1610 1611define <vscale x 4 x float> @ftssel_s(<vscale x 4 x float> %a, <vscale x 4 x i32> %b) {1612; CHECK-LABEL: ftssel_s:1613; CHECK: // %bb.0:1614; CHECK-NEXT: ftssel z0.s, z0.s, z1.s1615; CHECK-NEXT: ret1616 %out = call <vscale x 4 x float> @llvm.aarch64.sve.ftssel.x.nxv4f32(<vscale x 4 x float> %a,1617 <vscale x 4 x i32> %b)1618 ret <vscale x 4 x float> %out1619}1620 1621define <vscale x 2 x double> @ftssel_d(<vscale x 2 x double> %a, <vscale x 2 x i64> %b) {1622; CHECK-LABEL: ftssel_d:1623; CHECK: // %bb.0:1624; CHECK-NEXT: ftssel z0.d, z0.d, z1.d1625; CHECK-NEXT: ret1626 %out = call <vscale x 2 x double> @llvm.aarch64.sve.ftssel.x.nxv2f64(<vscale x 2 x double> %a,1627 <vscale x 2 x i64> %b)1628 ret <vscale x 2 x double> %out1629}1630 1631declare <vscale x 8 x half> @llvm.aarch64.sve.fabd.nxv8f16(<vscale x 8 x i1>, <vscale x 8 x half>, <vscale x 8 x half>)1632declare <vscale x 4 x float> @llvm.aarch64.sve.fabd.nxv4f32(<vscale x 4 x i1>, <vscale x 4 x float>, <vscale x 4 x float>)1633declare <vscale x 2 x double> @llvm.aarch64.sve.fabd.nxv2f64(<vscale x 2 x i1>, <vscale x 2 x double>, <vscale x 2 x double>)1634 1635declare <vscale x 8 x half> @llvm.aarch64.sve.fabs.nxv8f16(<vscale x 8 x half>, <vscale x 8 x i1>, <vscale x 8 x half>)1636declare <vscale x 4 x float> @llvm.aarch64.sve.fabs.nxv4f32(<vscale x 4 x float>, <vscale x 4 x i1>, <vscale x 4 x float>)1637declare <vscale x 2 x double> @llvm.aarch64.sve.fabs.nxv2f64(<vscale x 2 x double>, <vscale x 2 x i1>, <vscale x 2 x double>)1638declare <vscale x 8 x bfloat> @llvm.aarch64.sve.fabs.nxv8bf16(<vscale x 8 x bfloat>, <vscale x 8 x i1>, <vscale x 8 x bfloat>)1639 1640declare <vscale x 8 x half> @llvm.aarch64.sve.fadd.nxv8f16(<vscale x 8 x i1>, <vscale x 8 x half>, <vscale x 8 x half>)1641declare <vscale x 4 x float> @llvm.aarch64.sve.fadd.nxv4f32(<vscale x 4 x i1>, <vscale x 4 x float>, <vscale x 4 x float>)1642declare <vscale x 2 x double> @llvm.aarch64.sve.fadd.nxv2f64(<vscale x 2 x i1>, <vscale x 2 x double>, <vscale x 2 x double>)1643 1644declare <vscale x 8 x half> @llvm.aarch64.sve.fcadd.nxv8f16(<vscale x 8 x i1>, <vscale x 8 x half>, <vscale x 8 x half>, i32)1645declare <vscale x 4 x float> @llvm.aarch64.sve.fcadd.nxv4f32(<vscale x 4 x i1>, <vscale x 4 x float>, <vscale x 4 x float>, i32)1646declare <vscale x 2 x double> @llvm.aarch64.sve.fcadd.nxv2f64(<vscale x 2 x i1>, <vscale x 2 x double>, <vscale x 2 x double>, i32)1647 1648declare <vscale x 8 x half> @llvm.aarch64.sve.fcmla.nxv8f16(<vscale x 8 x i1>, <vscale x 8 x half>, <vscale x 8 x half>, <vscale x 8 x half>, i32)1649declare <vscale x 4 x float> @llvm.aarch64.sve.fcmla.nxv4f32(<vscale x 4 x i1>, <vscale x 4 x float>, <vscale x 4 x float>, <vscale x 4 x float>, i32)1650declare <vscale x 2 x double> @llvm.aarch64.sve.fcmla.nxv2f64(<vscale x 2 x i1>, <vscale x 2 x double>, <vscale x 2 x double>, <vscale x 2 x double>, i32)1651 1652declare <vscale x 8 x half> @llvm.aarch64.sve.fcmla.lane.nxv8f16(<vscale x 8 x half>, <vscale x 8 x half>, <vscale x 8 x half>, i32, i32)1653declare <vscale x 4 x float> @llvm.aarch64.sve.fcmla.lane.nxv4f32(<vscale x 4 x float>, <vscale x 4 x float>, <vscale x 4 x float>, i32, i32)1654 1655declare <vscale x 8 x half> @llvm.aarch64.sve.fdiv.nxv8f16(<vscale x 8 x i1>, <vscale x 8 x half>, <vscale x 8 x half>)1656declare <vscale x 4 x float> @llvm.aarch64.sve.fdiv.nxv4f32(<vscale x 4 x i1>, <vscale x 4 x float>, <vscale x 4 x float>)1657declare <vscale x 2 x double> @llvm.aarch64.sve.fdiv.nxv2f64(<vscale x 2 x i1>, <vscale x 2 x double>, <vscale x 2 x double>)1658 1659declare <vscale x 8 x half> @llvm.aarch64.sve.fdivr.nxv8f16(<vscale x 8 x i1>, <vscale x 8 x half>, <vscale x 8 x half>)1660declare <vscale x 4 x float> @llvm.aarch64.sve.fdivr.nxv4f32(<vscale x 4 x i1>, <vscale x 4 x float>, <vscale x 4 x float>)1661declare <vscale x 2 x double> @llvm.aarch64.sve.fdivr.nxv2f64(<vscale x 2 x i1>, <vscale x 2 x double>, <vscale x 2 x double>)1662 1663declare <vscale x 8 x half> @llvm.aarch64.sve.fmad.nxv8f16(<vscale x 8 x i1>, <vscale x 8 x half>, <vscale x 8 x half>, <vscale x 8 x half>)1664declare <vscale x 4 x float> @llvm.aarch64.sve.fmad.nxv4f32(<vscale x 4 x i1>, <vscale x 4 x float>, <vscale x 4 x float>, <vscale x 4 x float>)1665declare <vscale x 2 x double> @llvm.aarch64.sve.fmad.nxv2f64(<vscale x 2 x i1>, <vscale x 2 x double>, <vscale x 2 x double>, <vscale x 2 x double>)1666 1667declare <vscale x 8 x half> @llvm.aarch64.sve.fmax.nxv8f16(<vscale x 8 x i1>, <vscale x 8 x half>, <vscale x 8 x half>)1668declare <vscale x 4 x float> @llvm.aarch64.sve.fmax.nxv4f32(<vscale x 4 x i1>, <vscale x 4 x float>, <vscale x 4 x float>)1669declare <vscale x 2 x double> @llvm.aarch64.sve.fmax.nxv2f64(<vscale x 2 x i1>, <vscale x 2 x double>, <vscale x 2 x double>)1670 1671declare <vscale x 8 x half> @llvm.aarch64.sve.fmaxnm.nxv8f16(<vscale x 8 x i1>, <vscale x 8 x half>, <vscale x 8 x half>)1672declare <vscale x 4 x float> @llvm.aarch64.sve.fmaxnm.nxv4f32(<vscale x 4 x i1>, <vscale x 4 x float>, <vscale x 4 x float>)1673declare <vscale x 2 x double> @llvm.aarch64.sve.fmaxnm.nxv2f64(<vscale x 2 x i1>, <vscale x 2 x double>, <vscale x 2 x double>)1674 1675declare <vscale x 8 x half> @llvm.aarch64.sve.fmin.nxv8f16(<vscale x 8 x i1>, <vscale x 8 x half>, <vscale x 8 x half>)1676declare <vscale x 4 x float> @llvm.aarch64.sve.fmin.nxv4f32(<vscale x 4 x i1>, <vscale x 4 x float>, <vscale x 4 x float>)1677declare <vscale x 2 x double> @llvm.aarch64.sve.fmin.nxv2f64(<vscale x 2 x i1>, <vscale x 2 x double>, <vscale x 2 x double>)1678 1679declare <vscale x 8 x half> @llvm.aarch64.sve.fminnm.nxv8f16(<vscale x 8 x i1>, <vscale x 8 x half>, <vscale x 8 x half>)1680declare <vscale x 4 x float> @llvm.aarch64.sve.fminnm.nxv4f32(<vscale x 4 x i1>, <vscale x 4 x float>, <vscale x 4 x float>)1681declare <vscale x 2 x double> @llvm.aarch64.sve.fminnm.nxv2f64(<vscale x 2 x i1>, <vscale x 2 x double>, <vscale x 2 x double>)1682 1683declare <vscale x 8 x half> @llvm.aarch64.sve.fmla.nxv8f16(<vscale x 8 x i1>, <vscale x 8 x half>, <vscale x 8 x half>, <vscale x 8 x half>)1684declare <vscale x 4 x float> @llvm.aarch64.sve.fmla.nxv4f32(<vscale x 4 x i1>, <vscale x 4 x float>, <vscale x 4 x float>, <vscale x 4 x float>)1685declare <vscale x 2 x double> @llvm.aarch64.sve.fmla.nxv2f64(<vscale x 2 x i1>, <vscale x 2 x double>, <vscale x 2 x double>, <vscale x 2 x double>)1686 1687declare <vscale x 8 x half> @llvm.aarch64.sve.fmla.lane.nxv8f16(<vscale x 8 x half>, <vscale x 8 x half>, <vscale x 8 x half>, i32)1688declare <vscale x 4 x float> @llvm.aarch64.sve.fmla.lane.nxv4f32(<vscale x 4 x float>, <vscale x 4 x float>, <vscale x 4 x float>, i32)1689declare <vscale x 2 x double> @llvm.aarch64.sve.fmla.lane.nxv2f64(<vscale x 2 x double>, <vscale x 2 x double>, <vscale x 2 x double>, i32)1690 1691declare <vscale x 8 x half> @llvm.aarch64.sve.fmls.nxv8f16(<vscale x 8 x i1>, <vscale x 8 x half>, <vscale x 8 x half>, <vscale x 8 x half>)1692declare <vscale x 4 x float> @llvm.aarch64.sve.fmls.nxv4f32(<vscale x 4 x i1>, <vscale x 4 x float>, <vscale x 4 x float>, <vscale x 4 x float>)1693declare <vscale x 2 x double> @llvm.aarch64.sve.fmls.nxv2f64(<vscale x 2 x i1>, <vscale x 2 x double>, <vscale x 2 x double>, <vscale x 2 x double>)1694 1695declare <vscale x 8 x half> @llvm.aarch64.sve.fmls.lane.nxv8f16(<vscale x 8 x half>, <vscale x 8 x half>, <vscale x 8 x half>, i32)1696declare <vscale x 4 x float> @llvm.aarch64.sve.fmls.lane.nxv4f32(<vscale x 4 x float>, <vscale x 4 x float>, <vscale x 4 x float>, i32)1697declare <vscale x 2 x double> @llvm.aarch64.sve.fmls.lane.nxv2f64(<vscale x 2 x double>, <vscale x 2 x double>, <vscale x 2 x double>, i32)1698 1699declare <vscale x 8 x half> @llvm.aarch64.sve.fmsb.nxv8f16(<vscale x 8 x i1>, <vscale x 8 x half>, <vscale x 8 x half>, <vscale x 8 x half>)1700declare <vscale x 4 x float> @llvm.aarch64.sve.fmsb.nxv4f32(<vscale x 4 x i1>, <vscale x 4 x float>, <vscale x 4 x float>, <vscale x 4 x float>)1701declare <vscale x 2 x double> @llvm.aarch64.sve.fmsb.nxv2f64(<vscale x 2 x i1>, <vscale x 2 x double>, <vscale x 2 x double>, <vscale x 2 x double>)1702 1703declare <vscale x 8 x half> @llvm.aarch64.sve.fmul.nxv8f16(<vscale x 8 x i1>, <vscale x 8 x half>, <vscale x 8 x half>)1704declare <vscale x 4 x float> @llvm.aarch64.sve.fmul.nxv4f32(<vscale x 4 x i1>, <vscale x 4 x float>, <vscale x 4 x float>)1705declare <vscale x 2 x double> @llvm.aarch64.sve.fmul.nxv2f64(<vscale x 2 x i1>, <vscale x 2 x double>, <vscale x 2 x double>)1706 1707declare <vscale x 8 x half> @llvm.aarch64.sve.fmul.lane.nxv8f16(<vscale x 8 x half>, <vscale x 8 x half>, i32)1708declare <vscale x 4 x float> @llvm.aarch64.sve.fmul.lane.nxv4f32(<vscale x 4 x float>, <vscale x 4 x float>, i32)1709declare <vscale x 2 x double> @llvm.aarch64.sve.fmul.lane.nxv2f64(<vscale x 2 x double>, <vscale x 2 x double>, i32)1710 1711declare <vscale x 8 x half> @llvm.aarch64.sve.fmulx.nxv8f16(<vscale x 8 x i1>, <vscale x 8 x half>, <vscale x 8 x half>)1712declare <vscale x 4 x float> @llvm.aarch64.sve.fmulx.nxv4f32(<vscale x 4 x i1>, <vscale x 4 x float>, <vscale x 4 x float>)1713declare <vscale x 2 x double> @llvm.aarch64.sve.fmulx.nxv2f64(<vscale x 2 x i1>, <vscale x 2 x double>, <vscale x 2 x double>)1714 1715declare <vscale x 8 x half> @llvm.aarch64.sve.fneg.nxv8f16(<vscale x 8 x half>, <vscale x 8 x i1>, <vscale x 8 x half>)1716declare <vscale x 4 x float> @llvm.aarch64.sve.fneg.nxv4f32(<vscale x 4 x float>, <vscale x 4 x i1>, <vscale x 4 x float>)1717declare <vscale x 2 x double> @llvm.aarch64.sve.fneg.nxv2f64(<vscale x 2 x double>, <vscale x 2 x i1>, <vscale x 2 x double>)1718declare <vscale x 8 x bfloat> @llvm.aarch64.sve.fneg.nxv8bf16(<vscale x 8 x bfloat>, <vscale x 8 x i1>, <vscale x 8 x bfloat>)1719 1720declare <vscale x 8 x half> @llvm.aarch64.sve.fnmad.nxv8f16(<vscale x 8 x i1>, <vscale x 8 x half>, <vscale x 8 x half>, <vscale x 8 x half>)1721declare <vscale x 4 x float> @llvm.aarch64.sve.fnmad.nxv4f32(<vscale x 4 x i1>, <vscale x 4 x float>, <vscale x 4 x float>, <vscale x 4 x float>)1722declare <vscale x 2 x double> @llvm.aarch64.sve.fnmad.nxv2f64(<vscale x 2 x i1>, <vscale x 2 x double>, <vscale x 2 x double>, <vscale x 2 x double>)1723 1724declare <vscale x 8 x half> @llvm.aarch64.sve.fnmla.nxv8f16(<vscale x 8 x i1>, <vscale x 8 x half>, <vscale x 8 x half>, <vscale x 8 x half>)1725declare <vscale x 4 x float> @llvm.aarch64.sve.fnmla.nxv4f32(<vscale x 4 x i1>, <vscale x 4 x float>, <vscale x 4 x float>, <vscale x 4 x float>)1726declare <vscale x 2 x double> @llvm.aarch64.sve.fnmla.nxv2f64(<vscale x 2 x i1>, <vscale x 2 x double>, <vscale x 2 x double>, <vscale x 2 x double>)1727 1728declare <vscale x 8 x half> @llvm.aarch64.sve.fnmls.nxv8f16(<vscale x 8 x i1>, <vscale x 8 x half>, <vscale x 8 x half>, <vscale x 8 x half>)1729declare <vscale x 4 x float> @llvm.aarch64.sve.fnmls.nxv4f32(<vscale x 4 x i1>, <vscale x 4 x float>, <vscale x 4 x float>, <vscale x 4 x float>)1730declare <vscale x 2 x double> @llvm.aarch64.sve.fnmls.nxv2f64(<vscale x 2 x i1>, <vscale x 2 x double>, <vscale x 2 x double>, <vscale x 2 x double>)1731 1732declare <vscale x 8 x half> @llvm.aarch64.sve.fnmsb.nxv8f16(<vscale x 8 x i1>, <vscale x 8 x half>, <vscale x 8 x half>, <vscale x 8 x half>)1733declare <vscale x 4 x float> @llvm.aarch64.sve.fnmsb.nxv4f32(<vscale x 4 x i1>, <vscale x 4 x float>, <vscale x 4 x float>, <vscale x 4 x float>)1734declare <vscale x 2 x double> @llvm.aarch64.sve.fnmsb.nxv2f64(<vscale x 2 x i1>, <vscale x 2 x double>, <vscale x 2 x double>, <vscale x 2 x double>)1735 1736declare <vscale x 8 x half> @llvm.aarch64.sve.frecpe.x.nxv8f16(<vscale x 8 x half>)1737declare <vscale x 4 x float> @llvm.aarch64.sve.frecpe.x.nxv4f32(<vscale x 4 x float>)1738declare <vscale x 2 x double> @llvm.aarch64.sve.frecpe.x.nxv2f64(<vscale x 2 x double>)1739 1740declare <vscale x 8 x half> @llvm.aarch64.sve.frecpx.nxv8f16(<vscale x 8 x half>, <vscale x 8 x i1>, <vscale x 8 x half>)1741declare <vscale x 4 x float> @llvm.aarch64.sve.frecpx.nxv4f32(<vscale x 4 x float>, <vscale x 4 x i1>, <vscale x 4 x float>)1742declare <vscale x 2 x double> @llvm.aarch64.sve.frecpx.nxv2f64(<vscale x 2 x double>, <vscale x 2 x i1>, <vscale x 2 x double>)1743 1744declare <vscale x 8 x half> @llvm.aarch64.sve.frinta.nxv8f16(<vscale x 8 x half>, <vscale x 8 x i1>, <vscale x 8 x half>)1745declare <vscale x 4 x float> @llvm.aarch64.sve.frinta.nxv4f32(<vscale x 4 x float>, <vscale x 4 x i1>, <vscale x 4 x float>)1746declare <vscale x 2 x double> @llvm.aarch64.sve.frinta.nxv2f64(<vscale x 2 x double>, <vscale x 2 x i1>, <vscale x 2 x double>)1747 1748declare <vscale x 8 x half> @llvm.aarch64.sve.frinti.nxv8f16(<vscale x 8 x half>, <vscale x 8 x i1>, <vscale x 8 x half>)1749declare <vscale x 4 x float> @llvm.aarch64.sve.frinti.nxv4f32(<vscale x 4 x float>, <vscale x 4 x i1>, <vscale x 4 x float>)1750declare <vscale x 2 x double> @llvm.aarch64.sve.frinti.nxv2f64(<vscale x 2 x double>, <vscale x 2 x i1>, <vscale x 2 x double>)1751 1752declare <vscale x 8 x half> @llvm.aarch64.sve.frintm.nxv8f16(<vscale x 8 x half>, <vscale x 8 x i1>, <vscale x 8 x half>)1753declare <vscale x 4 x float> @llvm.aarch64.sve.frintm.nxv4f32(<vscale x 4 x float>, <vscale x 4 x i1>, <vscale x 4 x float>)1754declare <vscale x 2 x double> @llvm.aarch64.sve.frintm.nxv2f64(<vscale x 2 x double>, <vscale x 2 x i1>, <vscale x 2 x double>)1755 1756declare <vscale x 8 x half> @llvm.aarch64.sve.frintn.nxv8f16(<vscale x 8 x half>, <vscale x 8 x i1>, <vscale x 8 x half>)1757declare <vscale x 4 x float> @llvm.aarch64.sve.frintn.nxv4f32(<vscale x 4 x float>, <vscale x 4 x i1>, <vscale x 4 x float>)1758declare <vscale x 2 x double> @llvm.aarch64.sve.frintn.nxv2f64(<vscale x 2 x double>, <vscale x 2 x i1>, <vscale x 2 x double>)1759 1760declare <vscale x 8 x half> @llvm.aarch64.sve.frintp.nxv8f16(<vscale x 8 x half>, <vscale x 8 x i1>, <vscale x 8 x half>)1761declare <vscale x 4 x float> @llvm.aarch64.sve.frintp.nxv4f32(<vscale x 4 x float>, <vscale x 4 x i1>, <vscale x 4 x float>)1762declare <vscale x 2 x double> @llvm.aarch64.sve.frintp.nxv2f64(<vscale x 2 x double>, <vscale x 2 x i1>, <vscale x 2 x double>)1763 1764declare <vscale x 8 x half> @llvm.aarch64.sve.frintx.nxv8f16(<vscale x 8 x half>, <vscale x 8 x i1>, <vscale x 8 x half>)1765declare <vscale x 4 x float> @llvm.aarch64.sve.frintx.nxv4f32(<vscale x 4 x float>, <vscale x 4 x i1>, <vscale x 4 x float>)1766declare <vscale x 2 x double> @llvm.aarch64.sve.frintx.nxv2f64(<vscale x 2 x double>, <vscale x 2 x i1>, <vscale x 2 x double>)1767 1768declare <vscale x 8 x half> @llvm.aarch64.sve.frintz.nxv8f16(<vscale x 8 x half>, <vscale x 8 x i1>, <vscale x 8 x half>)1769declare <vscale x 4 x float> @llvm.aarch64.sve.frintz.nxv4f32(<vscale x 4 x float>, <vscale x 4 x i1>, <vscale x 4 x float>)1770declare <vscale x 2 x double> @llvm.aarch64.sve.frintz.nxv2f64(<vscale x 2 x double>, <vscale x 2 x i1>, <vscale x 2 x double>)1771 1772declare <vscale x 8 x half> @llvm.aarch64.sve.frsqrte.x.nxv8f16(<vscale x 8 x half>)1773declare <vscale x 4 x float> @llvm.aarch64.sve.frsqrte.x.nxv4f32(<vscale x 4 x float>)1774declare <vscale x 2 x double> @llvm.aarch64.sve.frsqrte.x.nxv2f64(<vscale x 2 x double>)1775 1776declare <vscale x 8 x half> @llvm.aarch64.sve.fscale.nxv8f16(<vscale x 8 x i1>, <vscale x 8 x half>, <vscale x 8 x i16>)1777declare <vscale x 4 x float> @llvm.aarch64.sve.fscale.nxv4f32(<vscale x 4 x i1>, <vscale x 4 x float>, <vscale x 4 x i32>)1778declare <vscale x 2 x double> @llvm.aarch64.sve.fscale.nxv2f64(<vscale x 2 x i1>, <vscale x 2 x double>, <vscale x 2 x i64>)1779 1780declare <vscale x 8 x half> @llvm.aarch64.sve.fsqrt.nxv8f16(<vscale x 8 x half>, <vscale x 8 x i1>, <vscale x 8 x half>)1781declare <vscale x 4 x float> @llvm.aarch64.sve.fsqrt.nxv4f32(<vscale x 4 x float>, <vscale x 4 x i1>, <vscale x 4 x float>)1782declare <vscale x 2 x double> @llvm.aarch64.sve.fsqrt.nxv2f64(<vscale x 2 x double>, <vscale x 2 x i1>, <vscale x 2 x double>)1783 1784declare <vscale x 8 x half> @llvm.aarch64.sve.fsub.nxv8f16(<vscale x 8 x i1>, <vscale x 8 x half>, <vscale x 8 x half>)1785declare <vscale x 4 x float> @llvm.aarch64.sve.fsub.nxv4f32(<vscale x 4 x i1>, <vscale x 4 x float>, <vscale x 4 x float>)1786declare <vscale x 2 x double> @llvm.aarch64.sve.fsub.nxv2f64(<vscale x 2 x i1>, <vscale x 2 x double>, <vscale x 2 x double>)1787 1788declare <vscale x 8 x half> @llvm.aarch64.sve.fsubr.nxv8f16(<vscale x 8 x i1>, <vscale x 8 x half>, <vscale x 8 x half>)1789declare <vscale x 4 x float> @llvm.aarch64.sve.fsubr.nxv4f32(<vscale x 4 x i1>, <vscale x 4 x float>, <vscale x 4 x float>)1790declare <vscale x 2 x double> @llvm.aarch64.sve.fsubr.nxv2f64(<vscale x 2 x i1>, <vscale x 2 x double>, <vscale x 2 x double>)1791 1792declare <vscale x 8 x half> @llvm.aarch64.sve.ftmad.x.nxv8f16(<vscale x 8 x half>, <vscale x 8 x half>, i32)1793declare <vscale x 4 x float> @llvm.aarch64.sve.ftmad.x.nxv4f32(<vscale x 4 x float>, <vscale x 4 x float>, i32)1794declare <vscale x 2 x double> @llvm.aarch64.sve.ftmad.x.nxv2f64(<vscale x 2 x double>, <vscale x 2 x double>, i32)1795 1796declare <vscale x 8 x half> @llvm.aarch64.sve.ftsmul.x.nxv8f16(<vscale x 8 x half>, <vscale x 8 x i16>)1797declare <vscale x 4 x float> @llvm.aarch64.sve.ftsmul.x.nxv4f32(<vscale x 4 x float>, <vscale x 4 x i32>)1798declare <vscale x 2 x double> @llvm.aarch64.sve.ftsmul.x.nxv2f64(<vscale x 2 x double>, <vscale x 2 x i64>)1799 1800declare <vscale x 8 x half> @llvm.aarch64.sve.ftssel.x.nxv8f16(<vscale x 8 x half>, <vscale x 8 x i16>)1801declare <vscale x 4 x float> @llvm.aarch64.sve.ftssel.x.nxv4f32(<vscale x 4 x float>, <vscale x 4 x i32>)1802declare <vscale x 2 x double> @llvm.aarch64.sve.ftssel.x.nxv2f64(<vscale x 2 x double>, <vscale x 2 x i64>)1803