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1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py2; RUN: llc -mtriple=aarch64-linux-gnu -mattr=+sve < %s | FileCheck %s3 4;5; INDEX (IMMEDIATES)6;7 8define <vscale x 16 x i8> @index_ii_i8() {9; CHECK-LABEL: index_ii_i8:10; CHECK: // %bb.0:11; CHECK-NEXT: index z0.b, #-16, #1512; CHECK-NEXT: ret13 %out = call <vscale x 16 x i8> @llvm.aarch64.sve.index.nxv16i8(i8 -16, i8 15)14 ret <vscale x 16 x i8> %out15}16 17define <vscale x 8 x i16> @index_ii_i16() {18; CHECK-LABEL: index_ii_i16:19; CHECK: // %bb.0:20; CHECK-NEXT: index z0.h, #15, #-1621; CHECK-NEXT: ret22 %out = call <vscale x 8 x i16> @llvm.aarch64.sve.index.nxv8i16(i16 15, i16 -16)23 ret <vscale x 8 x i16> %out24}25 26define <vscale x 4 x i32> @index_ii_i32() {27; CHECK-LABEL: index_ii_i32:28; CHECK: // %bb.0:29; CHECK-NEXT: index z0.s, #-16, #1530; CHECK-NEXT: ret31 %out = call <vscale x 4 x i32> @llvm.aarch64.sve.index.nxv4i32(i32 -16, i32 15)32 ret <vscale x 4 x i32> %out33}34 35define <vscale x 2 x i64> @index_ii_i64() {36; CHECK-LABEL: index_ii_i64:37; CHECK: // %bb.0:38; CHECK-NEXT: index z0.d, #15, #-1639; CHECK-NEXT: ret40 %out = call <vscale x 2 x i64> @llvm.aarch64.sve.index.nxv2i64(i64 15, i64 -16)41 ret <vscale x 2 x i64> %out42}43 44define <vscale x 2 x i64> @index_ii_range() {45; CHECK-LABEL: index_ii_range:46; CHECK: // %bb.0:47; CHECK-NEXT: mov w8, #16 // =0x1048; CHECK-NEXT: mov x9, #-17 // =0xffffffffffffffef49; CHECK-NEXT: index z0.d, x9, x850; CHECK-NEXT: ret51 %out = call <vscale x 2 x i64> @llvm.aarch64.sve.index.nxv2i64(i64 -17, i64 16)52 ret <vscale x 2 x i64> %out53}54 55define <vscale x 8 x i16> @index_ii_range_combine(i16 %a) {56; CHECK-LABEL: index_ii_range_combine:57; CHECK: // %bb.0:58; CHECK-NEXT: index z0.h, #0, #859; CHECK-NEXT: orr z0.h, z0.h, #0x260; CHECK-NEXT: ret61 %val2 = call <vscale x 8 x i16> @llvm.aarch64.sve.index.nxv8i16(i16 0, i16 2)62 %val3 = shl <vscale x 8 x i16> %val2, splat(i16 2)63 %out = add <vscale x 8 x i16> %val3, splat(i16 2)64 ret <vscale x 8 x i16> %out65}66 67;68; INDEX (IMMEDIATE, SCALAR)69;70 71define <vscale x 16 x i8> @index_ir_i8(i8 %a) {72; CHECK-LABEL: index_ir_i8:73; CHECK: // %bb.0:74; CHECK-NEXT: index z0.b, #15, w075; CHECK-NEXT: ret76 %out = call <vscale x 16 x i8> @llvm.aarch64.sve.index.nxv16i8(i8 15, i8 %a)77 ret <vscale x 16 x i8> %out78}79 80define <vscale x 8 x i16> @index_ir_i16(i16 %a) {81; CHECK-LABEL: index_ir_i16:82; CHECK: // %bb.0:83; CHECK-NEXT: index z0.h, #-16, w084; CHECK-NEXT: ret85 %out = call <vscale x 8 x i16> @llvm.aarch64.sve.index.nxv8i16(i16 -16, i16 %a)86 ret <vscale x 8 x i16> %out87}88 89define <vscale x 4 x i32> @index_ir_i32(i32 %a) {90; CHECK-LABEL: index_ir_i32:91; CHECK: // %bb.0:92; CHECK-NEXT: index z0.s, #15, w093; CHECK-NEXT: ret94 %out = call <vscale x 4 x i32> @llvm.aarch64.sve.index.nxv4i32(i32 15, i32 %a)95 ret <vscale x 4 x i32> %out96}97 98define <vscale x 2 x i64> @index_ir_i64(i64 %a) {99; CHECK-LABEL: index_ir_i64:100; CHECK: // %bb.0:101; CHECK-NEXT: index z0.d, #-16, x0102; CHECK-NEXT: ret103 %out = call <vscale x 2 x i64> @llvm.aarch64.sve.index.nxv2i64(i64 -16, i64 %a)104 ret <vscale x 2 x i64> %out105}106 107define <vscale x 4 x i32> @index_ir_range(i32 %a) {108; CHECK-LABEL: index_ir_range:109; CHECK: // %bb.0:110; CHECK-NEXT: mov w8, #-17 // =0xffffffef111; CHECK-NEXT: index z0.s, w8, w0112; CHECK-NEXT: ret113 %out = call <vscale x 4 x i32> @llvm.aarch64.sve.index.nxv4i32(i32 -17, i32 %a)114 ret <vscale x 4 x i32> %out115}116 117define <vscale x 4 x i32> @index_ir_range_combine(i32 %a) {118; CHECK-LABEL: index_ir_range_combine:119; CHECK: // %bb.0:120; CHECK-NEXT: index z0.s, #0, w0121; CHECK-NEXT: ret122 %tmp = call <vscale x 4 x i32> @llvm.aarch64.sve.index.nxv4i32(i32 2, i32 1)123 %tmp1 = sub <vscale x 4 x i32> %tmp, splat(i32 2)124 %val2 = insertelement <vscale x 4 x i32> poison, i32 %a, i32 0125 %val3 = shufflevector <vscale x 4 x i32> %val2, <vscale x 4 x i32> poison, <vscale x 4 x i32> zeroinitializer126 %out = mul <vscale x 4 x i32> %tmp1, %val3127 ret <vscale x 4 x i32> %out128}129 130;131; INDEX (SCALAR, IMMEDIATE)132;133 134define <vscale x 16 x i8> @index_ri_i8(i8 %a) {135; CHECK-LABEL: index_ri_i8:136; CHECK: // %bb.0:137; CHECK-NEXT: index z0.b, w0, #-16138; CHECK-NEXT: ret139 %out = call <vscale x 16 x i8> @llvm.aarch64.sve.index.nxv16i8(i8 %a, i8 -16)140 ret <vscale x 16 x i8> %out141}142 143define <vscale x 8 x i16> @index_ri_i16(i16 %a) {144; CHECK-LABEL: index_ri_i16:145; CHECK: // %bb.0:146; CHECK-NEXT: index z0.h, w0, #15147; CHECK-NEXT: ret148 %out = call <vscale x 8 x i16> @llvm.aarch64.sve.index.nxv8i16(i16 %a, i16 15)149 ret <vscale x 8 x i16> %out150}151 152define <vscale x 4 x i32> @index_ri_i32(i32 %a) {153; CHECK-LABEL: index_ri_i32:154; CHECK: // %bb.0:155; CHECK-NEXT: index z0.s, w0, #-16156; CHECK-NEXT: ret157 %out = call <vscale x 4 x i32> @llvm.aarch64.sve.index.nxv4i32(i32 %a, i32 -16)158 ret <vscale x 4 x i32> %out159}160 161define <vscale x 2 x i64> @index_ri_i64(i64 %a) {162; CHECK-LABEL: index_ri_i64:163; CHECK: // %bb.0:164; CHECK-NEXT: index z0.d, x0, #15165; CHECK-NEXT: ret166 %out = call <vscale x 2 x i64> @llvm.aarch64.sve.index.nxv2i64(i64 %a, i64 15)167 ret <vscale x 2 x i64> %out168}169 170define <vscale x 8 x i16> @index_ri_range(i16 %a) {171; CHECK-LABEL: index_ri_range:172; CHECK: // %bb.0:173; CHECK-NEXT: mov w8, #16 // =0x10174; CHECK-NEXT: index z0.h, w0, w8175; CHECK-NEXT: ret176 %out = call <vscale x 8 x i16> @llvm.aarch64.sve.index.nxv8i16(i16 %a, i16 16)177 ret <vscale x 8 x i16> %out178}179 180;181; INDEX (SCALARS)182;183 184define <vscale x 16 x i8> @index_rr_i8(i8 %a, i8 %b) {185; CHECK-LABEL: index_rr_i8:186; CHECK: // %bb.0:187; CHECK-NEXT: index z0.b, w0, w1188; CHECK-NEXT: ret189 %out = call <vscale x 16 x i8> @llvm.aarch64.sve.index.nxv16i8(i8 %a, i8 %b)190 ret <vscale x 16 x i8> %out191}192 193define <vscale x 8 x i16> @index_rr_i16(i16 %a, i16 %b) {194; CHECK-LABEL: index_rr_i16:195; CHECK: // %bb.0:196; CHECK-NEXT: index z0.h, w0, w1197; CHECK-NEXT: ret198 %out = call <vscale x 8 x i16> @llvm.aarch64.sve.index.nxv8i16(i16 %a, i16 %b)199 ret <vscale x 8 x i16> %out200}201 202define <vscale x 4 x i32> @index_rr_i32(i32 %a, i32 %b) {203; CHECK-LABEL: index_rr_i32:204; CHECK: // %bb.0:205; CHECK-NEXT: index z0.s, w0, w1206; CHECK-NEXT: ret207 %out = call <vscale x 4 x i32> @llvm.aarch64.sve.index.nxv4i32(i32 %a, i32 %b)208 ret <vscale x 4 x i32> %out209}210 211define <vscale x 2 x i64> @index_rr_i64(i64 %a, i64 %b) {212; CHECK-LABEL: index_rr_i64:213; CHECK: // %bb.0:214; CHECK-NEXT: index z0.d, x0, x1215; CHECK-NEXT: ret216 %out = call <vscale x 2 x i64> @llvm.aarch64.sve.index.nxv2i64(i64 %a, i64 %b)217 ret <vscale x 2 x i64> %out218}219 220define <vscale x 4 x i32> @index_rr_i32_combine(i32 %a, i32 %b) {221; CHECK-LABEL: index_rr_i32_combine:222; CHECK: // %bb.0:223; CHECK-NEXT: index z0.s, w0, w1224; CHECK-NEXT: ret225 %val = insertelement <vscale x 4 x i32> poison, i32 %a, i32 0226 %val1 = shufflevector <vscale x 4 x i32> %val, <vscale x 4 x i32> poison, <vscale x 4 x i32> zeroinitializer227 %val2 = insertelement <vscale x 4 x i32> poison, i32 %b, i32 0228 %val3 = shufflevector <vscale x 4 x i32> %val2, <vscale x 4 x i32> poison, <vscale x 4 x i32> zeroinitializer229 %tmp = call <vscale x 4 x i32> @llvm.aarch64.sve.index.nxv4i32(i32 0, i32 1)230 %tmp1 = mul <vscale x 4 x i32> %tmp, %val3231 %out = add <vscale x 4 x i32> %tmp1, %val1232 ret <vscale x 4 x i32> %out233}234 235define <vscale x 4 x i32> @index_rr_i32_not_combine(i32 %a, i32 %b) {236; CHECK-LABEL: index_rr_i32_not_combine:237; CHECK: // %bb.0:238; CHECK-NEXT: index z0.s, #0, #1239; CHECK-NEXT: mov z1.s, w0240; CHECK-NEXT: mov z2.s, w1241; CHECK-NEXT: ptrue p0.s242; CHECK-NEXT: mla z1.s, p0/m, z0.s, z2.s243; CHECK-NEXT: add z0.s, z1.s, z0.s244; CHECK-NEXT: ret245 %val = insertelement <vscale x 4 x i32> poison, i32 %a, i32 0246 %val1 = shufflevector <vscale x 4 x i32> %val, <vscale x 4 x i32> poison, <vscale x 4 x i32> zeroinitializer247 %val2 = insertelement <vscale x 4 x i32> poison, i32 %b, i32 0248 %val3 = shufflevector <vscale x 4 x i32> %val2, <vscale x 4 x i32> poison, <vscale x 4 x i32> zeroinitializer249 %tmp = call <vscale x 4 x i32> @llvm.aarch64.sve.index.nxv4i32(i32 0, i32 1)250 %tmp1 = mul <vscale x 4 x i32> %tmp, %val3251 %tmp2 = add <vscale x 4 x i32> %tmp1, %val1252 %out = add <vscale x 4 x i32> %tmp2, %tmp253 ret <vscale x 4 x i32> %out254}255 256declare <vscale x 16 x i8> @llvm.aarch64.sve.index.nxv16i8(i8, i8)257declare <vscale x 8 x i16> @llvm.aarch64.sve.index.nxv8i16(i16, i16)258declare <vscale x 4 x i32> @llvm.aarch64.sve.index.nxv4i32(i32, i32)259declare <vscale x 2 x i64> @llvm.aarch64.sve.index.nxv2i64(i64, i64)260