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1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py2; RUN: llc -mtriple=aarch64-linux-gnu -mattr=+sve < %s | FileCheck %s3; RUN: llc -mtriple=aarch64-linux-gnu -mattr=+sme -force-streaming < %s | FileCheck %s4 5;6; BRKA7;8 9define <vscale x 16 x i1> @brka_m_b8(<vscale x 16 x i1> %inactive, <vscale x 16 x i1> %pg, <vscale x 16 x i1> %a) {10; CHECK-LABEL: brka_m_b8:11; CHECK: // %bb.0:12; CHECK-NEXT: brka p0.b, p1/m, p2.b13; CHECK-NEXT: ret14 %out = call <vscale x 16 x i1> @llvm.aarch64.sve.brka.nxv16i1(<vscale x 16 x i1> %inactive,15 <vscale x 16 x i1> %pg,16 <vscale x 16 x i1> %a)17 ret <vscale x 16 x i1> %out18}19 20define <vscale x 16 x i1> @brka_z_b8(<vscale x 16 x i1> %pg, <vscale x 16 x i1> %a) {21; CHECK-LABEL: brka_z_b8:22; CHECK: // %bb.0:23; CHECK-NEXT: brka p0.b, p0/z, p1.b24; CHECK-NEXT: ret25 %out = call <vscale x 16 x i1> @llvm.aarch64.sve.brka.z.nxv16i1(<vscale x 16 x i1> %pg,26 <vscale x 16 x i1> %a)27 ret <vscale x 16 x i1> %out28}29 30;31; BRKB32;33 34define <vscale x 16 x i1> @brkb_m_b8(<vscale x 16 x i1> %inactive, <vscale x 16 x i1> %pg, <vscale x 16 x i1> %a) {35; CHECK-LABEL: brkb_m_b8:36; CHECK: // %bb.0:37; CHECK-NEXT: brkb p0.b, p1/m, p2.b38; CHECK-NEXT: ret39 %out = call <vscale x 16 x i1> @llvm.aarch64.sve.brkb.nxv16i1(<vscale x 16 x i1> %inactive,40 <vscale x 16 x i1> %pg,41 <vscale x 16 x i1> %a)42 ret <vscale x 16 x i1> %out43}44 45define <vscale x 16 x i1> @brkb_z_b8(<vscale x 16 x i1> %pg, <vscale x 16 x i1> %a) {46; CHECK-LABEL: brkb_z_b8:47; CHECK: // %bb.0:48; CHECK-NEXT: brkb p0.b, p0/z, p1.b49; CHECK-NEXT: ret50 %out = call <vscale x 16 x i1> @llvm.aarch64.sve.brkb.z.nxv16i1(<vscale x 16 x i1> %pg,51 <vscale x 16 x i1> %a)52 ret <vscale x 16 x i1> %out53}54 55;56; BRKN57;58 59define <vscale x 16 x i1> @brkn_b8(<vscale x 16 x i1> %pg, <vscale x 16 x i1> %a, <vscale x 16 x i1> %b) {60; CHECK-LABEL: brkn_b8:61; CHECK: // %bb.0:62; CHECK-NEXT: brkn p2.b, p0/z, p1.b, p2.b63; CHECK-NEXT: mov p0.b, p2.b64; CHECK-NEXT: ret65 %out = call <vscale x 16 x i1> @llvm.aarch64.sve.brkn.z.nxv16i1(<vscale x 16 x i1> %pg,66 <vscale x 16 x i1> %a,67 <vscale x 16 x i1> %b)68 ret <vscale x 16 x i1> %out69}70 71;72; BRKPA73;74 75define <vscale x 16 x i1> @brkpa_b8(<vscale x 16 x i1> %pg, <vscale x 16 x i1> %a, <vscale x 16 x i1> %b) {76; CHECK-LABEL: brkpa_b8:77; CHECK: // %bb.0:78; CHECK-NEXT: brkpa p0.b, p0/z, p1.b, p2.b79; CHECK-NEXT: ret80 %out = call <vscale x 16 x i1> @llvm.aarch64.sve.brkpa.z.nxv16i1(<vscale x 16 x i1> %pg,81 <vscale x 16 x i1> %a,82 <vscale x 16 x i1> %b)83 ret <vscale x 16 x i1> %out84}85 86;87; BRKPB88;89 90define <vscale x 16 x i1> @brkpb_b8(<vscale x 16 x i1> %pg, <vscale x 16 x i1> %a, <vscale x 16 x i1> %b) {91; CHECK-LABEL: brkpb_b8:92; CHECK: // %bb.0:93; CHECK-NEXT: brkpb p0.b, p0/z, p1.b, p2.b94; CHECK-NEXT: ret95 %out = call <vscale x 16 x i1> @llvm.aarch64.sve.brkpb.z.nxv16i1(<vscale x 16 x i1> %pg,96 <vscale x 16 x i1> %a,97 <vscale x 16 x i1> %b)98 ret <vscale x 16 x i1> %out99}100 101;102; PFIRST103;104 105define <vscale x 16 x i1> @pfirst_b8(<vscale x 16 x i1> %pg, <vscale x 16 x i1> %a) {106; CHECK-LABEL: pfirst_b8:107; CHECK: // %bb.0:108; CHECK-NEXT: pfirst p1.b, p0, p1.b109; CHECK-NEXT: mov p0.b, p1.b110; CHECK-NEXT: ret111 %out = call <vscale x 16 x i1> @llvm.aarch64.sve.pfirst.nxv16i1(<vscale x 16 x i1> %pg,112 <vscale x 16 x i1> %a)113 ret <vscale x 16 x i1> %out114}115 116;117; PNEXT118;119 120define <vscale x 16 x i1> @pnext_b8(<vscale x 16 x i1> %pg, <vscale x 16 x i1> %a) {121; CHECK-LABEL: pnext_b8:122; CHECK: // %bb.0:123; CHECK-NEXT: pnext p1.b, p0, p1.b124; CHECK-NEXT: mov p0.b, p1.b125; CHECK-NEXT: ret126 %out = call <vscale x 16 x i1> @llvm.aarch64.sve.pnext.nxv16i1(<vscale x 16 x i1> %pg,127 <vscale x 16 x i1> %a)128 ret <vscale x 16 x i1> %out129}130 131define <vscale x 8 x i1> @pnext_b16(<vscale x 8 x i1> %pg, <vscale x 8 x i1> %a) {132; CHECK-LABEL: pnext_b16:133; CHECK: // %bb.0:134; CHECK-NEXT: pnext p1.h, p0, p1.h135; CHECK-NEXT: mov p0.b, p1.b136; CHECK-NEXT: ret137 %out = call <vscale x 8 x i1> @llvm.aarch64.sve.pnext.nxv8i1(<vscale x 8 x i1> %pg,138 <vscale x 8 x i1> %a)139 ret <vscale x 8 x i1> %out140}141 142define <vscale x 4 x i1> @pnext_b32(<vscale x 4 x i1> %pg, <vscale x 4 x i1> %a) {143; CHECK-LABEL: pnext_b32:144; CHECK: // %bb.0:145; CHECK-NEXT: pnext p1.s, p0, p1.s146; CHECK-NEXT: mov p0.b, p1.b147; CHECK-NEXT: ret148 %out = call <vscale x 4 x i1> @llvm.aarch64.sve.pnext.nxv4i1(<vscale x 4 x i1> %pg,149 <vscale x 4 x i1> %a)150 ret <vscale x 4 x i1> %out151}152 153define <vscale x 2 x i1> @pnext_b64(<vscale x 2 x i1> %pg, <vscale x 2 x i1> %a) {154; CHECK-LABEL: pnext_b64:155; CHECK: // %bb.0:156; CHECK-NEXT: pnext p1.d, p0, p1.d157; CHECK-NEXT: mov p0.b, p1.b158; CHECK-NEXT: ret159 %out = call <vscale x 2 x i1> @llvm.aarch64.sve.pnext.nxv2i1(<vscale x 2 x i1> %pg,160 <vscale x 2 x i1> %a)161 ret <vscale x 2 x i1> %out162}163 164;165; PUNPKHI166;167 168define <vscale x 8 x i1> @punpkhi_b16(<vscale x 16 x i1> %a) {169; CHECK-LABEL: punpkhi_b16:170; CHECK: // %bb.0:171; CHECK-NEXT: punpkhi p0.h, p0.b172; CHECK-NEXT: ret173 %res = call <vscale x 8 x i1> @llvm.aarch64.sve.punpkhi.nxv8i1(<vscale x 16 x i1> %a)174 ret <vscale x 8 x i1> %res175}176 177define <vscale x 4 x i1> @punpkhi_b8(<vscale x 8 x i1> %a) {178; CHECK-LABEL: punpkhi_b8:179; CHECK: // %bb.0:180; CHECK-NEXT: punpkhi p0.h, p0.b181; CHECK-NEXT: ret182 %res = call <vscale x 4 x i1> @llvm.aarch64.sve.punpkhi.nxv4i1(<vscale x 8 x i1> %a)183 ret <vscale x 4 x i1> %res184}185 186define <vscale x 2 x i1> @punpkhi_b4(<vscale x 4 x i1> %a) {187; CHECK-LABEL: punpkhi_b4:188; CHECK: // %bb.0:189; CHECK-NEXT: punpkhi p0.h, p0.b190; CHECK-NEXT: ret191 %res = call <vscale x 2 x i1> @llvm.aarch64.sve.punpkhi.nxv2i1(<vscale x 4 x i1> %a)192 ret <vscale x 2 x i1> %res193}194 195;196; PUNPKLO197;198 199define <vscale x 8 x i1> @punpklo_b16(<vscale x 16 x i1> %a) {200; CHECK-LABEL: punpklo_b16:201; CHECK: // %bb.0:202; CHECK-NEXT: punpklo p0.h, p0.b203; CHECK-NEXT: ret204 %res = call <vscale x 8 x i1> @llvm.aarch64.sve.punpklo.nxv8i1(<vscale x 16 x i1> %a)205 ret <vscale x 8 x i1> %res206}207 208define <vscale x 4 x i1> @punpklo_b8(<vscale x 8 x i1> %a) {209; CHECK-LABEL: punpklo_b8:210; CHECK: // %bb.0:211; CHECK-NEXT: punpklo p0.h, p0.b212; CHECK-NEXT: ret213 %res = call <vscale x 4 x i1> @llvm.aarch64.sve.punpklo.nxv4i1(<vscale x 8 x i1> %a)214 ret <vscale x 4 x i1> %res215}216 217define <vscale x 2 x i1> @punpklo_b4(<vscale x 4 x i1> %a) {218; CHECK-LABEL: punpklo_b4:219; CHECK: // %bb.0:220; CHECK-NEXT: punpklo p0.h, p0.b221; CHECK-NEXT: ret222 %res = call <vscale x 2 x i1> @llvm.aarch64.sve.punpklo.nxv2i1(<vscale x 4 x i1> %a)223 ret <vscale x 2 x i1> %res224}225 226declare <vscale x 16 x i1> @llvm.aarch64.sve.brka.nxv16i1(<vscale x 16 x i1>, <vscale x 16 x i1>, <vscale x 16 x i1>)227declare <vscale x 16 x i1> @llvm.aarch64.sve.brka.z.nxv16i1(<vscale x 16 x i1>, <vscale x 16 x i1>)228declare <vscale x 16 x i1> @llvm.aarch64.sve.brkb.nxv16i1(<vscale x 16 x i1>, <vscale x 16 x i1>, <vscale x 16 x i1>)229declare <vscale x 16 x i1> @llvm.aarch64.sve.brkb.z.nxv16i1(<vscale x 16 x i1>, <vscale x 16 x i1>)230declare <vscale x 16 x i1> @llvm.aarch64.sve.brkn.z.nxv16i1(<vscale x 16 x i1>, <vscale x 16 x i1>, <vscale x 16 x i1>)231declare <vscale x 16 x i1> @llvm.aarch64.sve.brkpa.z.nxv16i1(<vscale x 16 x i1>, <vscale x 16 x i1>, <vscale x 16 x i1>)232declare <vscale x 16 x i1> @llvm.aarch64.sve.brkpb.z.nxv16i1(<vscale x 16 x i1>, <vscale x 16 x i1>, <vscale x 16 x i1>)233 234declare <vscale x 16 x i1> @llvm.aarch64.sve.pfirst.nxv16i1(<vscale x 16 x i1>, <vscale x 16 x i1>)235 236declare <vscale x 16 x i1> @llvm.aarch64.sve.pnext.nxv16i1(<vscale x 16 x i1>, <vscale x 16 x i1>)237declare <vscale x 8 x i1> @llvm.aarch64.sve.pnext.nxv8i1(<vscale x 8 x i1>, <vscale x 8 x i1>)238declare <vscale x 4 x i1> @llvm.aarch64.sve.pnext.nxv4i1(<vscale x 4 x i1>, <vscale x 4 x i1>)239declare <vscale x 2 x i1> @llvm.aarch64.sve.pnext.nxv2i1(<vscale x 2 x i1>, <vscale x 2 x i1>)240 241declare <vscale x 8 x i1> @llvm.aarch64.sve.punpkhi.nxv8i1(<vscale x 16 x i1>)242declare <vscale x 4 x i1> @llvm.aarch64.sve.punpkhi.nxv4i1(<vscale x 8 x i1>)243declare <vscale x 2 x i1> @llvm.aarch64.sve.punpkhi.nxv2i1(<vscale x 4 x i1>)244 245declare <vscale x 8 x i1> @llvm.aarch64.sve.punpklo.nxv8i1(<vscale x 16 x i1>)246declare <vscale x 4 x i1> @llvm.aarch64.sve.punpklo.nxv4i1(<vscale x 8 x i1>)247declare <vscale x 2 x i1> @llvm.aarch64.sve.punpklo.nxv2i1(<vscale x 4 x i1>)248