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1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py2; RUN: llc -mtriple=aarch64-linux-gnu -mattr=+sve < %s | FileCheck %s3 4;5; DUP6;7 8define <vscale x 16 x i8> @dup_i8(<vscale x 16 x i8> %a, <vscale x 16 x i1> %pg, i8 %b) {9; CHECK-LABEL: dup_i8:10; CHECK: // %bb.0:11; CHECK-NEXT: mov z0.b, p0/m, w012; CHECK-NEXT: ret13 %out = call <vscale x 16 x i8> @llvm.aarch64.sve.dup.nxv16i8(<vscale x 16 x i8> %a,14 <vscale x 16 x i1> %pg,15 i8 %b)16 ret <vscale x 16 x i8> %out17}18 19define <vscale x 8 x i16> @dup_i16(<vscale x 8 x i16> %a, <vscale x 8 x i1> %pg, i16 %b) {20; CHECK-LABEL: dup_i16:21; CHECK: // %bb.0:22; CHECK-NEXT: mov z0.h, p0/m, w023; CHECK-NEXT: ret24 %out = call <vscale x 8 x i16> @llvm.aarch64.sve.dup.nxv8i16(<vscale x 8 x i16> %a,25 <vscale x 8 x i1> %pg,26 i16 %b)27 ret <vscale x 8 x i16> %out28}29 30define <vscale x 4 x i32> @dup_i32(<vscale x 4 x i32> %a, <vscale x 4 x i1> %pg, i32 %b) {31; CHECK-LABEL: dup_i32:32; CHECK: // %bb.0:33; CHECK-NEXT: mov z0.s, p0/m, w034; CHECK-NEXT: ret35 %out = call <vscale x 4 x i32> @llvm.aarch64.sve.dup.nxv4i32(<vscale x 4 x i32> %a,36 <vscale x 4 x i1> %pg,37 i32 %b)38 ret <vscale x 4 x i32> %out39}40 41define <vscale x 2 x i64> @dup_i64(<vscale x 2 x i64> %a, <vscale x 2 x i1> %pg, i64 %b) {42; CHECK-LABEL: dup_i64:43; CHECK: // %bb.0:44; CHECK-NEXT: mov z0.d, p0/m, x045; CHECK-NEXT: ret46 %out = call <vscale x 2 x i64> @llvm.aarch64.sve.dup.nxv2i64(<vscale x 2 x i64> %a,47 <vscale x 2 x i1> %pg,48 i64 %b)49 ret <vscale x 2 x i64> %out50}51 52define <vscale x 8 x half> @dup_f16(<vscale x 8 x half> %a, <vscale x 8 x i1> %pg, half %b) {53; CHECK-LABEL: dup_f16:54; CHECK: // %bb.0:55; CHECK-NEXT: mov z0.h, p0/m, h156; CHECK-NEXT: ret57 %out = call <vscale x 8 x half> @llvm.aarch64.sve.dup.nxv8f16(<vscale x 8 x half> %a,58 <vscale x 8 x i1> %pg,59 half %b)60 ret <vscale x 8 x half> %out61}62 63define <vscale x 8 x bfloat> @dup_bf16(<vscale x 8 x bfloat> %a, <vscale x 8 x i1> %pg, bfloat %b) #0 {64; CHECK-LABEL: dup_bf16:65; CHECK: // %bb.0:66; CHECK-NEXT: mov z0.h, p0/m, h167; CHECK-NEXT: ret68 %out = call <vscale x 8 x bfloat> @llvm.aarch64.sve.dup.nxv8bf16(<vscale x 8 x bfloat> %a,69 <vscale x 8 x i1> %pg,70 bfloat %b)71 ret <vscale x 8 x bfloat> %out72}73 74define <vscale x 4 x float> @dup_f32(<vscale x 4 x float> %a, <vscale x 4 x i1> %pg, float %b) {75; CHECK-LABEL: dup_f32:76; CHECK: // %bb.0:77; CHECK-NEXT: mov z0.s, p0/m, s178; CHECK-NEXT: ret79 %out = call <vscale x 4 x float> @llvm.aarch64.sve.dup.nxv4f32(<vscale x 4 x float> %a,80 <vscale x 4 x i1> %pg,81 float %b)82 ret <vscale x 4 x float> %out83}84 85define <vscale x 2 x double> @dup_f64(<vscale x 2 x double> %a, <vscale x 2 x i1> %pg, double %b) {86; CHECK-LABEL: dup_f64:87; CHECK: // %bb.0:88; CHECK-NEXT: mov z0.d, p0/m, d189; CHECK-NEXT: ret90 %out = call <vscale x 2 x double> @llvm.aarch64.sve.dup.nxv2f64(<vscale x 2 x double> %a,91 <vscale x 2 x i1> %pg,92 double %b)93 ret <vscale x 2 x double> %out94}95 96define <vscale x 8 x bfloat> @test_svdup_n_bf16_z(<vscale x 8 x i1> %pg, bfloat %op) #0 {97; CHECK-LABEL: test_svdup_n_bf16_z:98; CHECK: // %bb.0:99; CHECK-NEXT: movi v1.2d, #0000000000000000100; CHECK-NEXT: mov z1.h, p0/m, h0101; CHECK-NEXT: mov z0.d, z1.d102; CHECK-NEXT: ret103 %out = call <vscale x 8 x bfloat> @llvm.aarch64.sve.dup.nxv8bf16(<vscale x 8 x bfloat> zeroinitializer, <vscale x 8 x i1> %pg, bfloat %op)104 ret <vscale x 8 x bfloat> %out105}106 107define <vscale x 8 x bfloat> @test_svdup_n_bf16_m(<vscale x 8 x bfloat> %inactive, <vscale x 8 x i1> %pg, bfloat %op) #0 {108; CHECK-LABEL: test_svdup_n_bf16_m:109; CHECK: // %bb.0:110; CHECK-NEXT: mov z0.h, p0/m, h1111; CHECK-NEXT: ret112 %out = call <vscale x 8 x bfloat> @llvm.aarch64.sve.dup.nxv8bf16(<vscale x 8 x bfloat> %inactive, <vscale x 8 x i1> %pg, bfloat %op)113 ret <vscale x 8 x bfloat> %out114}115 116 117define <vscale x 8 x bfloat> @test_svdup_n_bf16_x(<vscale x 8 x i1> %pg, bfloat %op) #0 {118; CHECK-LABEL: test_svdup_n_bf16_x:119; CHECK: // %bb.0:120; CHECK-NEXT: mov z0.h, p0/m, h0121; CHECK-NEXT: ret122 %out = call <vscale x 8 x bfloat> @llvm.aarch64.sve.dup.nxv8bf16(<vscale x 8 x bfloat> poison, <vscale x 8 x i1> %pg, bfloat %op)123 ret <vscale x 8 x bfloat> %out124}125 126declare <vscale x 16 x i8> @llvm.aarch64.sve.dup.nxv16i8(<vscale x 16 x i8>, <vscale x 16 x i1>, i8)127declare <vscale x 8 x i16> @llvm.aarch64.sve.dup.nxv8i16(<vscale x 8 x i16>, <vscale x 8 x i1>, i16)128declare <vscale x 4 x i32> @llvm.aarch64.sve.dup.nxv4i32(<vscale x 4 x i32>, <vscale x 4 x i1>, i32)129declare <vscale x 2 x i64> @llvm.aarch64.sve.dup.nxv2i64(<vscale x 2 x i64>, <vscale x 2 x i1>, i64)130declare <vscale x 8 x half> @llvm.aarch64.sve.dup.nxv8f16(<vscale x 8 x half>, <vscale x 8 x i1>, half)131declare <vscale x 8 x bfloat> @llvm.aarch64.sve.dup.nxv8bf16(<vscale x 8 x bfloat>, <vscale x 8 x i1>, bfloat)132declare <vscale x 4 x float> @llvm.aarch64.sve.dup.nxv4f32(<vscale x 4 x float>, <vscale x 4 x i1>, float)133declare <vscale x 2 x double> @llvm.aarch64.sve.dup.nxv2f64(<vscale x 2 x double>, <vscale x 2 x i1>, double)134 135; +bf16 is required for the bfloat version.136attributes #0 = { "target-features"="+sve,+bf16" }137