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1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py2; RUN: llc -mtriple=aarch64-linux-gnu -mattr=+sve < %s | FileCheck %s3 4;5; ST1B, ST1W, ST1H, ST1D: base + 64-bit unscaled offset6; e.g. st1h { z0.d }, p0, [x0, z1.d]7;8 9define void @sst1b_d(<vscale x 2 x i64> %data, <vscale x 2 x i1> %pg, ptr %base, <vscale x 2 x i64> %b) {10; CHECK-LABEL: sst1b_d:11; CHECK: // %bb.0:12; CHECK-NEXT: st1b { z0.d }, p0, [x0, z1.d]13; CHECK-NEXT: ret14 %data_trunc = trunc <vscale x 2 x i64> %data to <vscale x 2 x i8>15 call void @llvm.aarch64.sve.st1.scatter.nxv2i8(<vscale x 2 x i8> %data_trunc,16 <vscale x 2 x i1> %pg,17 ptr %base,18 <vscale x 2 x i64> %b)19 ret void20}21 22define void @sst1h_d(<vscale x 2 x i64> %data, <vscale x 2 x i1> %pg, ptr %base, <vscale x 2 x i64> %b) {23; CHECK-LABEL: sst1h_d:24; CHECK: // %bb.0:25; CHECK-NEXT: st1h { z0.d }, p0, [x0, z1.d]26; CHECK-NEXT: ret27 %data_trunc = trunc <vscale x 2 x i64> %data to <vscale x 2 x i16>28 call void @llvm.aarch64.sve.st1.scatter.nxv2i16(<vscale x 2 x i16> %data_trunc,29 <vscale x 2 x i1> %pg,30 ptr %base,31 <vscale x 2 x i64> %b)32 ret void33}34 35define void @sst1w_d(<vscale x 2 x i64> %data, <vscale x 2 x i1> %pg, ptr %base, <vscale x 2 x i64> %b) {36; CHECK-LABEL: sst1w_d:37; CHECK: // %bb.0:38; CHECK-NEXT: st1w { z0.d }, p0, [x0, z1.d]39; CHECK-NEXT: ret40 %data_trunc = trunc <vscale x 2 x i64> %data to <vscale x 2 x i32>41 call void @llvm.aarch64.sve.st1.scatter.nxv2i32(<vscale x 2 x i32> %data_trunc,42 <vscale x 2 x i1> %pg,43 ptr %base,44 <vscale x 2 x i64> %b)45 ret void46}47 48define void @sst1d_d(<vscale x 2 x i64> %data, <vscale x 2 x i1> %pg, ptr %base, <vscale x 2 x i64> %b) {49; CHECK-LABEL: sst1d_d:50; CHECK: // %bb.0:51; CHECK-NEXT: st1d { z0.d }, p0, [x0, z1.d]52; CHECK-NEXT: ret53 call void @llvm.aarch64.sve.st1.scatter.nxv2i64(<vscale x 2 x i64> %data,54 <vscale x 2 x i1> %pg,55 ptr %base,56 <vscale x 2 x i64> %b)57 ret void58}59 60define void @sst1d_d_double(<vscale x 2 x double> %data, <vscale x 2 x i1> %pg, ptr %base, <vscale x 2 x i64> %b) {61; CHECK-LABEL: sst1d_d_double:62; CHECK: // %bb.0:63; CHECK-NEXT: st1d { z0.d }, p0, [x0, z1.d]64; CHECK-NEXT: ret65 call void @llvm.aarch64.sve.st1.scatter.nxv2f64(<vscale x 2 x double> %data,66 <vscale x 2 x i1> %pg,67 ptr %base,68 <vscale x 2 x i64> %b)69 ret void70}71 72declare void @llvm.aarch64.sve.st1.scatter.nxv2i8(<vscale x 2 x i8>, <vscale x 2 x i1>, ptr, <vscale x 2 x i64>)73declare void @llvm.aarch64.sve.st1.scatter.nxv2i16(<vscale x 2 x i16>, <vscale x 2 x i1>, ptr, <vscale x 2 x i64>)74declare void @llvm.aarch64.sve.st1.scatter.nxv2i32(<vscale x 2 x i32>, <vscale x 2 x i1>, ptr, <vscale x 2 x i64>)75declare void @llvm.aarch64.sve.st1.scatter.nxv2i64(<vscale x 2 x i64>, <vscale x 2 x i1>, ptr, <vscale x 2 x i64>)76declare void @llvm.aarch64.sve.st1.scatter.nxv2f64(<vscale x 2 x double>, <vscale x 2 x i1>, ptr, <vscale x 2 x i64>)77