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1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py2; RUN: llc -mtriple=aarch64-linux-gnu -mattr=+sve < %s | FileCheck %s3; RUN: llc -mtriple=aarch64-linux-gnu -mattr=+sme -force-streaming < %s | FileCheck %s4 5; NOTE: invalid, upper and lower bound immediate values of the reg+imm6; addressing mode are checked only for the byte version of each7; instruction (`st<N>b`), as the code for detecting the immediate is8; common to all instructions, and varies only for the number of9; elements of the structured store, which is <N> = 2, 3, 4.10 11;12; ST2B13;14 15define void @st2b_i8_valid_imm(<vscale x 16 x i8> %v0, <vscale x 16 x i8> %v1, <vscale x 16 x i1> %pred, ptr %addr) {16; CHECK-LABEL: st2b_i8_valid_imm:17; CHECK: // %bb.0:18; CHECK-NEXT: // kill: def $z1 killed $z1 killed $z0_z1 def $z0_z119; CHECK-NEXT: // kill: def $z0 killed $z0 killed $z0_z1 def $z0_z120; CHECK-NEXT: st2b { z0.b, z1.b }, p0, [x0, #2, mul vl]21; CHECK-NEXT: ret22 %base = getelementptr <vscale x 16 x i8>, ptr %addr, i64 2, i64 023 call void @llvm.aarch64.sve.st2.nxv16i8(<vscale x 16 x i8> %v0,24 <vscale x 16 x i8> %v1,25 <vscale x 16 x i1> %pred,26 ptr %base)27 ret void28}29 30define void @st2b_i8_invalid_imm_not_multiple_of_2(<vscale x 16 x i8> %v0, <vscale x 16 x i8> %v1, <vscale x 16 x i1> %pred, ptr %addr) {31; CHECK-LABEL: st2b_i8_invalid_imm_not_multiple_of_2:32; CHECK: // %bb.0:33; CHECK-NEXT: // kill: def $z1 killed $z1 killed $z0_z1 def $z0_z134; CHECK-NEXT: rdvl x8, #335; CHECK-NEXT: // kill: def $z0 killed $z0 killed $z0_z1 def $z0_z136; CHECK-NEXT: st2b { z0.b, z1.b }, p0, [x0, x8]37; CHECK-NEXT: ret38 %base = getelementptr <vscale x 16 x i8>, ptr %addr, i64 3, i64 039 call void @llvm.aarch64.sve.st2.nxv16i8(<vscale x 16 x i8> %v0,40 <vscale x 16 x i8> %v1,41 <vscale x 16 x i1> %pred,42 ptr %base)43 ret void44}45 46define void @st2b_i8_invalid_imm_out_of_lower_bound(<vscale x 16 x i8> %v0, <vscale x 16 x i8> %v1, <vscale x 16 x i1> %pred, ptr %addr) {47; CHECK-LABEL: st2b_i8_invalid_imm_out_of_lower_bound:48; CHECK: // %bb.0:49; CHECK-NEXT: // kill: def $z1 killed $z1 killed $z0_z1 def $z0_z150; CHECK-NEXT: rdvl x8, #-1851; CHECK-NEXT: // kill: def $z0 killed $z0 killed $z0_z1 def $z0_z152; CHECK-NEXT: st2b { z0.b, z1.b }, p0, [x0, x8]53; CHECK-NEXT: ret54 %base = getelementptr <vscale x 16 x i8>, ptr %addr, i64 -18, i64 055 call void @llvm.aarch64.sve.st2.nxv16i8(<vscale x 16 x i8> %v0,56 <vscale x 16 x i8> %v1,57 <vscale x 16 x i1> %pred,58 ptr %base)59 ret void60}61 62define void @st2b_i8_invalid_imm_out_of_upper_bound(<vscale x 16 x i8> %v0, <vscale x 16 x i8> %v1, <vscale x 16 x i1> %pred, ptr %addr) {63; CHECK-LABEL: st2b_i8_invalid_imm_out_of_upper_bound:64; CHECK: // %bb.0:65; CHECK-NEXT: // kill: def $z1 killed $z1 killed $z0_z1 def $z0_z166; CHECK-NEXT: rdvl x8, #1667; CHECK-NEXT: // kill: def $z0 killed $z0 killed $z0_z1 def $z0_z168; CHECK-NEXT: st2b { z0.b, z1.b }, p0, [x0, x8]69; CHECK-NEXT: ret70 %base = getelementptr <vscale x 16 x i8>, ptr %addr, i64 16, i64 071 call void @llvm.aarch64.sve.st2.nxv16i8(<vscale x 16 x i8> %v0,72 <vscale x 16 x i8> %v1,73 <vscale x 16 x i1> %pred,74 ptr %base)75 ret void76}77 78define void @st2b_i8_valid_imm_lower_bound(<vscale x 16 x i8> %v0, <vscale x 16 x i8> %v1, <vscale x 16 x i1> %pred, ptr %addr) {79; CHECK-LABEL: st2b_i8_valid_imm_lower_bound:80; CHECK: // %bb.0:81; CHECK-NEXT: // kill: def $z1 killed $z1 killed $z0_z1 def $z0_z182; CHECK-NEXT: // kill: def $z0 killed $z0 killed $z0_z1 def $z0_z183; CHECK-NEXT: st2b { z0.b, z1.b }, p0, [x0, #-16, mul vl]84; CHECK-NEXT: ret85 %base = getelementptr <vscale x 16 x i8>, ptr %addr, i64 -16, i64 086 call void @llvm.aarch64.sve.st2.nxv16i8(<vscale x 16 x i8> %v0,87 <vscale x 16 x i8> %v1,88 <vscale x 16 x i1> %pred,89 ptr %base)90 ret void91}92 93define void @st2b_i8_valid_imm_upper_bound(<vscale x 16 x i8> %v0, <vscale x 16 x i8> %v1, <vscale x 16 x i1> %pred, ptr %addr) {94; CHECK-LABEL: st2b_i8_valid_imm_upper_bound:95; CHECK: // %bb.0:96; CHECK-NEXT: // kill: def $z1 killed $z1 killed $z0_z1 def $z0_z197; CHECK-NEXT: // kill: def $z0 killed $z0 killed $z0_z1 def $z0_z198; CHECK-NEXT: st2b { z0.b, z1.b }, p0, [x0, #14, mul vl]99; CHECK-NEXT: ret100 %base = getelementptr <vscale x 16 x i8>, ptr %addr, i64 14, i64 0101 call void @llvm.aarch64.sve.st2.nxv16i8(<vscale x 16 x i8> %v0,102 <vscale x 16 x i8> %v1,103 <vscale x 16 x i1> %pred,104 ptr %base)105 ret void106}107 108;109; ST2H110;111 112define void @st2h_i16(<vscale x 8 x i16> %v0, <vscale x 8 x i16> %v1, <vscale x 8 x i1> %pred, ptr %addr) {113; CHECK-LABEL: st2h_i16:114; CHECK: // %bb.0:115; CHECK-NEXT: // kill: def $z1 killed $z1 killed $z0_z1 def $z0_z1116; CHECK-NEXT: // kill: def $z0 killed $z0 killed $z0_z1 def $z0_z1117; CHECK-NEXT: st2h { z0.h, z1.h }, p0, [x0, #2, mul vl]118; CHECK-NEXT: ret119 %base = getelementptr <vscale x 8 x i16>, ptr %addr, i64 2, i64 0120 call void @llvm.aarch64.sve.st2.nxv8i16(<vscale x 8 x i16> %v0,121 <vscale x 8 x i16> %v1,122 <vscale x 8 x i1> %pred,123 ptr %base)124 ret void125}126 127define void @st2h_f16(<vscale x 8 x half> %v0, <vscale x 8 x half> %v1, <vscale x 8 x i1> %pred, ptr %addr) {128; CHECK-LABEL: st2h_f16:129; CHECK: // %bb.0:130; CHECK-NEXT: // kill: def $z1 killed $z1 killed $z0_z1 def $z0_z1131; CHECK-NEXT: // kill: def $z0 killed $z0 killed $z0_z1 def $z0_z1132; CHECK-NEXT: st2h { z0.h, z1.h }, p0, [x0, #2, mul vl]133; CHECK-NEXT: ret134 %base = getelementptr <vscale x 8 x half>, ptr %addr, i64 2, i64 0135 call void @llvm.aarch64.sve.st2.nxv8f16(<vscale x 8 x half> %v0,136 <vscale x 8 x half> %v1,137 <vscale x 8 x i1> %pred,138 ptr %base)139 ret void140}141 142;143; ST2W144;145 146define void @st2w_i32(<vscale x 4 x i32> %v0, <vscale x 4 x i32> %v1, <vscale x 4 x i1> %pred, ptr %addr) {147; CHECK-LABEL: st2w_i32:148; CHECK: // %bb.0:149; CHECK-NEXT: // kill: def $z1 killed $z1 killed $z0_z1 def $z0_z1150; CHECK-NEXT: // kill: def $z0 killed $z0 killed $z0_z1 def $z0_z1151; CHECK-NEXT: st2w { z0.s, z1.s }, p0, [x0, #4, mul vl]152; CHECK-NEXT: ret153 %base = getelementptr <vscale x 4 x i32>, ptr %addr, i64 4, i64 0154 call void @llvm.aarch64.sve.st2.nxv4i32(<vscale x 4 x i32> %v0,155 <vscale x 4 x i32> %v1,156 <vscale x 4 x i1> %pred,157 ptr %base)158 ret void159}160 161define void @st2w_f32(<vscale x 4 x float> %v0, <vscale x 4 x float> %v1, <vscale x 4 x i1> %pred, ptr %addr) {162; CHECK-LABEL: st2w_f32:163; CHECK: // %bb.0:164; CHECK-NEXT: // kill: def $z1 killed $z1 killed $z0_z1 def $z0_z1165; CHECK-NEXT: // kill: def $z0 killed $z0 killed $z0_z1 def $z0_z1166; CHECK-NEXT: st2w { z0.s, z1.s }, p0, [x0, #6, mul vl]167; CHECK-NEXT: ret168 %base = getelementptr <vscale x 4 x float>, ptr %addr, i64 6, i64 0169 call void @llvm.aarch64.sve.st2.nxv4f32(<vscale x 4 x float> %v0,170 <vscale x 4 x float> %v1,171 <vscale x 4 x i1> %pred,172 ptr %base)173 ret void174}175 176;177; ST2D178;179 180define void @st2d_i64(<vscale x 2 x i64> %v0, <vscale x 2 x i64> %v1, <vscale x 2 x i1> %pred, ptr %addr) {181; CHECK-LABEL: st2d_i64:182; CHECK: // %bb.0:183; CHECK-NEXT: // kill: def $z1 killed $z1 killed $z0_z1 def $z0_z1184; CHECK-NEXT: // kill: def $z0 killed $z0 killed $z0_z1 def $z0_z1185; CHECK-NEXT: st2d { z0.d, z1.d }, p0, [x0, #8, mul vl]186; CHECK-NEXT: ret187 %base = getelementptr <vscale x 2 x i64>, ptr %addr, i64 8, i64 0188 call void @llvm.aarch64.sve.st2.nxv2i64(<vscale x 2 x i64> %v0,189 <vscale x 2 x i64> %v1,190 <vscale x 2 x i1> %pred,191 ptr %base)192 ret void193}194 195define void @st2d_f64(<vscale x 2 x double> %v0, <vscale x 2 x double> %v1, <vscale x 2 x i1> %pred, ptr %addr) {196; CHECK-LABEL: st2d_f64:197; CHECK: // %bb.0:198; CHECK-NEXT: // kill: def $z1 killed $z1 killed $z0_z1 def $z0_z1199; CHECK-NEXT: // kill: def $z0 killed $z0 killed $z0_z1 def $z0_z1200; CHECK-NEXT: st2d { z0.d, z1.d }, p0, [x0, #10, mul vl]201; CHECK-NEXT: ret202 %base = getelementptr <vscale x 2 x double>, ptr %addr, i64 10, i64 0203 call void @llvm.aarch64.sve.st2.nxv2f64(<vscale x 2 x double> %v0,204 <vscale x 2 x double> %v1,205 <vscale x 2 x i1> %pred,206 ptr %base)207 ret void208}209 210;211; ST3B212;213 214define void @st3b_i8_valid_imm(<vscale x 16 x i8> %v0, <vscale x 16 x i8> %v1, <vscale x 16 x i8> %v2, <vscale x 16 x i1> %pred, ptr %addr) {215; CHECK-LABEL: st3b_i8_valid_imm:216; CHECK: // %bb.0:217; CHECK-NEXT: // kill: def $z2 killed $z2 killed $z0_z1_z2 def $z0_z1_z2218; CHECK-NEXT: // kill: def $z1 killed $z1 killed $z0_z1_z2 def $z0_z1_z2219; CHECK-NEXT: // kill: def $z0 killed $z0 killed $z0_z1_z2 def $z0_z1_z2220; CHECK-NEXT: st3b { z0.b - z2.b }, p0, [x0, #3, mul vl]221; CHECK-NEXT: ret222 %base = getelementptr <vscale x 16 x i8>, ptr %addr, i64 3, i64 0223 call void @llvm.aarch64.sve.st3.nxv16i8(<vscale x 16 x i8> %v0,224 <vscale x 16 x i8> %v1,225 <vscale x 16 x i8> %v2,226 <vscale x 16 x i1> %pred,227 ptr %base)228 ret void229}230 231define void @st3b_i8_invalid_imm_not_multiple_of_3_01(<vscale x 16 x i8> %v0, <vscale x 16 x i8> %v1, <vscale x 16 x i8> %v2, <vscale x 16 x i1> %pred, ptr %addr) {232; CHECK-LABEL: st3b_i8_invalid_imm_not_multiple_of_3_01:233; CHECK: // %bb.0:234; CHECK-NEXT: // kill: def $z2 killed $z2 killed $z0_z1_z2 def $z0_z1_z2235; CHECK-NEXT: rdvl x8, #4236; CHECK-NEXT: // kill: def $z1 killed $z1 killed $z0_z1_z2 def $z0_z1_z2237; CHECK-NEXT: // kill: def $z0 killed $z0 killed $z0_z1_z2 def $z0_z1_z2238; CHECK-NEXT: st3b { z0.b - z2.b }, p0, [x0, x8]239; CHECK-NEXT: ret240 %base = getelementptr <vscale x 16 x i8>, ptr %addr, i64 4, i64 0241 call void @llvm.aarch64.sve.st3.nxv16i8(<vscale x 16 x i8> %v0,242 <vscale x 16 x i8> %v1,243 <vscale x 16 x i8> %v2,244 <vscale x 16 x i1> %pred,245 ptr %base)246 ret void247}248 249define void @st3b_i8_invalid_imm_not_multiple_of_3_02(<vscale x 16 x i8> %v0, <vscale x 16 x i8> %v1, <vscale x 16 x i8> %v2, <vscale x 16 x i1> %pred, ptr %addr) {250; CHECK-LABEL: st3b_i8_invalid_imm_not_multiple_of_3_02:251; CHECK: // %bb.0:252; CHECK-NEXT: // kill: def $z2 killed $z2 killed $z0_z1_z2 def $z0_z1_z2253; CHECK-NEXT: rdvl x8, #5254; CHECK-NEXT: // kill: def $z1 killed $z1 killed $z0_z1_z2 def $z0_z1_z2255; CHECK-NEXT: // kill: def $z0 killed $z0 killed $z0_z1_z2 def $z0_z1_z2256; CHECK-NEXT: st3b { z0.b - z2.b }, p0, [x0, x8]257; CHECK-NEXT: ret258 %base = getelementptr <vscale x 16 x i8>, ptr %addr, i64 5, i64 0259 call void @llvm.aarch64.sve.st3.nxv16i8(<vscale x 16 x i8> %v0,260 <vscale x 16 x i8> %v1,261 <vscale x 16 x i8> %v2,262 <vscale x 16 x i1> %pred,263 ptr %base)264 ret void265}266 267define void @st3b_i8_invalid_imm_out_of_lower_bound(<vscale x 16 x i8> %v0, <vscale x 16 x i8> %v1, <vscale x 16 x i8> %v2, <vscale x 16 x i1> %pred, ptr %addr) {268; CHECK-LABEL: st3b_i8_invalid_imm_out_of_lower_bound:269; CHECK: // %bb.0:270; CHECK-NEXT: // kill: def $z2 killed $z2 killed $z0_z1_z2 def $z0_z1_z2271; CHECK-NEXT: rdvl x8, #-27272; CHECK-NEXT: // kill: def $z1 killed $z1 killed $z0_z1_z2 def $z0_z1_z2273; CHECK-NEXT: // kill: def $z0 killed $z0 killed $z0_z1_z2 def $z0_z1_z2274; CHECK-NEXT: st3b { z0.b - z2.b }, p0, [x0, x8]275; CHECK-NEXT: ret276 %base = getelementptr <vscale x 16 x i8>, ptr %addr, i64 -27, i64 0277 call void @llvm.aarch64.sve.st3.nxv16i8(<vscale x 16 x i8> %v0,278 <vscale x 16 x i8> %v1,279 <vscale x 16 x i8> %v2,280 <vscale x 16 x i1> %pred,281 ptr %base)282 ret void283}284 285define void @st3b_i8_invalid_imm_out_of_upper_bound(<vscale x 16 x i8> %v0, <vscale x 16 x i8> %v1, <vscale x 16 x i8> %v2, <vscale x 16 x i1> %pred, ptr %addr) {286; CHECK-LABEL: st3b_i8_invalid_imm_out_of_upper_bound:287; CHECK: // %bb.0:288; CHECK-NEXT: // kill: def $z2 killed $z2 killed $z0_z1_z2 def $z0_z1_z2289; CHECK-NEXT: rdvl x8, #24290; CHECK-NEXT: // kill: def $z1 killed $z1 killed $z0_z1_z2 def $z0_z1_z2291; CHECK-NEXT: // kill: def $z0 killed $z0 killed $z0_z1_z2 def $z0_z1_z2292; CHECK-NEXT: st3b { z0.b - z2.b }, p0, [x0, x8]293; CHECK-NEXT: ret294 %base = getelementptr <vscale x 16 x i8>, ptr %addr, i64 24, i64 0295 call void @llvm.aarch64.sve.st3.nxv16i8(<vscale x 16 x i8> %v0,296 <vscale x 16 x i8> %v1,297 <vscale x 16 x i8> %v2,298 <vscale x 16 x i1> %pred,299 ptr %base)300 ret void301}302 303define void @st3b_i8_valid_imm_lower_bound(<vscale x 16 x i8> %v0, <vscale x 16 x i8> %v1, <vscale x 16 x i8> %v2, <vscale x 16 x i1> %pred, ptr %addr) {304; CHECK-LABEL: st3b_i8_valid_imm_lower_bound:305; CHECK: // %bb.0:306; CHECK-NEXT: // kill: def $z2 killed $z2 killed $z0_z1_z2 def $z0_z1_z2307; CHECK-NEXT: // kill: def $z1 killed $z1 killed $z0_z1_z2 def $z0_z1_z2308; CHECK-NEXT: // kill: def $z0 killed $z0 killed $z0_z1_z2 def $z0_z1_z2309; CHECK-NEXT: st3b { z0.b - z2.b }, p0, [x0, #-24, mul vl]310; CHECK-NEXT: ret311 %base = getelementptr <vscale x 16 x i8>, ptr %addr, i64 -24, i64 0312 call void @llvm.aarch64.sve.st3.nxv16i8(<vscale x 16 x i8> %v0,313 <vscale x 16 x i8> %v1,314 <vscale x 16 x i8> %v2,315 <vscale x 16 x i1> %pred,316 ptr %base)317 ret void318}319 320define void @st3b_i8_valid_imm_upper_bound(<vscale x 16 x i8> %v0, <vscale x 16 x i8> %v1, <vscale x 16 x i8> %v2, <vscale x 16 x i1> %pred, ptr %addr) {321; CHECK-LABEL: st3b_i8_valid_imm_upper_bound:322; CHECK: // %bb.0:323; CHECK-NEXT: // kill: def $z2 killed $z2 killed $z0_z1_z2 def $z0_z1_z2324; CHECK-NEXT: // kill: def $z1 killed $z1 killed $z0_z1_z2 def $z0_z1_z2325; CHECK-NEXT: // kill: def $z0 killed $z0 killed $z0_z1_z2 def $z0_z1_z2326; CHECK-NEXT: st3b { z0.b - z2.b }, p0, [x0, #21, mul vl]327; CHECK-NEXT: ret328 %base = getelementptr <vscale x 16 x i8>, ptr %addr, i64 21, i64 0329 call void @llvm.aarch64.sve.st3.nxv16i8(<vscale x 16 x i8> %v0,330 <vscale x 16 x i8> %v1,331 <vscale x 16 x i8> %v2,332 <vscale x 16 x i1> %pred,333 ptr %base)334 ret void335}336 337;338; ST3H339;340 341define void @st3h_i16(<vscale x 8 x i16> %v0, <vscale x 8 x i16> %v1, <vscale x 8 x i16> %v2, <vscale x 8 x i1> %pred, ptr %addr) {342; CHECK-LABEL: st3h_i16:343; CHECK: // %bb.0:344; CHECK-NEXT: // kill: def $z2 killed $z2 killed $z0_z1_z2 def $z0_z1_z2345; CHECK-NEXT: // kill: def $z1 killed $z1 killed $z0_z1_z2 def $z0_z1_z2346; CHECK-NEXT: // kill: def $z0 killed $z0 killed $z0_z1_z2 def $z0_z1_z2347; CHECK-NEXT: st3h { z0.h - z2.h }, p0, [x0, #6, mul vl]348; CHECK-NEXT: ret349 %base = getelementptr <vscale x 8 x i16>, ptr %addr, i64 6, i64 0350 call void @llvm.aarch64.sve.st3.nxv8i16(<vscale x 8 x i16> %v0,351 <vscale x 8 x i16> %v1,352 <vscale x 8 x i16> %v2,353 <vscale x 8 x i1> %pred,354 ptr %base)355 ret void356}357 358define void @st3h_f16(<vscale x 8 x half> %v0, <vscale x 8 x half> %v1, <vscale x 8 x half> %v2, <vscale x 8 x i1> %pred, ptr %addr) {359; CHECK-LABEL: st3h_f16:360; CHECK: // %bb.0:361; CHECK-NEXT: // kill: def $z2 killed $z2 killed $z0_z1_z2 def $z0_z1_z2362; CHECK-NEXT: // kill: def $z1 killed $z1 killed $z0_z1_z2 def $z0_z1_z2363; CHECK-NEXT: // kill: def $z0 killed $z0 killed $z0_z1_z2 def $z0_z1_z2364; CHECK-NEXT: st3h { z0.h - z2.h }, p0, [x0, #9, mul vl]365; CHECK-NEXT: ret366 %base = getelementptr <vscale x 8 x half>, ptr %addr, i64 9, i64 0367 call void @llvm.aarch64.sve.st3.nxv8f16(<vscale x 8 x half> %v0,368 <vscale x 8 x half> %v1,369 <vscale x 8 x half> %v2,370 <vscale x 8 x i1> %pred,371 ptr %base)372 ret void373}374 375;376; ST3W377;378 379define void @st3w_i32(<vscale x 4 x i32> %v0, <vscale x 4 x i32> %v1, <vscale x 4 x i32> %v2, <vscale x 4 x i1> %pred, ptr %addr) {380; CHECK-LABEL: st3w_i32:381; CHECK: // %bb.0:382; CHECK-NEXT: // kill: def $z2 killed $z2 killed $z0_z1_z2 def $z0_z1_z2383; CHECK-NEXT: // kill: def $z1 killed $z1 killed $z0_z1_z2 def $z0_z1_z2384; CHECK-NEXT: // kill: def $z0 killed $z0 killed $z0_z1_z2 def $z0_z1_z2385; CHECK-NEXT: st3w { z0.s - z2.s }, p0, [x0, #12, mul vl]386; CHECK-NEXT: ret387 %base = getelementptr <vscale x 4 x i32>, ptr %addr, i64 12, i64 0388 call void @llvm.aarch64.sve.st3.nxv4i32(<vscale x 4 x i32> %v0,389 <vscale x 4 x i32> %v1,390 <vscale x 4 x i32> %v2,391 <vscale x 4 x i1> %pred,392 ptr %base)393 ret void394}395 396define void @st3w_f32(<vscale x 4 x float> %v0, <vscale x 4 x float> %v1, <vscale x 4 x float> %v2, <vscale x 4 x i1> %pred, ptr %addr) {397; CHECK-LABEL: st3w_f32:398; CHECK: // %bb.0:399; CHECK-NEXT: // kill: def $z2 killed $z2 killed $z0_z1_z2 def $z0_z1_z2400; CHECK-NEXT: // kill: def $z1 killed $z1 killed $z0_z1_z2 def $z0_z1_z2401; CHECK-NEXT: // kill: def $z0 killed $z0 killed $z0_z1_z2 def $z0_z1_z2402; CHECK-NEXT: st3w { z0.s - z2.s }, p0, [x0, #15, mul vl]403; CHECK-NEXT: ret404 %base = getelementptr <vscale x 4 x float>, ptr %addr, i64 15, i64 0405 call void @llvm.aarch64.sve.st3.nxv4f32(<vscale x 4 x float> %v0,406 <vscale x 4 x float> %v1,407 <vscale x 4 x float> %v2,408 <vscale x 4 x i1> %pred,409 ptr %base)410 ret void411}412 413;414; ST3D415;416 417define void @st3d_i64(<vscale x 2 x i64> %v0, <vscale x 2 x i64> %v1, <vscale x 2 x i64> %v2, <vscale x 2 x i1> %pred, ptr %addr) {418; CHECK-LABEL: st3d_i64:419; CHECK: // %bb.0:420; CHECK-NEXT: // kill: def $z2 killed $z2 killed $z0_z1_z2 def $z0_z1_z2421; CHECK-NEXT: // kill: def $z1 killed $z1 killed $z0_z1_z2 def $z0_z1_z2422; CHECK-NEXT: // kill: def $z0 killed $z0 killed $z0_z1_z2 def $z0_z1_z2423; CHECK-NEXT: st3d { z0.d - z2.d }, p0, [x0, #18, mul vl]424; CHECK-NEXT: ret425 %base = getelementptr <vscale x 2 x i64>, ptr %addr, i64 18, i64 0426 call void @llvm.aarch64.sve.st3.nxv2i64(<vscale x 2 x i64> %v0,427 <vscale x 2 x i64> %v1,428 <vscale x 2 x i64> %v2,429 <vscale x 2 x i1> %pred,430 ptr %base)431 ret void432}433 434define void @st3d_f64(<vscale x 2 x double> %v0, <vscale x 2 x double> %v1, <vscale x 2 x double> %v2, <vscale x 2 x i1> %pred, ptr %addr) {435; CHECK-LABEL: st3d_f64:436; CHECK: // %bb.0:437; CHECK-NEXT: // kill: def $z2 killed $z2 killed $z0_z1_z2 def $z0_z1_z2438; CHECK-NEXT: // kill: def $z1 killed $z1 killed $z0_z1_z2 def $z0_z1_z2439; CHECK-NEXT: // kill: def $z0 killed $z0 killed $z0_z1_z2 def $z0_z1_z2440; CHECK-NEXT: st3d { z0.d - z2.d }, p0, [x0, #-3, mul vl]441; CHECK-NEXT: ret442 %base = getelementptr <vscale x 2 x double>, ptr %addr, i64 -3, i64 0443 call void @llvm.aarch64.sve.st3.nxv2f64(<vscale x 2 x double> %v0,444 <vscale x 2 x double> %v1,445 <vscale x 2 x double> %v2,446 <vscale x 2 x i1> %pred,447 ptr %base)448 ret void449}450 451;452; ST4B453;454 455define void @st4b_i8_valid_imm(<vscale x 16 x i8> %v0, <vscale x 16 x i8> %v1, <vscale x 16 x i8> %v2, <vscale x 16 x i8> %v3, <vscale x 16 x i1> %pred, ptr %addr) {456; CHECK-LABEL: st4b_i8_valid_imm:457; CHECK: // %bb.0:458; CHECK-NEXT: // kill: def $z3 killed $z3 killed $z0_z1_z2_z3 def $z0_z1_z2_z3459; CHECK-NEXT: // kill: def $z2 killed $z2 killed $z0_z1_z2_z3 def $z0_z1_z2_z3460; CHECK-NEXT: // kill: def $z1 killed $z1 killed $z0_z1_z2_z3 def $z0_z1_z2_z3461; CHECK-NEXT: // kill: def $z0 killed $z0 killed $z0_z1_z2_z3 def $z0_z1_z2_z3462; CHECK-NEXT: st4b { z0.b - z3.b }, p0, [x0, #4, mul vl]463; CHECK-NEXT: ret464 %base = getelementptr <vscale x 16 x i8>, ptr %addr, i64 4, i64 0465 call void @llvm.aarch64.sve.st4.nxv16i8(<vscale x 16 x i8> %v0,466 <vscale x 16 x i8> %v1,467 <vscale x 16 x i8> %v2,468 <vscale x 16 x i8> %v3,469 <vscale x 16 x i1> %pred,470 ptr %base)471 ret void472}473 474define void @st4b_i8_invalid_imm_not_multiple_of_4_01(<vscale x 16 x i8> %v0, <vscale x 16 x i8> %v1, <vscale x 16 x i8> %v2, <vscale x 16 x i8> %v3, <vscale x 16 x i1> %pred, ptr %addr) {475; CHECK-LABEL: st4b_i8_invalid_imm_not_multiple_of_4_01:476; CHECK: // %bb.0:477; CHECK-NEXT: // kill: def $z3 killed $z3 killed $z0_z1_z2_z3 def $z0_z1_z2_z3478; CHECK-NEXT: rdvl x8, #5479; CHECK-NEXT: // kill: def $z2 killed $z2 killed $z0_z1_z2_z3 def $z0_z1_z2_z3480; CHECK-NEXT: // kill: def $z1 killed $z1 killed $z0_z1_z2_z3 def $z0_z1_z2_z3481; CHECK-NEXT: // kill: def $z0 killed $z0 killed $z0_z1_z2_z3 def $z0_z1_z2_z3482; CHECK-NEXT: st4b { z0.b - z3.b }, p0, [x0, x8]483; CHECK-NEXT: ret484 %base = getelementptr <vscale x 16 x i8>, ptr %addr, i64 5, i64 0485 call void @llvm.aarch64.sve.st4.nxv16i8(<vscale x 16 x i8> %v0,486 <vscale x 16 x i8> %v1,487 <vscale x 16 x i8> %v2,488 <vscale x 16 x i8> %v3,489 <vscale x 16 x i1> %pred,490 ptr %base)491 ret void492}493 494define void @st4b_i8_invalid_imm_not_multiple_of_4_02(<vscale x 16 x i8> %v0, <vscale x 16 x i8> %v1, <vscale x 16 x i8> %v2, <vscale x 16 x i8> %v3, <vscale x 16 x i1> %pred, ptr %addr) {495; CHECK-LABEL: st4b_i8_invalid_imm_not_multiple_of_4_02:496; CHECK: // %bb.0:497; CHECK-NEXT: // kill: def $z3 killed $z3 killed $z0_z1_z2_z3 def $z0_z1_z2_z3498; CHECK-NEXT: rdvl x8, #6499; CHECK-NEXT: // kill: def $z2 killed $z2 killed $z0_z1_z2_z3 def $z0_z1_z2_z3500; CHECK-NEXT: // kill: def $z1 killed $z1 killed $z0_z1_z2_z3 def $z0_z1_z2_z3501; CHECK-NEXT: // kill: def $z0 killed $z0 killed $z0_z1_z2_z3 def $z0_z1_z2_z3502; CHECK-NEXT: st4b { z0.b - z3.b }, p0, [x0, x8]503; CHECK-NEXT: ret504 %base = getelementptr <vscale x 16 x i8>, ptr %addr, i64 6, i64 0505 call void @llvm.aarch64.sve.st4.nxv16i8(<vscale x 16 x i8> %v0,506 <vscale x 16 x i8> %v1,507 <vscale x 16 x i8> %v2,508 <vscale x 16 x i8> %v3,509 <vscale x 16 x i1> %pred,510 ptr %base)511 ret void512}513 514define void @st4b_i8_invalid_imm_not_multiple_of_4_03(<vscale x 16 x i8> %v0, <vscale x 16 x i8> %v1, <vscale x 16 x i8> %v2, <vscale x 16 x i8> %v3, <vscale x 16 x i1> %pred, ptr %addr) {515; CHECK-LABEL: st4b_i8_invalid_imm_not_multiple_of_4_03:516; CHECK: // %bb.0:517; CHECK-NEXT: // kill: def $z3 killed $z3 killed $z0_z1_z2_z3 def $z0_z1_z2_z3518; CHECK-NEXT: rdvl x8, #7519; CHECK-NEXT: // kill: def $z2 killed $z2 killed $z0_z1_z2_z3 def $z0_z1_z2_z3520; CHECK-NEXT: // kill: def $z1 killed $z1 killed $z0_z1_z2_z3 def $z0_z1_z2_z3521; CHECK-NEXT: // kill: def $z0 killed $z0 killed $z0_z1_z2_z3 def $z0_z1_z2_z3522; CHECK-NEXT: st4b { z0.b - z3.b }, p0, [x0, x8]523; CHECK-NEXT: ret524 %base = getelementptr <vscale x 16 x i8>, ptr %addr, i64 7, i64 0525 call void @llvm.aarch64.sve.st4.nxv16i8(<vscale x 16 x i8> %v0,526 <vscale x 16 x i8> %v1,527 <vscale x 16 x i8> %v2,528 <vscale x 16 x i8> %v3,529 <vscale x 16 x i1> %pred,530 ptr %base)531 ret void532}533 534define void @st4b_i8_invalid_imm_out_of_lower_bound(<vscale x 16 x i8> %v0, <vscale x 16 x i8> %v1, <vscale x 16 x i8> %v2, <vscale x 16 x i8> %v3, <vscale x 16 x i1> %pred, ptr %addr) {535; CHECK-LABEL: st4b_i8_invalid_imm_out_of_lower_bound:536; CHECK: // %bb.0:537; CHECK-NEXT: rdvl x8, #1538; CHECK-NEXT: mov x9, #-576 // =0xfffffffffffffdc0539; CHECK-NEXT: // kill: def $z3 killed $z3 killed $z0_z1_z2_z3 def $z0_z1_z2_z3540; CHECK-NEXT: lsr x8, x8, #4541; CHECK-NEXT: // kill: def $z2 killed $z2 killed $z0_z1_z2_z3 def $z0_z1_z2_z3542; CHECK-NEXT: // kill: def $z1 killed $z1 killed $z0_z1_z2_z3 def $z0_z1_z2_z3543; CHECK-NEXT: mul x8, x8, x9544; CHECK-NEXT: // kill: def $z0 killed $z0 killed $z0_z1_z2_z3 def $z0_z1_z2_z3545; CHECK-NEXT: st4b { z0.b - z3.b }, p0, [x0, x8]546; CHECK-NEXT: ret547; FIXME: optimize OFFSET computation so that xOFFSET = (mul (RDVL #4) #9)548; xM = -9 * 2^6549; xP = RDVL * 2^-4550; xBASE = RDVL * 2^-4 * -9 * 2^6 = RDVL * -36551 %base = getelementptr <vscale x 16 x i8>, ptr %addr, i64 -36, i64 0552 call void @llvm.aarch64.sve.st4.nxv16i8(<vscale x 16 x i8> %v0,553 <vscale x 16 x i8> %v1,554 <vscale x 16 x i8> %v2,555 <vscale x 16 x i8> %v3,556 <vscale x 16 x i1> %pred,557 ptr %base)558 ret void559}560 561define void @st4b_i8_invalid_imm_out_of_upper_bound(<vscale x 16 x i8> %v0, <vscale x 16 x i8> %v1, <vscale x 16 x i8> %v2, <vscale x 16 x i8> %v3, <vscale x 16 x i1> %pred, ptr %addr) {562; CHECK-LABEL: st4b_i8_invalid_imm_out_of_upper_bound:563; CHECK: // %bb.0:564; CHECK-NEXT: rdvl x8, #1565; CHECK-NEXT: mov w9, #512 // =0x200566; CHECK-NEXT: // kill: def $z3 killed $z3 killed $z0_z1_z2_z3 def $z0_z1_z2_z3567; CHECK-NEXT: lsr x8, x8, #4568; CHECK-NEXT: // kill: def $z2 killed $z2 killed $z0_z1_z2_z3 def $z0_z1_z2_z3569; CHECK-NEXT: // kill: def $z1 killed $z1 killed $z0_z1_z2_z3 def $z0_z1_z2_z3570; CHECK-NEXT: mul x8, x8, x9571; CHECK-NEXT: // kill: def $z0 killed $z0 killed $z0_z1_z2_z3 def $z0_z1_z2_z3572; CHECK-NEXT: st4b { z0.b - z3.b }, p0, [x0, x8]573; CHECK-NEXT: ret574; FIXME: optimize OFFSET computation so that xOFFSET = (shl (RDVL #16) #1)575; xM = 2^9576; xP = RDVL * 2^-4577; xOFFSET = RDVL * 2^-4 * 2^9 = RDVL * 32578 %base = getelementptr <vscale x 16 x i8>, ptr %addr, i64 32, i64 0579 call void @llvm.aarch64.sve.st4.nxv16i8(<vscale x 16 x i8> %v0,580 <vscale x 16 x i8> %v1,581 <vscale x 16 x i8> %v2,582 <vscale x 16 x i8> %v3,583 <vscale x 16 x i1> %pred,584 ptr %base)585 ret void586}587 588define void @st4b_i8_valid_imm_lower_bound(<vscale x 16 x i8> %v0, <vscale x 16 x i8> %v1, <vscale x 16 x i8> %v2, <vscale x 16 x i8> %v3, <vscale x 16 x i1> %pred, ptr %addr) {589; CHECK-LABEL: st4b_i8_valid_imm_lower_bound:590; CHECK: // %bb.0:591; CHECK-NEXT: // kill: def $z3 killed $z3 killed $z0_z1_z2_z3 def $z0_z1_z2_z3592; CHECK-NEXT: // kill: def $z2 killed $z2 killed $z0_z1_z2_z3 def $z0_z1_z2_z3593; CHECK-NEXT: // kill: def $z1 killed $z1 killed $z0_z1_z2_z3 def $z0_z1_z2_z3594; CHECK-NEXT: // kill: def $z0 killed $z0 killed $z0_z1_z2_z3 def $z0_z1_z2_z3595; CHECK-NEXT: st4b { z0.b - z3.b }, p0, [x0, #-32, mul vl]596; CHECK-NEXT: ret597 %base = getelementptr <vscale x 16 x i8>, ptr %addr, i64 -32, i64 0598 call void @llvm.aarch64.sve.st4.nxv16i8(<vscale x 16 x i8> %v0,599 <vscale x 16 x i8> %v1,600 <vscale x 16 x i8> %v2,601 <vscale x 16 x i8> %v3,602 <vscale x 16 x i1> %pred,603 ptr %base)604 ret void605}606 607define void @st4b_i8_valid_imm_upper_bound(<vscale x 16 x i8> %v0, <vscale x 16 x i8> %v1, <vscale x 16 x i8> %v2, <vscale x 16 x i8> %v3, <vscale x 16 x i1> %pred, ptr %addr) {608; CHECK-LABEL: st4b_i8_valid_imm_upper_bound:609; CHECK: // %bb.0:610; CHECK-NEXT: // kill: def $z3 killed $z3 killed $z0_z1_z2_z3 def $z0_z1_z2_z3611; CHECK-NEXT: // kill: def $z2 killed $z2 killed $z0_z1_z2_z3 def $z0_z1_z2_z3612; CHECK-NEXT: // kill: def $z1 killed $z1 killed $z0_z1_z2_z3 def $z0_z1_z2_z3613; CHECK-NEXT: // kill: def $z0 killed $z0 killed $z0_z1_z2_z3 def $z0_z1_z2_z3614; CHECK-NEXT: st4b { z0.b - z3.b }, p0, [x0, #28, mul vl]615; CHECK-NEXT: ret616 %base = getelementptr <vscale x 16 x i8>, ptr %addr, i64 28, i64 0617 call void @llvm.aarch64.sve.st4.nxv16i8(<vscale x 16 x i8> %v0,618 <vscale x 16 x i8> %v1,619 <vscale x 16 x i8> %v2,620 <vscale x 16 x i8> %v3,621 <vscale x 16 x i1> %pred,622 ptr %base)623 ret void624}625 626;627; ST4H628;629 630define void @st4h_i16(<vscale x 8 x i16> %v0, <vscale x 8 x i16> %v1, <vscale x 8 x i16> %v2, <vscale x 8 x i16> %v3, <vscale x 8 x i1> %pred, ptr %addr) {631; CHECK-LABEL: st4h_i16:632; CHECK: // %bb.0:633; CHECK-NEXT: // kill: def $z3 killed $z3 killed $z0_z1_z2_z3 def $z0_z1_z2_z3634; CHECK-NEXT: // kill: def $z2 killed $z2 killed $z0_z1_z2_z3 def $z0_z1_z2_z3635; CHECK-NEXT: // kill: def $z1 killed $z1 killed $z0_z1_z2_z3 def $z0_z1_z2_z3636; CHECK-NEXT: // kill: def $z0 killed $z0 killed $z0_z1_z2_z3 def $z0_z1_z2_z3637; CHECK-NEXT: st4h { z0.h - z3.h }, p0, [x0, #8, mul vl]638; CHECK-NEXT: ret639 %base = getelementptr <vscale x 8 x i16>, ptr %addr, i64 8, i64 0640 call void @llvm.aarch64.sve.st4.nxv8i16(<vscale x 8 x i16> %v0,641 <vscale x 8 x i16> %v1,642 <vscale x 8 x i16> %v2,643 <vscale x 8 x i16> %v3,644 <vscale x 8 x i1> %pred,645 ptr %base)646 ret void647}648 649define void @st4h_f16(<vscale x 8 x half> %v0, <vscale x 8 x half> %v1, <vscale x 8 x half> %v2, <vscale x 8 x half> %v3, <vscale x 8 x i1> %pred, ptr %addr) {650; CHECK-LABEL: st4h_f16:651; CHECK: // %bb.0:652; CHECK-NEXT: // kill: def $z3 killed $z3 killed $z0_z1_z2_z3 def $z0_z1_z2_z3653; CHECK-NEXT: // kill: def $z2 killed $z2 killed $z0_z1_z2_z3 def $z0_z1_z2_z3654; CHECK-NEXT: // kill: def $z1 killed $z1 killed $z0_z1_z2_z3 def $z0_z1_z2_z3655; CHECK-NEXT: // kill: def $z0 killed $z0 killed $z0_z1_z2_z3 def $z0_z1_z2_z3656; CHECK-NEXT: st4h { z0.h - z3.h }, p0, [x0, #12, mul vl]657; CHECK-NEXT: ret658 %base = getelementptr <vscale x 8 x half>, ptr %addr, i64 12, i64 0659 call void @llvm.aarch64.sve.st4.nxv8f16(<vscale x 8 x half> %v0,660 <vscale x 8 x half> %v1,661 <vscale x 8 x half> %v2,662 <vscale x 8 x half> %v3,663 <vscale x 8 x i1> %pred,664 ptr %base)665 ret void666}667 668;669; ST4W670;671 672define void @st4w_i32(<vscale x 4 x i32> %v0, <vscale x 4 x i32> %v1, <vscale x 4 x i32> %v2, <vscale x 4 x i32> %v3, <vscale x 4 x i1> %pred, ptr %addr) {673; CHECK-LABEL: st4w_i32:674; CHECK: // %bb.0:675; CHECK-NEXT: // kill: def $z3 killed $z3 killed $z0_z1_z2_z3 def $z0_z1_z2_z3676; CHECK-NEXT: // kill: def $z2 killed $z2 killed $z0_z1_z2_z3 def $z0_z1_z2_z3677; CHECK-NEXT: // kill: def $z1 killed $z1 killed $z0_z1_z2_z3 def $z0_z1_z2_z3678; CHECK-NEXT: // kill: def $z0 killed $z0 killed $z0_z1_z2_z3 def $z0_z1_z2_z3679; CHECK-NEXT: st4w { z0.s - z3.s }, p0, [x0, #16, mul vl]680; CHECK-NEXT: ret681 %base = getelementptr <vscale x 4 x i32>, ptr %addr, i64 16, i64 0682 call void @llvm.aarch64.sve.st4.nxv4i32(<vscale x 4 x i32> %v0,683 <vscale x 4 x i32> %v1,684 <vscale x 4 x i32> %v2,685 <vscale x 4 x i32> %v3,686 <vscale x 4 x i1> %pred,687 ptr %base)688 ret void689}690 691define void @st4w_f32(<vscale x 4 x float> %v0, <vscale x 4 x float> %v1, <vscale x 4 x float> %v2, <vscale x 4 x float> %v3, <vscale x 4 x i1> %pred, ptr %addr) {692; CHECK-LABEL: st4w_f32:693; CHECK: // %bb.0:694; CHECK-NEXT: // kill: def $z3 killed $z3 killed $z0_z1_z2_z3 def $z0_z1_z2_z3695; CHECK-NEXT: // kill: def $z2 killed $z2 killed $z0_z1_z2_z3 def $z0_z1_z2_z3696; CHECK-NEXT: // kill: def $z1 killed $z1 killed $z0_z1_z2_z3 def $z0_z1_z2_z3697; CHECK-NEXT: // kill: def $z0 killed $z0 killed $z0_z1_z2_z3 def $z0_z1_z2_z3698; CHECK-NEXT: st4w { z0.s - z3.s }, p0, [x0, #20, mul vl]699; CHECK-NEXT: ret700 %base = getelementptr <vscale x 4 x float>, ptr %addr, i64 20, i64 0701 call void @llvm.aarch64.sve.st4.nxv4f32(<vscale x 4 x float> %v0,702 <vscale x 4 x float> %v1,703 <vscale x 4 x float> %v2,704 <vscale x 4 x float> %v3,705 <vscale x 4 x i1> %pred,706 ptr %base)707 ret void708}709 710;711; ST4D712;713 714define void @st4d_i64(<vscale x 2 x i64> %v0, <vscale x 2 x i64> %v1, <vscale x 2 x i64> %v2, <vscale x 2 x i64> %v3, <vscale x 2 x i1> %pred, ptr %addr) {715; CHECK-LABEL: st4d_i64:716; CHECK: // %bb.0:717; CHECK-NEXT: // kill: def $z3 killed $z3 killed $z0_z1_z2_z3 def $z0_z1_z2_z3718; CHECK-NEXT: // kill: def $z2 killed $z2 killed $z0_z1_z2_z3 def $z0_z1_z2_z3719; CHECK-NEXT: // kill: def $z1 killed $z1 killed $z0_z1_z2_z3 def $z0_z1_z2_z3720; CHECK-NEXT: // kill: def $z0 killed $z0 killed $z0_z1_z2_z3 def $z0_z1_z2_z3721; CHECK-NEXT: st4d { z0.d - z3.d }, p0, [x0, #24, mul vl]722; CHECK-NEXT: ret723 %base = getelementptr <vscale x 2 x i64>, ptr %addr, i64 24, i64 0724 call void @llvm.aarch64.sve.st4.nxv2i64(<vscale x 2 x i64> %v0,725 <vscale x 2 x i64> %v1,726 <vscale x 2 x i64> %v2,727 <vscale x 2 x i64> %v3,728 <vscale x 2 x i1> %pred,729 ptr %base)730 ret void731}732 733define void @st4d_f64(<vscale x 2 x double> %v0, <vscale x 2 x double> %v1, <vscale x 2 x double> %v2, <vscale x 2 x double> %v3, <vscale x 2 x i1> %pred, ptr %addr) {734; CHECK-LABEL: st4d_f64:735; CHECK: // %bb.0:736; CHECK-NEXT: // kill: def $z3 killed $z3 killed $z0_z1_z2_z3 def $z0_z1_z2_z3737; CHECK-NEXT: // kill: def $z2 killed $z2 killed $z0_z1_z2_z3 def $z0_z1_z2_z3738; CHECK-NEXT: // kill: def $z1 killed $z1 killed $z0_z1_z2_z3 def $z0_z1_z2_z3739; CHECK-NEXT: // kill: def $z0 killed $z0 killed $z0_z1_z2_z3 def $z0_z1_z2_z3740; CHECK-NEXT: st4d { z0.d - z3.d }, p0, [x0, #28, mul vl]741; CHECK-NEXT: ret742 %base = getelementptr <vscale x 2 x double>, ptr %addr, i64 28, i64 0743 call void @llvm.aarch64.sve.st4.nxv2f64(<vscale x 2 x double> %v0,744 <vscale x 2 x double> %v1,745 <vscale x 2 x double> %v2,746 <vscale x 2 x double> %v3,747 <vscale x 2 x i1> %pred,748 ptr %base)749 ret void750}751 752declare void @llvm.aarch64.sve.st2.nxv16i8(<vscale x 16 x i8>, <vscale x 16 x i8>, <vscale x 16 x i1>, ptr)753declare void @llvm.aarch64.sve.st2.nxv8i16(<vscale x 8 x i16>, <vscale x 8 x i16>, <vscale x 8 x i1>, ptr)754declare void @llvm.aarch64.sve.st2.nxv4i32(<vscale x 4 x i32>, <vscale x 4 x i32>, <vscale x 4 x i1>, ptr)755declare void @llvm.aarch64.sve.st2.nxv2i64(<vscale x 2 x i64>, <vscale x 2 x i64>, <vscale x 2 x i1>, ptr)756declare void @llvm.aarch64.sve.st2.nxv8f16(<vscale x 8 x half>, <vscale x 8 x half>, <vscale x 8 x i1>, ptr)757declare void @llvm.aarch64.sve.st2.nxv4f32(<vscale x 4 x float>, <vscale x 4 x float>, <vscale x 4 x i1>, ptr)758declare void @llvm.aarch64.sve.st2.nxv2f64(<vscale x 2 x double>, <vscale x 2 x double>, <vscale x 2 x i1>, ptr)759 760declare void @llvm.aarch64.sve.st3.nxv16i8(<vscale x 16 x i8>, <vscale x 16 x i8>, <vscale x 16 x i8>, <vscale x 16 x i1>, ptr)761declare void @llvm.aarch64.sve.st3.nxv8i16(<vscale x 8 x i16>, <vscale x 8 x i16>, <vscale x 8 x i16>, <vscale x 8 x i1>, ptr)762declare void @llvm.aarch64.sve.st3.nxv4i32(<vscale x 4 x i32>, <vscale x 4 x i32>, <vscale x 4 x i32>, <vscale x 4 x i1>, ptr)763declare void @llvm.aarch64.sve.st3.nxv2i64(<vscale x 2 x i64>, <vscale x 2 x i64>, <vscale x 2 x i64>, <vscale x 2 x i1>, ptr)764declare void @llvm.aarch64.sve.st3.nxv8f16(<vscale x 8 x half>, <vscale x 8 x half>, <vscale x 8 x half>, <vscale x 8 x i1>, ptr)765declare void @llvm.aarch64.sve.st3.nxv4f32(<vscale x 4 x float>, <vscale x 4 x float>, <vscale x 4 x float>, <vscale x 4 x i1>, ptr)766declare void @llvm.aarch64.sve.st3.nxv2f64(<vscale x 2 x double>, <vscale x 2 x double>, <vscale x 2 x double>, <vscale x 2 x i1>, ptr)767 768declare void @llvm.aarch64.sve.st4.nxv16i8(<vscale x 16 x i8>, <vscale x 16 x i8>, <vscale x 16 x i8>, <vscale x 16 x i8>, <vscale x 16 x i1>, ptr)769declare void @llvm.aarch64.sve.st4.nxv8i16(<vscale x 8 x i16>, <vscale x 8 x i16>, <vscale x 8 x i16>, <vscale x 8 x i16>, <vscale x 8 x i1>, ptr)770declare void @llvm.aarch64.sve.st4.nxv4i32(<vscale x 4 x i32>, <vscale x 4 x i32>, <vscale x 4 x i32>, <vscale x 4 x i32>, <vscale x 4 x i1>, ptr)771declare void @llvm.aarch64.sve.st4.nxv2i64(<vscale x 2 x i64>, <vscale x 2 x i64>, <vscale x 2 x i64>, <vscale x 2 x i64>, <vscale x 2 x i1>, ptr)772declare void @llvm.aarch64.sve.st4.nxv8f16(<vscale x 8 x half>, <vscale x 8 x half>, <vscale x 8 x half>, <vscale x 8 x half>, <vscale x 8 x i1>, ptr)773declare void @llvm.aarch64.sve.st4.nxv4f32(<vscale x 4 x float>, <vscale x 4 x float>, <vscale x 4 x float>, <vscale x 4 x float>, <vscale x 4 x i1>, ptr)774declare void @llvm.aarch64.sve.st4.nxv2f64(<vscale x 2 x double>, <vscale x 2 x double>, <vscale x 2 x double>, <vscale x 2 x double>, <vscale x 2 x i1>, ptr)775