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1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py2; RUN: llc -mtriple=aarch64-linux-gnu -mattr=+sve < %s | FileCheck %s3 4; LD1B5 6define <vscale x 16 x i8> @ld1b_lower_bound(ptr %a) {7; CHECK-LABEL: ld1b_lower_bound:8; CHECK: // %bb.0:9; CHECK-NEXT: ldr z0, [x0, #-8, mul vl]10; CHECK-NEXT: ret11 %base = getelementptr <vscale x 16 x i8>, ptr %a, i64 -812 %load = load <vscale x 16 x i8>, ptr %base13 ret <vscale x 16 x i8> %load14}15 16define <vscale x 16 x i8> @ld1b_inbound(ptr %a) {17; CHECK-LABEL: ld1b_inbound:18; CHECK: // %bb.0:19; CHECK-NEXT: ldr z0, [x0, #2, mul vl]20; CHECK-NEXT: ret21 %base = getelementptr <vscale x 16 x i8>, ptr %a, i64 222 %load = load <vscale x 16 x i8>, ptr %base23 ret <vscale x 16 x i8> %load24}25 26define <vscale x 16 x i8> @ld1b_upper_bound(ptr %a) {27; CHECK-LABEL: ld1b_upper_bound:28; CHECK: // %bb.0:29; CHECK-NEXT: ldr z0, [x0, #7, mul vl]30; CHECK-NEXT: ret31 %base = getelementptr <vscale x 16 x i8>, ptr %a, i64 732 %load = load <vscale x 16 x i8>, ptr %base33 ret <vscale x 16 x i8> %load34}35 36define <vscale x 16 x i8> @ld1b_out_of_upper_bound(ptr %a) {37; CHECK-LABEL: ld1b_out_of_upper_bound:38; CHECK: // %bb.0:39; CHECK-NEXT: ldr z0, [x0, #8, mul vl]40; CHECK-NEXT: ret41 %base = getelementptr <vscale x 16 x i8>, ptr %a, i64 842 %load = load <vscale x 16 x i8>, ptr %base43 ret <vscale x 16 x i8> %load44}45 46define <vscale x 16 x i8> @ld1b_out_of_lower_bound(ptr %a) {47; CHECK-LABEL: ld1b_out_of_lower_bound:48; CHECK: // %bb.0:49; CHECK-NEXT: ldr z0, [x0, #-9, mul vl]50; CHECK-NEXT: ret51 %base = getelementptr <vscale x 16 x i8>, ptr %a, i64 -952 %load = load <vscale x 16 x i8>, ptr %base53 ret <vscale x 16 x i8> %load54}55 56; LD1H57 58define <vscale x 8 x i16> @ld1h_inbound(ptr %a) {59; CHECK-LABEL: ld1h_inbound:60; CHECK: // %bb.0:61; CHECK-NEXT: ldr z0, [x0, #-2, mul vl]62; CHECK-NEXT: ret63 %base = getelementptr <vscale x 8 x i16>, ptr %a, i64 -264 %load = load <vscale x 8 x i16>, ptr %base65 ret <vscale x 8 x i16> %load66}67 68; LD1W69 70define <vscale x 4 x i32> @ld1s_inbound(ptr %a) {71; CHECK-LABEL: ld1s_inbound:72; CHECK: // %bb.0:73; CHECK-NEXT: ldr z0, [x0, #4, mul vl]74; CHECK-NEXT: ret75 %base = getelementptr <vscale x 4 x i32>, ptr %a, i64 476 %load = load <vscale x 4 x i32>, ptr %base77 ret <vscale x 4 x i32> %load78}79 80; LD1D81 82define <vscale x 2 x i64> @ld1d_inbound(ptr %a) {83; CHECK-LABEL: ld1d_inbound:84; CHECK: // %bb.0:85; CHECK-NEXT: ldr z0, [x0, #6, mul vl]86; CHECK-NEXT: ret87 %base = getelementptr <vscale x 2 x i64>, ptr %a, i64 688 %load = load <vscale x 2 x i64>, ptr %base89 ret <vscale x 2 x i64> %load90}91 92define void @load_nxv6f16(ptr %a) {93; CHECK-LABEL: load_nxv6f16:94; CHECK: // %bb.0:95; CHECK-NEXT: ptrue p0.d96; CHECK-NEXT: ptrue p1.s97; CHECK-NEXT: ld1h { z0.d }, p0/z, [x0, #2, mul vl]98; CHECK-NEXT: ld1h { z0.s }, p1/z, [x0]99; CHECK-NEXT: ret100 %val = load volatile <vscale x 6 x half>, ptr %a101 ret void102}103 104define void @load_nxv6f32(ptr %a) {105; CHECK-LABEL: load_nxv6f32:106; CHECK: // %bb.0:107; CHECK-NEXT: ptrue p0.d108; CHECK-NEXT: ld1w { z0.d }, p0/z, [x0, #2, mul vl]109; CHECK-NEXT: ldr z0, [x0]110; CHECK-NEXT: ret111 %val = load volatile <vscale x 6 x float>, ptr %a112 ret void113}114 115define void @load_nxv12f16(ptr %a) {116; CHECK-LABEL: load_nxv12f16:117; CHECK: // %bb.0:118; CHECK-NEXT: ptrue p0.s119; CHECK-NEXT: ld1h { z0.s }, p0/z, [x0, #2, mul vl]120; CHECK-NEXT: ldr z0, [x0]121; CHECK-NEXT: ret122 %val = load volatile <vscale x 12 x half>, ptr %a123 ret void124}125