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1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py2; RUN: llc < %s -mtriple=aarch64 -mattr=+sve | FileCheck %s3 4define <vscale x 1 x i64> @llrint_v1i64_v1f16(<vscale x 1 x half> %x) {5; CHECK-LABEL: llrint_v1i64_v1f16:6; CHECK: // %bb.0:7; CHECK-NEXT: ptrue p0.d8; CHECK-NEXT: mov z1.h, #-1025 // =0xfffffffffffffbff9; CHECK-NEXT: mov z2.d, #0x800000000000000010; CHECK-NEXT: mov w8, #31743 // =0x7bff11; CHECK-NEXT: frintx z0.h, p0/m, z0.h12; CHECK-NEXT: fcmge p1.h, p0/z, z0.h, z1.h13; CHECK-NEXT: mov z1.h, w814; CHECK-NEXT: fcvtzs z2.d, p1/m, z0.h15; CHECK-NEXT: fcmgt p1.h, p0/z, z0.h, z1.h16; CHECK-NEXT: mov z1.d, #0x7fffffffffffffff17; CHECK-NEXT: fcmuo p0.h, p0/z, z0.h, z0.h18; CHECK-NEXT: sel z0.d, p1, z1.d, z2.d19; CHECK-NEXT: mov z0.d, p0/m, #0 // =0x020; CHECK-NEXT: ret21 %a = call <vscale x 1 x i64> @llvm.llrint.nxv1i64.nxv1f16(<vscale x 1 x half> %x)22 ret <vscale x 1 x i64> %a23}24declare <vscale x 1 x i64> @llvm.llrint.nxv1i64.nxv1f16(<vscale x 1 x half>)25 26define <vscale x 2 x i64> @llrint_v1i64_v2f16(<vscale x 2 x half> %x) {27; CHECK-LABEL: llrint_v1i64_v2f16:28; CHECK: // %bb.0:29; CHECK-NEXT: ptrue p0.d30; CHECK-NEXT: mov z1.h, #-1025 // =0xfffffffffffffbff31; CHECK-NEXT: mov z2.d, #0x800000000000000032; CHECK-NEXT: mov w8, #31743 // =0x7bff33; CHECK-NEXT: frintx z0.h, p0/m, z0.h34; CHECK-NEXT: fcmge p1.h, p0/z, z0.h, z1.h35; CHECK-NEXT: mov z1.h, w836; CHECK-NEXT: fcvtzs z2.d, p1/m, z0.h37; CHECK-NEXT: fcmgt p1.h, p0/z, z0.h, z1.h38; CHECK-NEXT: mov z1.d, #0x7fffffffffffffff39; CHECK-NEXT: fcmuo p0.h, p0/z, z0.h, z0.h40; CHECK-NEXT: sel z0.d, p1, z1.d, z2.d41; CHECK-NEXT: mov z0.d, p0/m, #0 // =0x042; CHECK-NEXT: ret43 %a = call <vscale x 2 x i64> @llvm.llrint.nxv2i64.nxv2f16(<vscale x 2 x half> %x)44 ret <vscale x 2 x i64> %a45}46declare <vscale x 2 x i64> @llvm.llrint.nxv2i64.nxv2f16(<vscale x 2 x half>)47 48define <vscale x 4 x i64> @llrint_v4i64_v4f16(<vscale x 4 x half> %x) {49; CHECK-LABEL: llrint_v4i64_v4f16:50; CHECK: // %bb.0:51; CHECK-NEXT: uunpklo z1.d, z0.s52; CHECK-NEXT: uunpkhi z0.d, z0.s53; CHECK-NEXT: mov w8, #31743 // =0x7bff54; CHECK-NEXT: ptrue p0.d55; CHECK-NEXT: mov z2.h, #-1025 // =0xfffffffffffffbff56; CHECK-NEXT: mov z3.d, #0x800000000000000057; CHECK-NEXT: mov z4.d, #0x800000000000000058; CHECK-NEXT: mov z5.d, #0x7fffffffffffffff59; CHECK-NEXT: frintx z1.h, p0/m, z1.h60; CHECK-NEXT: frintx z0.h, p0/m, z0.h61; CHECK-NEXT: fcmge p1.h, p0/z, z1.h, z2.h62; CHECK-NEXT: fcmge p2.h, p0/z, z0.h, z2.h63; CHECK-NEXT: mov z2.h, w864; CHECK-NEXT: fcmuo p3.h, p0/z, z1.h, z1.h65; CHECK-NEXT: fcvtzs z4.d, p1/m, z1.h66; CHECK-NEXT: fcmgt p1.h, p0/z, z1.h, z2.h67; CHECK-NEXT: fcvtzs z3.d, p2/m, z0.h68; CHECK-NEXT: fcmgt p2.h, p0/z, z0.h, z2.h69; CHECK-NEXT: fcmuo p0.h, p0/z, z0.h, z0.h70; CHECK-NEXT: sel z0.d, p1, z5.d, z4.d71; CHECK-NEXT: sel z1.d, p2, z5.d, z3.d72; CHECK-NEXT: mov z0.d, p3/m, #0 // =0x073; CHECK-NEXT: mov z1.d, p0/m, #0 // =0x074; CHECK-NEXT: ret75 %a = call <vscale x 4 x i64> @llvm.llrint.nxv4i64.nxv4f16(<vscale x 4 x half> %x)76 ret <vscale x 4 x i64> %a77}78declare <vscale x 4 x i64> @llvm.llrint.nxv4i64.nxv4f16(<vscale x 4 x half>)79 80define <vscale x 8 x i64> @llrint_v8i64_v8f16(<vscale x 8 x half> %x) {81; CHECK-LABEL: llrint_v8i64_v8f16:82; CHECK: // %bb.0:83; CHECK-NEXT: str x29, [sp, #-16]! // 8-byte Folded Spill84; CHECK-NEXT: addvl sp, sp, #-185; CHECK-NEXT: str p6, [sp, #5, mul vl] // 2-byte Spill86; CHECK-NEXT: str p5, [sp, #6, mul vl] // 2-byte Spill87; CHECK-NEXT: str p4, [sp, #7, mul vl] // 2-byte Spill88; CHECK-NEXT: .cfi_escape 0x0f, 0x08, 0x8f, 0x10, 0x92, 0x2e, 0x00, 0x38, 0x1e, 0x22 // sp + 16 + 8 * VG89; CHECK-NEXT: .cfi_offset w29, -1690; CHECK-NEXT: uunpklo z1.s, z0.h91; CHECK-NEXT: uunpkhi z0.s, z0.h92; CHECK-NEXT: mov w8, #31743 // =0x7bff93; CHECK-NEXT: ptrue p0.d94; CHECK-NEXT: mov z4.h, #-1025 // =0xfffffffffffffbff95; CHECK-NEXT: mov z5.d, #0x800000000000000096; CHECK-NEXT: mov z6.d, #0x800000000000000097; CHECK-NEXT: mov z7.d, #0x800000000000000098; CHECK-NEXT: mov z25.d, #0x7fffffffffffffff99; CHECK-NEXT: uunpklo z2.d, z1.s100; CHECK-NEXT: uunpkhi z1.d, z1.s101; CHECK-NEXT: uunpklo z3.d, z0.s102; CHECK-NEXT: uunpkhi z0.d, z0.s103; CHECK-NEXT: frintx z2.h, p0/m, z2.h104; CHECK-NEXT: frintx z1.h, p0/m, z1.h105; CHECK-NEXT: frintx z3.h, p0/m, z3.h106; CHECK-NEXT: movprfx z24, z0107; CHECK-NEXT: frintx z24.h, p0/m, z0.h108; CHECK-NEXT: mov z0.h, w8109; CHECK-NEXT: fcmge p1.h, p0/z, z2.h, z4.h110; CHECK-NEXT: fcmge p2.h, p0/z, z1.h, z4.h111; CHECK-NEXT: fcmge p3.h, p0/z, z3.h, z4.h112; CHECK-NEXT: fcmgt p4.h, p0/z, z1.h, z0.h113; CHECK-NEXT: fcvtzs z5.d, p1/m, z2.h114; CHECK-NEXT: fcmge p1.h, p0/z, z24.h, z4.h115; CHECK-NEXT: mov z4.d, #0x8000000000000000116; CHECK-NEXT: fcvtzs z6.d, p2/m, z1.h117; CHECK-NEXT: fcmgt p2.h, p0/z, z2.h, z0.h118; CHECK-NEXT: fcvtzs z7.d, p3/m, z3.h119; CHECK-NEXT: fcmgt p5.h, p0/z, z3.h, z0.h120; CHECK-NEXT: fcmgt p6.h, p0/z, z24.h, z0.h121; CHECK-NEXT: fcvtzs z4.d, p1/m, z24.h122; CHECK-NEXT: fcmuo p3.h, p0/z, z2.h, z2.h123; CHECK-NEXT: sel z0.d, p2, z25.d, z5.d124; CHECK-NEXT: fcmuo p1.h, p0/z, z1.h, z1.h125; CHECK-NEXT: sel z1.d, p4, z25.d, z6.d126; CHECK-NEXT: sel z2.d, p5, z25.d, z7.d127; CHECK-NEXT: fcmuo p2.h, p0/z, z3.h, z3.h128; CHECK-NEXT: ldr p5, [sp, #6, mul vl] // 2-byte Reload129; CHECK-NEXT: fcmuo p0.h, p0/z, z24.h, z24.h130; CHECK-NEXT: sel z3.d, p6, z25.d, z4.d131; CHECK-NEXT: ldr p6, [sp, #5, mul vl] // 2-byte Reload132; CHECK-NEXT: ldr p4, [sp, #7, mul vl] // 2-byte Reload133; CHECK-NEXT: mov z0.d, p3/m, #0 // =0x0134; CHECK-NEXT: mov z1.d, p1/m, #0 // =0x0135; CHECK-NEXT: mov z2.d, p2/m, #0 // =0x0136; CHECK-NEXT: mov z3.d, p0/m, #0 // =0x0137; CHECK-NEXT: addvl sp, sp, #1138; CHECK-NEXT: ldr x29, [sp], #16 // 8-byte Folded Reload139; CHECK-NEXT: ret140 %a = call <vscale x 8 x i64> @llvm.llrint.nxv8i64.nxv8f16(<vscale x 8 x half> %x)141 ret <vscale x 8 x i64> %a142}143declare <vscale x 8 x i64> @llvm.llrint.nxv8i64.nxv8f16(<vscale x 8 x half>)144 145define <vscale x 16 x i64> @llrint_v16i64_v16f16(<vscale x 16 x half> %x) {146; CHECK-LABEL: llrint_v16i64_v16f16:147; CHECK: // %bb.0:148; CHECK-NEXT: str x29, [sp, #-16]! // 8-byte Folded Spill149; CHECK-NEXT: addvl sp, sp, #-1150; CHECK-NEXT: str p10, [sp, #1, mul vl] // 2-byte Spill151; CHECK-NEXT: str p9, [sp, #2, mul vl] // 2-byte Spill152; CHECK-NEXT: str p8, [sp, #3, mul vl] // 2-byte Spill153; CHECK-NEXT: str p7, [sp, #4, mul vl] // 2-byte Spill154; CHECK-NEXT: str p6, [sp, #5, mul vl] // 2-byte Spill155; CHECK-NEXT: str p5, [sp, #6, mul vl] // 2-byte Spill156; CHECK-NEXT: str p4, [sp, #7, mul vl] // 2-byte Spill157; CHECK-NEXT: .cfi_escape 0x0f, 0x08, 0x8f, 0x10, 0x92, 0x2e, 0x00, 0x38, 0x1e, 0x22 // sp + 16 + 8 * VG158; CHECK-NEXT: .cfi_offset w29, -16159; CHECK-NEXT: uunpklo z2.s, z0.h160; CHECK-NEXT: uunpkhi z3.s, z0.h161; CHECK-NEXT: mov w8, #31743 // =0x7bff162; CHECK-NEXT: uunpklo z7.s, z1.h163; CHECK-NEXT: ptrue p0.d164; CHECK-NEXT: mov z0.h, #-1025 // =0xfffffffffffffbff165; CHECK-NEXT: uunpkhi z1.s, z1.h166; CHECK-NEXT: mov z5.d, #0x8000000000000000167; CHECK-NEXT: mov z29.h, w8168; CHECK-NEXT: mov z31.d, #0x8000000000000000169; CHECK-NEXT: uunpklo z4.d, z2.s170; CHECK-NEXT: uunpklo z24.d, z3.s171; CHECK-NEXT: uunpkhi z25.d, z3.s172; CHECK-NEXT: uunpkhi z6.d, z2.s173; CHECK-NEXT: uunpklo z26.d, z7.s174; CHECK-NEXT: uunpkhi z7.d, z7.s175; CHECK-NEXT: mov z2.d, #0x8000000000000000176; CHECK-NEXT: uunpklo z30.d, z1.s177; CHECK-NEXT: mov z3.d, #0x8000000000000000178; CHECK-NEXT: uunpkhi z1.d, z1.s179; CHECK-NEXT: movprfx z27, z4180; CHECK-NEXT: frintx z27.h, p0/m, z4.h181; CHECK-NEXT: frintx z24.h, p0/m, z24.h182; CHECK-NEXT: frintx z25.h, p0/m, z25.h183; CHECK-NEXT: movprfx z28, z6184; CHECK-NEXT: frintx z28.h, p0/m, z6.h185; CHECK-NEXT: mov z4.d, #0x8000000000000000186; CHECK-NEXT: frintx z26.h, p0/m, z26.h187; CHECK-NEXT: frintx z7.h, p0/m, z7.h188; CHECK-NEXT: mov z6.d, #0x8000000000000000189; CHECK-NEXT: fcmge p1.h, p0/z, z27.h, z0.h190; CHECK-NEXT: fcmge p3.h, p0/z, z24.h, z0.h191; CHECK-NEXT: fcmge p4.h, p0/z, z25.h, z0.h192; CHECK-NEXT: fcmge p2.h, p0/z, z28.h, z0.h193; CHECK-NEXT: fcmge p5.h, p0/z, z26.h, z0.h194; CHECK-NEXT: fcvtzs z2.d, p1/m, z27.h195; CHECK-NEXT: fcvtzs z4.d, p3/m, z24.h196; CHECK-NEXT: fcvtzs z5.d, p4/m, z25.h197; CHECK-NEXT: fcmgt p3.h, p0/z, z27.h, z29.h198; CHECK-NEXT: fcvtzs z3.d, p2/m, z28.h199; CHECK-NEXT: fcmge p4.h, p0/z, z7.h, z0.h200; CHECK-NEXT: fcvtzs z6.d, p5/m, z26.h201; CHECK-NEXT: fcmuo p1.h, p0/z, z27.h, z27.h202; CHECK-NEXT: movprfx z27, z30203; CHECK-NEXT: frintx z27.h, p0/m, z30.h204; CHECK-NEXT: movprfx z30, z1205; CHECK-NEXT: frintx z30.h, p0/m, z1.h206; CHECK-NEXT: fcmgt p5.h, p0/z, z28.h, z29.h207; CHECK-NEXT: fcmuo p2.h, p0/z, z28.h, z28.h208; CHECK-NEXT: mov z28.d, #0x8000000000000000209; CHECK-NEXT: fcvtzs z31.d, p4/m, z7.h210; CHECK-NEXT: fcmge p4.h, p0/z, z27.h, z0.h211; CHECK-NEXT: fcmgt p6.h, p0/z, z24.h, z29.h212; CHECK-NEXT: fcmuo p7.h, p0/z, z24.h, z24.h213; CHECK-NEXT: mov z24.d, #0x7fffffffffffffff214; CHECK-NEXT: fcmgt p8.h, p0/z, z25.h, z29.h215; CHECK-NEXT: fcvtzs z28.d, p4/m, z27.h216; CHECK-NEXT: fcmuo p10.h, p0/z, z25.h, z25.h217; CHECK-NEXT: mov z25.d, #0x8000000000000000218; CHECK-NEXT: sel z1.d, p5, z24.d, z3.d219; CHECK-NEXT: sel z3.d, p8, z24.d, z5.d220; CHECK-NEXT: fcmge p4.h, p0/z, z30.h, z0.h221; CHECK-NEXT: sel z0.d, p3, z24.d, z2.d222; CHECK-NEXT: sel z2.d, p6, z24.d, z4.d223; CHECK-NEXT: mov z1.d, p2/m, #0 // =0x0224; CHECK-NEXT: mov z3.d, p10/m, #0 // =0x0225; CHECK-NEXT: ldr p10, [sp, #1, mul vl] // 2-byte Reload226; CHECK-NEXT: fcmgt p9.h, p0/z, z26.h, z29.h227; CHECK-NEXT: mov z2.d, p7/m, #0 // =0x0228; CHECK-NEXT: ldr p7, [sp, #4, mul vl] // 2-byte Reload229; CHECK-NEXT: fcvtzs z25.d, p4/m, z30.h230; CHECK-NEXT: mov z0.d, p1/m, #0 // =0x0231; CHECK-NEXT: fcmgt p5.h, p0/z, z7.h, z29.h232; CHECK-NEXT: fcmgt p6.h, p0/z, z27.h, z29.h233; CHECK-NEXT: sel z4.d, p9, z24.d, z6.d234; CHECK-NEXT: fcmgt p4.h, p0/z, z30.h, z29.h235; CHECK-NEXT: fcmuo p8.h, p0/z, z7.h, z7.h236; CHECK-NEXT: sel z5.d, p5, z24.d, z31.d237; CHECK-NEXT: ldr p5, [sp, #6, mul vl] // 2-byte Reload238; CHECK-NEXT: sel z6.d, p6, z24.d, z28.d239; CHECK-NEXT: ldr p6, [sp, #5, mul vl] // 2-byte Reload240; CHECK-NEXT: fcmuo p9.h, p0/z, z27.h, z27.h241; CHECK-NEXT: fcmuo p3.h, p0/z, z26.h, z26.h242; CHECK-NEXT: sel z7.d, p4, z24.d, z25.d243; CHECK-NEXT: ldr p4, [sp, #7, mul vl] // 2-byte Reload244; CHECK-NEXT: mov z5.d, p8/m, #0 // =0x0245; CHECK-NEXT: ldr p8, [sp, #3, mul vl] // 2-byte Reload246; CHECK-NEXT: fcmuo p0.h, p0/z, z30.h, z30.h247; CHECK-NEXT: mov z6.d, p9/m, #0 // =0x0248; CHECK-NEXT: ldr p9, [sp, #2, mul vl] // 2-byte Reload249; CHECK-NEXT: mov z4.d, p3/m, #0 // =0x0250; CHECK-NEXT: mov z7.d, p0/m, #0 // =0x0251; CHECK-NEXT: addvl sp, sp, #1252; CHECK-NEXT: ldr x29, [sp], #16 // 8-byte Folded Reload253; CHECK-NEXT: ret254 %a = call <vscale x 16 x i64> @llvm.llrint.nxv16i64.nxv16f16(<vscale x 16 x half> %x)255 ret <vscale x 16 x i64> %a256}257declare <vscale x 16 x i64> @llvm.llrint.nxv16i64.nxv16f16(<vscale x 16 x half>)258 259define <vscale x 32 x i64> @llrint_v32i64_v32f16(<vscale x 32 x half> %x) {260; CHECK-LABEL: llrint_v32i64_v32f16:261; CHECK: // %bb.0:262; CHECK-NEXT: str x29, [sp, #-16]! // 8-byte Folded Spill263; CHECK-NEXT: addvl sp, sp, #-18264; CHECK-NEXT: str p12, [sp, #7, mul vl] // 2-byte Spill265; CHECK-NEXT: str p11, [sp, #8, mul vl] // 2-byte Spill266; CHECK-NEXT: str p10, [sp, #9, mul vl] // 2-byte Spill267; CHECK-NEXT: str p9, [sp, #10, mul vl] // 2-byte Spill268; CHECK-NEXT: str p8, [sp, #11, mul vl] // 2-byte Spill269; CHECK-NEXT: str p7, [sp, #12, mul vl] // 2-byte Spill270; CHECK-NEXT: str p6, [sp, #13, mul vl] // 2-byte Spill271; CHECK-NEXT: str p5, [sp, #14, mul vl] // 2-byte Spill272; CHECK-NEXT: str p4, [sp, #15, mul vl] // 2-byte Spill273; CHECK-NEXT: str z23, [sp, #2, mul vl] // 16-byte Folded Spill274; CHECK-NEXT: str z22, [sp, #3, mul vl] // 16-byte Folded Spill275; CHECK-NEXT: str z21, [sp, #4, mul vl] // 16-byte Folded Spill276; CHECK-NEXT: str z20, [sp, #5, mul vl] // 16-byte Folded Spill277; CHECK-NEXT: str z19, [sp, #6, mul vl] // 16-byte Folded Spill278; CHECK-NEXT: str z18, [sp, #7, mul vl] // 16-byte Folded Spill279; CHECK-NEXT: str z17, [sp, #8, mul vl] // 16-byte Folded Spill280; CHECK-NEXT: str z16, [sp, #9, mul vl] // 16-byte Folded Spill281; CHECK-NEXT: str z15, [sp, #10, mul vl] // 16-byte Folded Spill282; CHECK-NEXT: str z14, [sp, #11, mul vl] // 16-byte Folded Spill283; CHECK-NEXT: str z13, [sp, #12, mul vl] // 16-byte Folded Spill284; CHECK-NEXT: str z12, [sp, #13, mul vl] // 16-byte Folded Spill285; CHECK-NEXT: str z11, [sp, #14, mul vl] // 16-byte Folded Spill286; CHECK-NEXT: str z10, [sp, #15, mul vl] // 16-byte Folded Spill287; CHECK-NEXT: str z9, [sp, #16, mul vl] // 16-byte Folded Spill288; CHECK-NEXT: str z8, [sp, #17, mul vl] // 16-byte Folded Spill289; CHECK-NEXT: .cfi_escape 0x0f, 0x0a, 0x8f, 0x10, 0x92, 0x2e, 0x00, 0x11, 0x90, 0x01, 0x1e, 0x22 // sp + 16 + 144 * VG290; CHECK-NEXT: .cfi_offset w29, -16291; CHECK-NEXT: .cfi_escape 0x10, 0x48, 0x09, 0x92, 0x2e, 0x00, 0x11, 0x78, 0x1e, 0x22, 0x40, 0x1c // $d8 @ cfa - 8 * VG - 16292; CHECK-NEXT: .cfi_escape 0x10, 0x49, 0x09, 0x92, 0x2e, 0x00, 0x11, 0x70, 0x1e, 0x22, 0x40, 0x1c // $d9 @ cfa - 16 * VG - 16293; CHECK-NEXT: .cfi_escape 0x10, 0x4a, 0x09, 0x92, 0x2e, 0x00, 0x11, 0x68, 0x1e, 0x22, 0x40, 0x1c // $d10 @ cfa - 24 * VG - 16294; CHECK-NEXT: .cfi_escape 0x10, 0x4b, 0x09, 0x92, 0x2e, 0x00, 0x11, 0x60, 0x1e, 0x22, 0x40, 0x1c // $d11 @ cfa - 32 * VG - 16295; CHECK-NEXT: .cfi_escape 0x10, 0x4c, 0x09, 0x92, 0x2e, 0x00, 0x11, 0x58, 0x1e, 0x22, 0x40, 0x1c // $d12 @ cfa - 40 * VG - 16296; CHECK-NEXT: .cfi_escape 0x10, 0x4d, 0x09, 0x92, 0x2e, 0x00, 0x11, 0x50, 0x1e, 0x22, 0x40, 0x1c // $d13 @ cfa - 48 * VG - 16297; CHECK-NEXT: .cfi_escape 0x10, 0x4e, 0x09, 0x92, 0x2e, 0x00, 0x11, 0x48, 0x1e, 0x22, 0x40, 0x1c // $d14 @ cfa - 56 * VG - 16298; CHECK-NEXT: .cfi_escape 0x10, 0x4f, 0x09, 0x92, 0x2e, 0x00, 0x11, 0x40, 0x1e, 0x22, 0x40, 0x1c // $d15 @ cfa - 64 * VG - 16299; CHECK-NEXT: uunpklo z4.s, z0.h300; CHECK-NEXT: uunpkhi z0.s, z0.h301; CHECK-NEXT: mov w9, #31743 // =0x7bff302; CHECK-NEXT: uunpklo z5.s, z1.h303; CHECK-NEXT: ptrue p0.d304; CHECK-NEXT: mov z28.h, #-1025 // =0xfffffffffffffbff305; CHECK-NEXT: uunpkhi z29.s, z1.h306; CHECK-NEXT: mov z7.d, #0x8000000000000000307; CHECK-NEXT: uunpklo z13.s, z2.h308; CHECK-NEXT: mov z9.d, #0x8000000000000000309; CHECK-NEXT: uunpkhi z14.s, z2.h310; CHECK-NEXT: uunpkhi z17.s, z3.h311; CHECK-NEXT: uunpklo z6.d, z4.s312; CHECK-NEXT: uunpkhi z4.d, z4.s313; CHECK-NEXT: uunpklo z27.d, z0.s314; CHECK-NEXT: uunpklo z31.d, z5.s315; CHECK-NEXT: uunpkhi z8.d, z5.s316; CHECK-NEXT: uunpkhi z30.d, z0.s317; CHECK-NEXT: uunpkhi z11.d, z29.s318; CHECK-NEXT: uunpklo z10.d, z29.s319; CHECK-NEXT: uunpklo z15.s, z3.h320; CHECK-NEXT: uunpklo z16.d, z14.s321; CHECK-NEXT: uunpkhi z14.d, z14.s322; CHECK-NEXT: mov z24.d, #0x8000000000000000323; CHECK-NEXT: movprfx z5, z27324; CHECK-NEXT: frintx z5.h, p0/m, z27.h325; CHECK-NEXT: movprfx z1, z6326; CHECK-NEXT: frintx z1.h, p0/m, z6.h327; CHECK-NEXT: frintx z4.h, p0/m, z4.h328; CHECK-NEXT: movprfx z12, z31329; CHECK-NEXT: frintx z12.h, p0/m, z31.h330; CHECK-NEXT: movprfx z27, z8331; CHECK-NEXT: frintx z27.h, p0/m, z8.h332; CHECK-NEXT: movprfx z6, z30333; CHECK-NEXT: frintx z6.h, p0/m, z30.h334; CHECK-NEXT: movprfx z31, z10335; CHECK-NEXT: frintx z31.h, p0/m, z10.h336; CHECK-NEXT: mov z8.d, #0x8000000000000000337; CHECK-NEXT: frintx z11.h, p0/m, z11.h338; CHECK-NEXT: movprfx z3, z16339; CHECK-NEXT: frintx z3.h, p0/m, z16.h340; CHECK-NEXT: mov z30.h, w9341; CHECK-NEXT: uunpklo z10.d, z13.s342; CHECK-NEXT: uunpkhi z13.d, z13.s343; CHECK-NEXT: uunpkhi z20.d, z15.s344; CHECK-NEXT: uunpklo z16.d, z17.s345; CHECK-NEXT: mov z25.d, #0x8000000000000000346; CHECK-NEXT: mov z0.d, #0x8000000000000000347; CHECK-NEXT: mov z18.d, #0x8000000000000000348; CHECK-NEXT: uunpklo z15.d, z15.s349; CHECK-NEXT: mov z2.d, #0x8000000000000000350; CHECK-NEXT: mov z21.d, #0x8000000000000000351; CHECK-NEXT: frintx z10.h, p0/m, z10.h352; CHECK-NEXT: mov z26.d, #0x8000000000000000353; CHECK-NEXT: mov z29.d, #0x7fffffffffffffff354; CHECK-NEXT: movprfx z19, z13355; CHECK-NEXT: frintx z19.h, p0/m, z13.h356; CHECK-NEXT: movprfx z13, z14357; CHECK-NEXT: frintx z13.h, p0/m, z14.h358; CHECK-NEXT: frintx z16.h, p0/m, z16.h359; CHECK-NEXT: mov z22.d, #0x8000000000000000360; CHECK-NEXT: mov z23.d, #0x8000000000000000361; CHECK-NEXT: mov z14.d, #0x8000000000000000362; CHECK-NEXT: frintx z15.h, p0/m, z15.h363; CHECK-NEXT: fcmge p4.h, p0/z, z4.h, z28.h364; CHECK-NEXT: fcmge p2.h, p0/z, z12.h, z28.h365; CHECK-NEXT: fcmgt p9.h, p0/z, z12.h, z30.h366; CHECK-NEXT: fcmuo p8.h, p0/z, z12.h, z12.h367; CHECK-NEXT: fcvtzs z7.d, p4/m, z4.h368; CHECK-NEXT: fcvtzs z8.d, p2/m, z12.h369; CHECK-NEXT: mov z12.d, #0x8000000000000000370; CHECK-NEXT: fcmge p4.h, p0/z, z27.h, z28.h371; CHECK-NEXT: fcmuo p10.h, p0/z, z11.h, z11.h372; CHECK-NEXT: fcmge p3.h, p0/z, z5.h, z28.h373; CHECK-NEXT: mov z8.d, p9/m, z29.d374; CHECK-NEXT: fcvtzs z9.d, p4/m, z27.h375; CHECK-NEXT: fcmge p4.h, p0/z, z11.h, z28.h376; CHECK-NEXT: fcvtzs z24.d, p3/m, z5.h377; CHECK-NEXT: mov z8.d, p8/m, #0 // =0x0378; CHECK-NEXT: fcmge p1.h, p0/z, z6.h, z28.h379; CHECK-NEXT: fcmge p5.h, p0/z, z1.h, z28.h380; CHECK-NEXT: str z8, [x8, #4, mul vl]381; CHECK-NEXT: fcvtzs z12.d, p4/m, z11.h382; CHECK-NEXT: fcmgt p4.h, p0/z, z11.h, z30.h383; CHECK-NEXT: uunpkhi z11.d, z17.s384; CHECK-NEXT: movprfx z17, z20385; CHECK-NEXT: frintx z17.h, p0/m, z20.h386; CHECK-NEXT: fcvtzs z25.d, p1/m, z6.h387; CHECK-NEXT: mov z20.d, #0x8000000000000000388; CHECK-NEXT: fcvtzs z0.d, p5/m, z1.h389; CHECK-NEXT: fcmge p6.h, p0/z, z10.h, z28.h390; CHECK-NEXT: frintx z11.h, p0/m, z11.h391; CHECK-NEXT: fcmge p3.h, p0/z, z31.h, z28.h392; CHECK-NEXT: fcmge p1.h, p0/z, z13.h, z28.h393; CHECK-NEXT: fcvtzs z18.d, p6/m, z10.h394; CHECK-NEXT: fcmgt p11.h, p0/z, z10.h, z30.h395; CHECK-NEXT: fcmge p5.h, p0/z, z11.h, z28.h396; CHECK-NEXT: fcvtzs z2.d, p3/m, z31.h397; CHECK-NEXT: fcvtzs z21.d, p1/m, z13.h398; CHECK-NEXT: fcmge p2.h, p0/z, z17.h, z28.h399; CHECK-NEXT: fcmge p3.h, p0/z, z16.h, z28.h400; CHECK-NEXT: fcmuo p1.h, p0/z, z10.h, z10.h401; CHECK-NEXT: sel z10.d, p4, z29.d, z12.d402; CHECK-NEXT: sel z12.d, p11, z29.d, z18.d403; CHECK-NEXT: fcvtzs z26.d, p5/m, z11.h404; CHECK-NEXT: fcvtzs z22.d, p2/m, z17.h405; CHECK-NEXT: fcmgt p4.h, p0/z, z11.h, z30.h406; CHECK-NEXT: fcvtzs z23.d, p3/m, z16.h407; CHECK-NEXT: mov z10.d, p10/m, #0 // =0x0408; CHECK-NEXT: mov z12.d, p1/m, #0 // =0x0409; CHECK-NEXT: fcmge p6.h, p0/z, z19.h, z28.h410; CHECK-NEXT: str z10, [x8, #7, mul vl]411; CHECK-NEXT: fcmge p7.h, p0/z, z3.h, z28.h412; CHECK-NEXT: str z12, [x8, #8, mul vl]413; CHECK-NEXT: mov z26.d, p4/m, z29.d414; CHECK-NEXT: fcmge p2.h, p0/z, z15.h, z28.h415; CHECK-NEXT: mov z28.d, #0x8000000000000000416; CHECK-NEXT: fcvtzs z14.d, p6/m, z19.h417; CHECK-NEXT: fcmgt p5.h, p0/z, z16.h, z30.h418; CHECK-NEXT: fcmgt p3.h, p0/z, z17.h, z30.h419; CHECK-NEXT: fcvtzs z20.d, p7/m, z3.h420; CHECK-NEXT: fcvtzs z28.d, p2/m, z15.h421; CHECK-NEXT: fcmuo p1.h, p0/z, z11.h, z11.h422; CHECK-NEXT: fcmuo p2.h, p0/z, z16.h, z16.h423; CHECK-NEXT: sel z11.d, p5, z29.d, z23.d424; CHECK-NEXT: sel z16.d, p3, z29.d, z22.d425; CHECK-NEXT: fcmgt p4.h, p0/z, z19.h, z30.h426; CHECK-NEXT: fcmgt p3.h, p0/z, z15.h, z30.h427; CHECK-NEXT: mov z26.d, p1/m, #0 // =0x0428; CHECK-NEXT: mov z11.d, p2/m, #0 // =0x0429; CHECK-NEXT: fcmgt p1.h, p0/z, z13.h, z30.h430; CHECK-NEXT: fcmuo p6.h, p0/z, z17.h, z17.h431; CHECK-NEXT: str z26, [x8, #15, mul vl]432; CHECK-NEXT: sel z26.d, p4, z29.d, z14.d433; CHECK-NEXT: str z11, [x8, #14, mul vl]434; CHECK-NEXT: mov z28.d, p3/m, z29.d435; CHECK-NEXT: fcmgt p2.h, p0/z, z3.h, z30.h436; CHECK-NEXT: fcmuo p4.h, p0/z, z13.h, z13.h437; CHECK-NEXT: fcmuo p3.h, p0/z, z3.h, z3.h438; CHECK-NEXT: sel z3.d, p1, z29.d, z21.d439; CHECK-NEXT: mov z16.d, p6/m, #0 // =0x0440; CHECK-NEXT: fcmgt p12.h, p0/z, z27.h, z30.h441; CHECK-NEXT: sel z11.d, p2, z29.d, z20.d442; CHECK-NEXT: str z16, [x8, #13, mul vl]443; CHECK-NEXT: mov z3.d, p4/m, #0 // =0x0444; CHECK-NEXT: fcmuo p6.h, p0/z, z15.h, z15.h445; CHECK-NEXT: fcmgt p1.h, p0/z, z4.h, z30.h446; CHECK-NEXT: mov z11.d, p3/m, #0 // =0x0447; CHECK-NEXT: mov z9.d, p12/m, z29.d448; CHECK-NEXT: str z3, [x8, #11, mul vl]449; CHECK-NEXT: fcmuo p5.h, p0/z, z19.h, z19.h450; CHECK-NEXT: fcmgt p2.h, p0/z, z5.h, z30.h451; CHECK-NEXT: str z11, [x8, #10, mul vl]452; CHECK-NEXT: mov z28.d, p6/m, #0 // =0x0453; CHECK-NEXT: sel z3.d, p1, z29.d, z7.d454; CHECK-NEXT: fcmgt p4.h, p0/z, z6.h, z30.h455; CHECK-NEXT: fcmuo p3.h, p0/z, z27.h, z27.h456; CHECK-NEXT: str z28, [x8, #12, mul vl]457; CHECK-NEXT: mov z26.d, p5/m, #0 // =0x0458; CHECK-NEXT: sel z7.d, p2, z29.d, z24.d459; CHECK-NEXT: fcmgt p6.h, p0/z, z31.h, z30.h460; CHECK-NEXT: fcmgt p1.h, p0/z, z1.h, z30.h461; CHECK-NEXT: str z26, [x8, #9, mul vl]462; CHECK-NEXT: sel z24.d, p4, z29.d, z25.d463; CHECK-NEXT: mov z9.d, p3/m, #0 // =0x0464; CHECK-NEXT: fcmuo p5.h, p0/z, z31.h, z31.h465; CHECK-NEXT: fcmuo p2.h, p0/z, z6.h, z6.h466; CHECK-NEXT: mov z2.d, p6/m, z29.d467; CHECK-NEXT: str z9, [x8, #5, mul vl]468; CHECK-NEXT: mov z0.d, p1/m, z29.d469; CHECK-NEXT: fcmuo p3.h, p0/z, z5.h, z5.h470; CHECK-NEXT: fcmuo p4.h, p0/z, z4.h, z4.h471; CHECK-NEXT: mov z2.d, p5/m, #0 // =0x0472; CHECK-NEXT: mov z24.d, p2/m, #0 // =0x0473; CHECK-NEXT: fcmuo p0.h, p0/z, z1.h, z1.h474; CHECK-NEXT: mov z7.d, p3/m, #0 // =0x0475; CHECK-NEXT: str z2, [x8, #6, mul vl]476; CHECK-NEXT: mov z3.d, p4/m, #0 // =0x0477; CHECK-NEXT: str z24, [x8, #3, mul vl]478; CHECK-NEXT: mov z0.d, p0/m, #0 // =0x0479; CHECK-NEXT: str z7, [x8, #2, mul vl]480; CHECK-NEXT: str z3, [x8, #1, mul vl]481; CHECK-NEXT: str z0, [x8]482; CHECK-NEXT: ldr z23, [sp, #2, mul vl] // 16-byte Folded Reload483; CHECK-NEXT: ldr z22, [sp, #3, mul vl] // 16-byte Folded Reload484; CHECK-NEXT: ldr z21, [sp, #4, mul vl] // 16-byte Folded Reload485; CHECK-NEXT: ldr z20, [sp, #5, mul vl] // 16-byte Folded Reload486; CHECK-NEXT: ldr z19, [sp, #6, mul vl] // 16-byte Folded Reload487; CHECK-NEXT: ldr z18, [sp, #7, mul vl] // 16-byte Folded Reload488; CHECK-NEXT: ldr z17, [sp, #8, mul vl] // 16-byte Folded Reload489; CHECK-NEXT: ldr z16, [sp, #9, mul vl] // 16-byte Folded Reload490; CHECK-NEXT: ldr z15, [sp, #10, mul vl] // 16-byte Folded Reload491; CHECK-NEXT: ldr z14, [sp, #11, mul vl] // 16-byte Folded Reload492; CHECK-NEXT: ldr z13, [sp, #12, mul vl] // 16-byte Folded Reload493; CHECK-NEXT: ldr z12, [sp, #13, mul vl] // 16-byte Folded Reload494; CHECK-NEXT: ldr z11, [sp, #14, mul vl] // 16-byte Folded Reload495; CHECK-NEXT: ldr z10, [sp, #15, mul vl] // 16-byte Folded Reload496; CHECK-NEXT: ldr z9, [sp, #16, mul vl] // 16-byte Folded Reload497; CHECK-NEXT: ldr z8, [sp, #17, mul vl] // 16-byte Folded Reload498; CHECK-NEXT: ldr p12, [sp, #7, mul vl] // 2-byte Reload499; CHECK-NEXT: ldr p11, [sp, #8, mul vl] // 2-byte Reload500; CHECK-NEXT: ldr p10, [sp, #9, mul vl] // 2-byte Reload501; CHECK-NEXT: ldr p9, [sp, #10, mul vl] // 2-byte Reload502; CHECK-NEXT: ldr p8, [sp, #11, mul vl] // 2-byte Reload503; CHECK-NEXT: ldr p7, [sp, #12, mul vl] // 2-byte Reload504; CHECK-NEXT: ldr p6, [sp, #13, mul vl] // 2-byte Reload505; CHECK-NEXT: ldr p5, [sp, #14, mul vl] // 2-byte Reload506; CHECK-NEXT: ldr p4, [sp, #15, mul vl] // 2-byte Reload507; CHECK-NEXT: addvl sp, sp, #18508; CHECK-NEXT: ldr x29, [sp], #16 // 8-byte Folded Reload509; CHECK-NEXT: ret510 %a = call <vscale x 32 x i64> @llvm.llrint.nxv32i64.nxv32f16(<vscale x 32 x half> %x)511 ret <vscale x 32 x i64> %a512}513declare <vscale x 32 x i64> @llvm.llrint.nxv32i64.nxv32f16(<vscale x 32 x half>)514 515define <vscale x 1 x i64> @llrint_v1i64_v1f32(<vscale x 1 x float> %x) {516; CHECK-LABEL: llrint_v1i64_v1f32:517; CHECK: // %bb.0:518; CHECK-NEXT: ptrue p0.d519; CHECK-NEXT: mov w8, #-553648128 // =0xdf000000520; CHECK-NEXT: mov z2.d, #0x8000000000000000521; CHECK-NEXT: mov z1.s, w8522; CHECK-NEXT: mov w8, #1593835519 // =0x5effffff523; CHECK-NEXT: frintx z0.s, p0/m, z0.s524; CHECK-NEXT: fcmge p1.s, p0/z, z0.s, z1.s525; CHECK-NEXT: mov z1.s, w8526; CHECK-NEXT: fcvtzs z2.d, p1/m, z0.s527; CHECK-NEXT: fcmgt p1.s, p0/z, z0.s, z1.s528; CHECK-NEXT: mov z1.d, #0x7fffffffffffffff529; CHECK-NEXT: fcmuo p0.s, p0/z, z0.s, z0.s530; CHECK-NEXT: sel z0.d, p1, z1.d, z2.d531; CHECK-NEXT: mov z0.d, p0/m, #0 // =0x0532; CHECK-NEXT: ret533 %a = call <vscale x 1 x i64> @llvm.llrint.nxv1i64.nxv1f32(<vscale x 1 x float> %x)534 ret <vscale x 1 x i64> %a535}536declare <vscale x 1 x i64> @llvm.llrint.nxv1i64.nxv1f32(<vscale x 1 x float>)537 538define <vscale x 2 x i64> @llrint_v2i64_v2f32(<vscale x 2 x float> %x) {539; CHECK-LABEL: llrint_v2i64_v2f32:540; CHECK: // %bb.0:541; CHECK-NEXT: ptrue p0.d542; CHECK-NEXT: mov w8, #-553648128 // =0xdf000000543; CHECK-NEXT: mov z2.d, #0x8000000000000000544; CHECK-NEXT: mov z1.s, w8545; CHECK-NEXT: mov w8, #1593835519 // =0x5effffff546; CHECK-NEXT: frintx z0.s, p0/m, z0.s547; CHECK-NEXT: fcmge p1.s, p0/z, z0.s, z1.s548; CHECK-NEXT: mov z1.s, w8549; CHECK-NEXT: fcvtzs z2.d, p1/m, z0.s550; CHECK-NEXT: fcmgt p1.s, p0/z, z0.s, z1.s551; CHECK-NEXT: mov z1.d, #0x7fffffffffffffff552; CHECK-NEXT: fcmuo p0.s, p0/z, z0.s, z0.s553; CHECK-NEXT: sel z0.d, p1, z1.d, z2.d554; CHECK-NEXT: mov z0.d, p0/m, #0 // =0x0555; CHECK-NEXT: ret556 %a = call <vscale x 2 x i64> @llvm.llrint.nxv2i64.nxv2f32(<vscale x 2 x float> %x)557 ret <vscale x 2 x i64> %a558}559declare <vscale x 2 x i64> @llvm.llrint.nxv2i64.nxv2f32(<vscale x 2 x float>)560 561define <vscale x 4 x i64> @llrint_v4i64_v4f32(<vscale x 4 x float> %x) {562; CHECK-LABEL: llrint_v4i64_v4f32:563; CHECK: // %bb.0:564; CHECK-NEXT: uunpklo z1.d, z0.s565; CHECK-NEXT: uunpkhi z0.d, z0.s566; CHECK-NEXT: mov w8, #-553648128 // =0xdf000000567; CHECK-NEXT: ptrue p0.d568; CHECK-NEXT: mov z2.s, w8569; CHECK-NEXT: mov w8, #1593835519 // =0x5effffff570; CHECK-NEXT: mov z3.d, #0x8000000000000000571; CHECK-NEXT: mov z4.d, #0x8000000000000000572; CHECK-NEXT: mov z5.d, #0x7fffffffffffffff573; CHECK-NEXT: frintx z1.s, p0/m, z1.s574; CHECK-NEXT: frintx z0.s, p0/m, z0.s575; CHECK-NEXT: fcmge p1.s, p0/z, z1.s, z2.s576; CHECK-NEXT: fcmge p2.s, p0/z, z0.s, z2.s577; CHECK-NEXT: mov z2.s, w8578; CHECK-NEXT: fcmuo p3.s, p0/z, z1.s, z1.s579; CHECK-NEXT: fcvtzs z4.d, p1/m, z1.s580; CHECK-NEXT: fcmgt p1.s, p0/z, z1.s, z2.s581; CHECK-NEXT: fcvtzs z3.d, p2/m, z0.s582; CHECK-NEXT: fcmgt p2.s, p0/z, z0.s, z2.s583; CHECK-NEXT: fcmuo p0.s, p0/z, z0.s, z0.s584; CHECK-NEXT: sel z0.d, p1, z5.d, z4.d585; CHECK-NEXT: sel z1.d, p2, z5.d, z3.d586; CHECK-NEXT: mov z0.d, p3/m, #0 // =0x0587; CHECK-NEXT: mov z1.d, p0/m, #0 // =0x0588; CHECK-NEXT: ret589 %a = call <vscale x 4 x i64> @llvm.llrint.nxv4i64.nxv4f32(<vscale x 4 x float> %x)590 ret <vscale x 4 x i64> %a591}592declare <vscale x 4 x i64> @llvm.llrint.nxv4i64.nxv4f32(<vscale x 4 x float>)593 594define <vscale x 8 x i64> @llrint_v8i64_v8f32(<vscale x 8 x float> %x) {595; CHECK-LABEL: llrint_v8i64_v8f32:596; CHECK: // %bb.0:597; CHECK-NEXT: str x29, [sp, #-16]! // 8-byte Folded Spill598; CHECK-NEXT: addvl sp, sp, #-1599; CHECK-NEXT: str p6, [sp, #5, mul vl] // 2-byte Spill600; CHECK-NEXT: str p5, [sp, #6, mul vl] // 2-byte Spill601; CHECK-NEXT: str p4, [sp, #7, mul vl] // 2-byte Spill602; CHECK-NEXT: .cfi_escape 0x0f, 0x08, 0x8f, 0x10, 0x92, 0x2e, 0x00, 0x38, 0x1e, 0x22 // sp + 16 + 8 * VG603; CHECK-NEXT: .cfi_offset w29, -16604; CHECK-NEXT: uunpklo z2.d, z0.s605; CHECK-NEXT: ptrue p0.d606; CHECK-NEXT: mov w8, #-553648128 // =0xdf000000607; CHECK-NEXT: uunpkhi z0.d, z0.s608; CHECK-NEXT: uunpklo z3.d, z1.s609; CHECK-NEXT: uunpkhi z1.d, z1.s610; CHECK-NEXT: mov z4.s, w8611; CHECK-NEXT: mov w8, #1593835519 // =0x5effffff612; CHECK-NEXT: mov z5.d, #0x8000000000000000613; CHECK-NEXT: mov z7.d, #0x8000000000000000614; CHECK-NEXT: mov z24.d, #0x8000000000000000615; CHECK-NEXT: mov z25.s, w8616; CHECK-NEXT: frintx z2.s, p0/m, z2.s617; CHECK-NEXT: mov z26.d, #0x8000000000000000618; CHECK-NEXT: movprfx z6, z0619; CHECK-NEXT: frintx z6.s, p0/m, z0.s620; CHECK-NEXT: frintx z3.s, p0/m, z3.s621; CHECK-NEXT: frintx z1.s, p0/m, z1.s622; CHECK-NEXT: fcmge p1.s, p0/z, z2.s, z4.s623; CHECK-NEXT: fcmge p2.s, p0/z, z6.s, z4.s624; CHECK-NEXT: fcmge p3.s, p0/z, z3.s, z4.s625; CHECK-NEXT: fcmgt p4.s, p0/z, z2.s, z25.s626; CHECK-NEXT: fcvtzs z5.d, p1/m, z2.s627; CHECK-NEXT: fcmge p1.s, p0/z, z1.s, z4.s628; CHECK-NEXT: mov z4.d, #0x7fffffffffffffff629; CHECK-NEXT: fcvtzs z7.d, p2/m, z6.s630; CHECK-NEXT: fcvtzs z24.d, p3/m, z3.s631; CHECK-NEXT: fcmgt p3.s, p0/z, z6.s, z25.s632; CHECK-NEXT: fcmgt p5.s, p0/z, z3.s, z25.s633; CHECK-NEXT: fcvtzs z26.d, p1/m, z1.s634; CHECK-NEXT: sel z0.d, p4, z4.d, z5.d635; CHECK-NEXT: fcmgt p1.s, p0/z, z1.s, z25.s636; CHECK-NEXT: fcmuo p4.s, p0/z, z6.s, z6.s637; CHECK-NEXT: fcmuo p6.s, p0/z, z3.s, z3.s638; CHECK-NEXT: fcmuo p2.s, p0/z, z2.s, z2.s639; CHECK-NEXT: sel z2.d, p5, z4.d, z24.d640; CHECK-NEXT: ldr p5, [sp, #6, mul vl] // 2-byte Reload641; CHECK-NEXT: fcmuo p0.s, p0/z, z1.s, z1.s642; CHECK-NEXT: sel z1.d, p3, z4.d, z7.d643; CHECK-NEXT: sel z3.d, p1, z4.d, z26.d644; CHECK-NEXT: mov z2.d, p6/m, #0 // =0x0645; CHECK-NEXT: ldr p6, [sp, #5, mul vl] // 2-byte Reload646; CHECK-NEXT: mov z1.d, p4/m, #0 // =0x0647; CHECK-NEXT: ldr p4, [sp, #7, mul vl] // 2-byte Reload648; CHECK-NEXT: mov z0.d, p2/m, #0 // =0x0649; CHECK-NEXT: mov z3.d, p0/m, #0 // =0x0650; CHECK-NEXT: addvl sp, sp, #1651; CHECK-NEXT: ldr x29, [sp], #16 // 8-byte Folded Reload652; CHECK-NEXT: ret653 %a = call <vscale x 8 x i64> @llvm.llrint.nxv8i64.nxv8f32(<vscale x 8 x float> %x)654 ret <vscale x 8 x i64> %a655}656declare <vscale x 8 x i64> @llvm.llrint.nxv8i64.nxv8f32(<vscale x 8 x float>)657 658define <vscale x 16 x i64> @llrint_v16i64_v16f32(<vscale x 16 x float> %x) {659; CHECK-LABEL: llrint_v16i64_v16f32:660; CHECK: // %bb.0:661; CHECK-NEXT: str x29, [sp, #-16]! // 8-byte Folded Spill662; CHECK-NEXT: addvl sp, sp, #-3663; CHECK-NEXT: str p10, [sp, #1, mul vl] // 2-byte Spill664; CHECK-NEXT: str p9, [sp, #2, mul vl] // 2-byte Spill665; CHECK-NEXT: str p8, [sp, #3, mul vl] // 2-byte Spill666; CHECK-NEXT: str p7, [sp, #4, mul vl] // 2-byte Spill667; CHECK-NEXT: str p6, [sp, #5, mul vl] // 2-byte Spill668; CHECK-NEXT: str p5, [sp, #6, mul vl] // 2-byte Spill669; CHECK-NEXT: str p4, [sp, #7, mul vl] // 2-byte Spill670; CHECK-NEXT: str z9, [sp, #1, mul vl] // 16-byte Folded Spill671; CHECK-NEXT: str z8, [sp, #2, mul vl] // 16-byte Folded Spill672; CHECK-NEXT: .cfi_escape 0x0f, 0x08, 0x8f, 0x10, 0x92, 0x2e, 0x00, 0x48, 0x1e, 0x22 // sp + 16 + 24 * VG673; CHECK-NEXT: .cfi_offset w29, -16674; CHECK-NEXT: .cfi_escape 0x10, 0x48, 0x09, 0x92, 0x2e, 0x00, 0x11, 0x78, 0x1e, 0x22, 0x40, 0x1c // $d8 @ cfa - 8 * VG - 16675; CHECK-NEXT: .cfi_escape 0x10, 0x49, 0x09, 0x92, 0x2e, 0x00, 0x11, 0x70, 0x1e, 0x22, 0x40, 0x1c // $d9 @ cfa - 16 * VG - 16676; CHECK-NEXT: uunpklo z4.d, z0.s677; CHECK-NEXT: uunpkhi z5.d, z0.s678; CHECK-NEXT: mov w8, #-553648128 // =0xdf000000679; CHECK-NEXT: uunpkhi z7.d, z1.s680; CHECK-NEXT: uunpklo z24.d, z2.s681; CHECK-NEXT: ptrue p0.d682; CHECK-NEXT: uunpklo z6.d, z1.s683; CHECK-NEXT: uunpkhi z2.d, z2.s684; CHECK-NEXT: mov z0.d, #0x8000000000000000685; CHECK-NEXT: mov z1.d, #0x8000000000000000686; CHECK-NEXT: mov z27.d, #0x8000000000000000687; CHECK-NEXT: mov z28.d, #0x8000000000000000688; CHECK-NEXT: movprfx z25, z4689; CHECK-NEXT: frintx z25.s, p0/m, z4.s690; CHECK-NEXT: frintx z5.s, p0/m, z5.s691; CHECK-NEXT: mov z4.s, w8692; CHECK-NEXT: mov w8, #1593835519 // =0x5effffff693; CHECK-NEXT: frintx z7.s, p0/m, z7.s694; CHECK-NEXT: frintx z24.s, p0/m, z24.s695; CHECK-NEXT: movprfx z30, z2696; CHECK-NEXT: frintx z30.s, p0/m, z2.s697; CHECK-NEXT: frintx z6.s, p0/m, z6.s698; CHECK-NEXT: uunpklo z2.d, z3.s699; CHECK-NEXT: mov z29.s, w8700; CHECK-NEXT: mov z26.d, #0x8000000000000000701; CHECK-NEXT: mov z31.d, #0x8000000000000000702; CHECK-NEXT: mov z8.d, #0x8000000000000000703; CHECK-NEXT: mov z9.d, #0x7fffffffffffffff704; CHECK-NEXT: fcmge p5.s, p0/z, z25.s, z4.s705; CHECK-NEXT: fcmge p1.s, p0/z, z5.s, z4.s706; CHECK-NEXT: fcmge p3.s, p0/z, z7.s, z4.s707; CHECK-NEXT: fcmge p4.s, p0/z, z24.s, z4.s708; CHECK-NEXT: fcvtzs z0.d, p5/m, z25.s709; CHECK-NEXT: fcvtzs z1.d, p1/m, z5.s710; CHECK-NEXT: fcvtzs z27.d, p3/m, z7.s711; CHECK-NEXT: fcmge p2.s, p0/z, z6.s, z4.s712; CHECK-NEXT: fcvtzs z28.d, p4/m, z24.s713; CHECK-NEXT: fcmgt p3.s, p0/z, z25.s, z29.s714; CHECK-NEXT: fcmge p4.s, p0/z, z30.s, z4.s715; CHECK-NEXT: fcmuo p1.s, p0/z, z25.s, z25.s716; CHECK-NEXT: movprfx z25, z2717; CHECK-NEXT: frintx z25.s, p0/m, z2.s718; CHECK-NEXT: uunpkhi z2.d, z3.s719; CHECK-NEXT: fcvtzs z26.d, p2/m, z6.s720; CHECK-NEXT: mov z0.d, p3/m, z9.d721; CHECK-NEXT: fcmgt p5.s, p0/z, z5.s, z29.s722; CHECK-NEXT: fcvtzs z31.d, p4/m, z30.s723; CHECK-NEXT: fcmuo p2.s, p0/z, z5.s, z5.s724; CHECK-NEXT: movprfx z5, z2725; CHECK-NEXT: frintx z5.s, p0/m, z2.s726; CHECK-NEXT: mov z0.d, p1/m, #0 // =0x0727; CHECK-NEXT: fcmge p4.s, p0/z, z25.s, z4.s728; CHECK-NEXT: fcmgt p6.s, p0/z, z6.s, z29.s729; CHECK-NEXT: mov z1.d, p5/m, z9.d730; CHECK-NEXT: fcmgt p8.s, p0/z, z7.s, z29.s731; CHECK-NEXT: fcmuo p10.s, p0/z, z7.s, z7.s732; CHECK-NEXT: mov z7.d, #0x8000000000000000733; CHECK-NEXT: fcvtzs z8.d, p4/m, z25.s734; CHECK-NEXT: mov z1.d, p2/m, #0 // =0x0735; CHECK-NEXT: sel z2.d, p6, z9.d, z26.d736; CHECK-NEXT: sel z3.d, p8, z9.d, z27.d737; CHECK-NEXT: fcmge p4.s, p0/z, z5.s, z4.s738; CHECK-NEXT: fcmgt p9.s, p0/z, z24.s, z29.s739; CHECK-NEXT: fcmgt p5.s, p0/z, z30.s, z29.s740; CHECK-NEXT: mov z3.d, p10/m, #0 // =0x0741; CHECK-NEXT: ldr p10, [sp, #1, mul vl] // 2-byte Reload742; CHECK-NEXT: fcmgt p6.s, p0/z, z25.s, z29.s743; CHECK-NEXT: fcvtzs z7.d, p4/m, z5.s744; CHECK-NEXT: fcmgt p4.s, p0/z, z5.s, z29.s745; CHECK-NEXT: sel z4.d, p9, z9.d, z28.d746; CHECK-NEXT: fcmuo p7.s, p0/z, z6.s, z6.s747; CHECK-NEXT: sel z6.d, p6, z9.d, z8.d748; CHECK-NEXT: ldr z8, [sp, #2, mul vl] // 16-byte Folded Reload749; CHECK-NEXT: ldr p6, [sp, #5, mul vl] // 2-byte Reload750; CHECK-NEXT: fcmuo p8.s, p0/z, z30.s, z30.s751; CHECK-NEXT: fcmuo p9.s, p0/z, z25.s, z25.s752; CHECK-NEXT: mov z7.d, p4/m, z9.d753; CHECK-NEXT: ldr p4, [sp, #7, mul vl] // 2-byte Reload754; CHECK-NEXT: mov z2.d, p7/m, #0 // =0x0755; CHECK-NEXT: ldr p7, [sp, #4, mul vl] // 2-byte Reload756; CHECK-NEXT: fcmuo p3.s, p0/z, z24.s, z24.s757; CHECK-NEXT: fcmuo p0.s, p0/z, z5.s, z5.s758; CHECK-NEXT: sel z5.d, p5, z9.d, z31.d759; CHECK-NEXT: ldr z9, [sp, #1, mul vl] // 16-byte Folded Reload760; CHECK-NEXT: ldr p5, [sp, #6, mul vl] // 2-byte Reload761; CHECK-NEXT: mov z6.d, p9/m, #0 // =0x0762; CHECK-NEXT: ldr p9, [sp, #2, mul vl] // 2-byte Reload763; CHECK-NEXT: mov z5.d, p8/m, #0 // =0x0764; CHECK-NEXT: ldr p8, [sp, #3, mul vl] // 2-byte Reload765; CHECK-NEXT: mov z4.d, p3/m, #0 // =0x0766; CHECK-NEXT: mov z7.d, p0/m, #0 // =0x0767; CHECK-NEXT: addvl sp, sp, #3768; CHECK-NEXT: ldr x29, [sp], #16 // 8-byte Folded Reload769; CHECK-NEXT: ret770 %a = call <vscale x 16 x i64> @llvm.llrint.nxv16i64.nxv16f32(<vscale x 16 x float> %x)771 ret <vscale x 16 x i64> %a772}773declare <vscale x 16 x i64> @llvm.llrint.nxv16i64.nxv16f32(<vscale x 16 x float>)774 775define <vscale x 32 x i64> @llrint_v32i64_v32f32(<vscale x 32 x float> %x) {776; CHECK-LABEL: llrint_v32i64_v32f32:777; CHECK: // %bb.0:778; CHECK-NEXT: str x29, [sp, #-16]! // 8-byte Folded Spill779; CHECK-NEXT: addvl sp, sp, #-18780; CHECK-NEXT: str p12, [sp, #7, mul vl] // 2-byte Spill781; CHECK-NEXT: str p11, [sp, #8, mul vl] // 2-byte Spill782; CHECK-NEXT: str p10, [sp, #9, mul vl] // 2-byte Spill783; CHECK-NEXT: str p9, [sp, #10, mul vl] // 2-byte Spill784; CHECK-NEXT: str p8, [sp, #11, mul vl] // 2-byte Spill785; CHECK-NEXT: str p7, [sp, #12, mul vl] // 2-byte Spill786; CHECK-NEXT: str p6, [sp, #13, mul vl] // 2-byte Spill787; CHECK-NEXT: str p5, [sp, #14, mul vl] // 2-byte Spill788; CHECK-NEXT: str p4, [sp, #15, mul vl] // 2-byte Spill789; CHECK-NEXT: str z23, [sp, #2, mul vl] // 16-byte Folded Spill790; CHECK-NEXT: str z22, [sp, #3, mul vl] // 16-byte Folded Spill791; CHECK-NEXT: str z21, [sp, #4, mul vl] // 16-byte Folded Spill792; CHECK-NEXT: str z20, [sp, #5, mul vl] // 16-byte Folded Spill793; CHECK-NEXT: str z19, [sp, #6, mul vl] // 16-byte Folded Spill794; CHECK-NEXT: str z18, [sp, #7, mul vl] // 16-byte Folded Spill795; CHECK-NEXT: str z17, [sp, #8, mul vl] // 16-byte Folded Spill796; CHECK-NEXT: str z16, [sp, #9, mul vl] // 16-byte Folded Spill797; CHECK-NEXT: str z15, [sp, #10, mul vl] // 16-byte Folded Spill798; CHECK-NEXT: str z14, [sp, #11, mul vl] // 16-byte Folded Spill799; CHECK-NEXT: str z13, [sp, #12, mul vl] // 16-byte Folded Spill800; CHECK-NEXT: str z12, [sp, #13, mul vl] // 16-byte Folded Spill801; CHECK-NEXT: str z11, [sp, #14, mul vl] // 16-byte Folded Spill802; CHECK-NEXT: str z10, [sp, #15, mul vl] // 16-byte Folded Spill803; CHECK-NEXT: str z9, [sp, #16, mul vl] // 16-byte Folded Spill804; CHECK-NEXT: str z8, [sp, #17, mul vl] // 16-byte Folded Spill805; CHECK-NEXT: addvl sp, sp, #-1806; CHECK-NEXT: .cfi_escape 0x0f, 0x0a, 0x8f, 0x10, 0x92, 0x2e, 0x00, 0x11, 0x98, 0x01, 0x1e, 0x22 // sp + 16 + 152 * VG807; CHECK-NEXT: .cfi_offset w29, -16808; CHECK-NEXT: .cfi_escape 0x10, 0x48, 0x09, 0x92, 0x2e, 0x00, 0x11, 0x78, 0x1e, 0x22, 0x40, 0x1c // $d8 @ cfa - 8 * VG - 16809; CHECK-NEXT: .cfi_escape 0x10, 0x49, 0x09, 0x92, 0x2e, 0x00, 0x11, 0x70, 0x1e, 0x22, 0x40, 0x1c // $d9 @ cfa - 16 * VG - 16810; CHECK-NEXT: .cfi_escape 0x10, 0x4a, 0x09, 0x92, 0x2e, 0x00, 0x11, 0x68, 0x1e, 0x22, 0x40, 0x1c // $d10 @ cfa - 24 * VG - 16811; CHECK-NEXT: .cfi_escape 0x10, 0x4b, 0x09, 0x92, 0x2e, 0x00, 0x11, 0x60, 0x1e, 0x22, 0x40, 0x1c // $d11 @ cfa - 32 * VG - 16812; CHECK-NEXT: .cfi_escape 0x10, 0x4c, 0x09, 0x92, 0x2e, 0x00, 0x11, 0x58, 0x1e, 0x22, 0x40, 0x1c // $d12 @ cfa - 40 * VG - 16813; CHECK-NEXT: .cfi_escape 0x10, 0x4d, 0x09, 0x92, 0x2e, 0x00, 0x11, 0x50, 0x1e, 0x22, 0x40, 0x1c // $d13 @ cfa - 48 * VG - 16814; CHECK-NEXT: .cfi_escape 0x10, 0x4e, 0x09, 0x92, 0x2e, 0x00, 0x11, 0x48, 0x1e, 0x22, 0x40, 0x1c // $d14 @ cfa - 56 * VG - 16815; CHECK-NEXT: .cfi_escape 0x10, 0x4f, 0x09, 0x92, 0x2e, 0x00, 0x11, 0x40, 0x1e, 0x22, 0x40, 0x1c // $d15 @ cfa - 64 * VG - 16816; CHECK-NEXT: uunpklo z24.d, z0.s817; CHECK-NEXT: uunpklo z26.d, z1.s818; CHECK-NEXT: mov w9, #-553648128 // =0xdf000000819; CHECK-NEXT: uunpklo z28.d, z2.s820; CHECK-NEXT: uunpkhi z30.d, z2.s821; CHECK-NEXT: ptrue p0.d822; CHECK-NEXT: uunpkhi z25.d, z0.s823; CHECK-NEXT: uunpkhi z13.d, z3.s824; CHECK-NEXT: uunpklo z14.d, z4.s825; CHECK-NEXT: uunpkhi z27.d, z1.s826; CHECK-NEXT: uunpklo z9.d, z3.s827; CHECK-NEXT: mov z29.s, w9828; CHECK-NEXT: movprfx z0, z24829; CHECK-NEXT: frintx z0.s, p0/m, z24.s830; CHECK-NEXT: movprfx z24, z26831; CHECK-NEXT: frintx z24.s, p0/m, z26.s832; CHECK-NEXT: mov w9, #1593835519 // =0x5effffff833; CHECK-NEXT: movprfx z10, z28834; CHECK-NEXT: frintx z10.s, p0/m, z28.s835; CHECK-NEXT: frintx z30.s, p0/m, z30.s836; CHECK-NEXT: uunpklo z17.d, z5.s837; CHECK-NEXT: movprfx z1, z25838; CHECK-NEXT: frintx z1.s, p0/m, z25.s839; CHECK-NEXT: movprfx z15, z13840; CHECK-NEXT: frintx z15.s, p0/m, z13.s841; CHECK-NEXT: movprfx z13, z14842; CHECK-NEXT: frintx z13.s, p0/m, z14.s843; CHECK-NEXT: uunpkhi z14.d, z4.s844; CHECK-NEXT: uunpkhi z18.d, z5.s845; CHECK-NEXT: uunpkhi z19.d, z6.s846; CHECK-NEXT: movprfx z25, z27847; CHECK-NEXT: frintx z25.s, p0/m, z27.s848; CHECK-NEXT: mov z27.d, #0x8000000000000000849; CHECK-NEXT: mov z11.d, #0x8000000000000000850; CHECK-NEXT: fcmge p3.s, p0/z, z24.s, z29.s851; CHECK-NEXT: str z0, [sp] // 16-byte Folded Spill852; CHECK-NEXT: mov z12.d, #0x8000000000000000853; CHECK-NEXT: fcmge p5.s, p0/z, z10.s, z29.s854; CHECK-NEXT: frintx z9.s, p0/m, z9.s855; CHECK-NEXT: uunpklo z20.d, z7.s856; CHECK-NEXT: movprfx z5, z14857; CHECK-NEXT: frintx z5.s, p0/m, z14.s858; CHECK-NEXT: movprfx z14, z17859; CHECK-NEXT: frintx z14.s, p0/m, z17.s860; CHECK-NEXT: movprfx z17, z18861; CHECK-NEXT: frintx z17.s, p0/m, z18.s862; CHECK-NEXT: fcmge p6.s, p0/z, z30.s, z29.s863; CHECK-NEXT: movprfx z18, z19864; CHECK-NEXT: frintx z18.s, p0/m, z19.s865; CHECK-NEXT: uunpkhi z7.d, z7.s866; CHECK-NEXT: mov z31.s, w9867; CHECK-NEXT: mov z2.d, #0x8000000000000000868; CHECK-NEXT: mov z26.d, #0x8000000000000000869; CHECK-NEXT: uunpklo z6.d, z6.s870; CHECK-NEXT: mov z28.d, #0x8000000000000000871; CHECK-NEXT: fcvtzs z27.d, p3/m, z24.s872; CHECK-NEXT: fcvtzs z11.d, p5/m, z10.s873; CHECK-NEXT: mov z4.d, #0x8000000000000000874; CHECK-NEXT: mov z16.d, #0x8000000000000000875; CHECK-NEXT: movprfx z22, z7876; CHECK-NEXT: frintx z22.s, p0/m, z7.s877; CHECK-NEXT: fcvtzs z12.d, p6/m, z30.s878; CHECK-NEXT: frintx z20.s, p0/m, z20.s879; CHECK-NEXT: mov z21.d, #0x8000000000000000880; CHECK-NEXT: mov z23.d, #0x8000000000000000881; CHECK-NEXT: mov z8.d, #0x8000000000000000882; CHECK-NEXT: frintx z6.s, p0/m, z6.s883; CHECK-NEXT: mov z3.d, #0x7fffffffffffffff884; CHECK-NEXT: mov z19.d, #0x8000000000000000885; CHECK-NEXT: fcmge p1.s, p0/z, z0.s, z29.s886; CHECK-NEXT: fcmge p2.s, p0/z, z1.s, z29.s887; CHECK-NEXT: fcmge p4.s, p0/z, z25.s, z29.s888; CHECK-NEXT: fcmgt p9.s, p0/z, z10.s, z31.s889; CHECK-NEXT: fcvtzs z2.d, p1/m, z0.s890; CHECK-NEXT: mov z0.d, #0x8000000000000000891; CHECK-NEXT: fcvtzs z26.d, p2/m, z1.s892; CHECK-NEXT: fcvtzs z28.d, p4/m, z25.s893; CHECK-NEXT: mov z11.d, p9/m, z3.d894; CHECK-NEXT: fcmuo p8.s, p0/z, z10.s, z10.s895; CHECK-NEXT: mov z10.d, #0x8000000000000000896; CHECK-NEXT: fcmge p5.s, p0/z, z9.s, z29.s897; CHECK-NEXT: fcmge p3.s, p0/z, z15.s, z29.s898; CHECK-NEXT: fcmge p6.s, p0/z, z13.s, z29.s899; CHECK-NEXT: mov z11.d, p8/m, #0 // =0x0900; CHECK-NEXT: fcvtzs z10.d, p5/m, z9.s901; CHECK-NEXT: fcvtzs z4.d, p3/m, z15.s902; CHECK-NEXT: fcvtzs z16.d, p6/m, z13.s903; CHECK-NEXT: fcmge p1.s, p0/z, z17.s, z29.s904; CHECK-NEXT: fcmge p2.s, p0/z, z18.s, z29.s905; CHECK-NEXT: fcmgt p12.s, p0/z, z30.s, z31.s906; CHECK-NEXT: fcmgt p5.s, p0/z, z15.s, z31.s907; CHECK-NEXT: fcmge p3.s, p0/z, z20.s, z29.s908; CHECK-NEXT: fcvtzs z21.d, p1/m, z17.s909; CHECK-NEXT: fcvtzs z23.d, p2/m, z18.s910; CHECK-NEXT: fcmgt p11.s, p0/z, z13.s, z31.s911; CHECK-NEXT: sel z7.d, p12, z3.d, z12.d912; CHECK-NEXT: mov z4.d, p5/m, z3.d913; CHECK-NEXT: fcmge p4.s, p0/z, z22.s, z29.s914; CHECK-NEXT: fcvtzs z0.d, p3/m, z20.s915; CHECK-NEXT: fcmge p6.s, p0/z, z5.s, z29.s916; CHECK-NEXT: sel z12.d, p11, z3.d, z16.d917; CHECK-NEXT: fcmge p7.s, p0/z, z14.s, z29.s918; CHECK-NEXT: fcmuo p1.s, p0/z, z13.s, z13.s919; CHECK-NEXT: fcvtzs z8.d, p4/m, z22.s920; CHECK-NEXT: fcmge p2.s, p0/z, z6.s, z29.s921; CHECK-NEXT: mov z29.d, #0x8000000000000000922; CHECK-NEXT: fcmuo p10.s, p0/z, z15.s, z15.s923; CHECK-NEXT: mov z15.d, #0x8000000000000000924; CHECK-NEXT: fcvtzs z19.d, p7/m, z14.s925; CHECK-NEXT: mov z12.d, p1/m, #0 // =0x0926; CHECK-NEXT: fcvtzs z29.d, p2/m, z6.s927; CHECK-NEXT: fcmgt p4.s, p0/z, z22.s, z31.s928; CHECK-NEXT: fcvtzs z15.d, p6/m, z5.s929; CHECK-NEXT: mov z4.d, p10/m, #0 // =0x0930; CHECK-NEXT: str z12, [x8, #8, mul vl]931; CHECK-NEXT: fcmgt p5.s, p0/z, z20.s, z31.s932; CHECK-NEXT: fcmgt p3.s, p0/z, z18.s, z31.s933; CHECK-NEXT: str z4, [x8, #7, mul vl]934; CHECK-NEXT: fcmuo p1.s, p0/z, z22.s, z22.s935; CHECK-NEXT: mov z8.d, p4/m, z3.d936; CHECK-NEXT: fcmuo p2.s, p0/z, z20.s, z20.s937; CHECK-NEXT: mov z0.d, p5/m, z3.d938; CHECK-NEXT: fcmuo p6.s, p0/z, z18.s, z18.s939; CHECK-NEXT: fcmgt p4.s, p0/z, z5.s, z31.s940; CHECK-NEXT: mov z8.d, p1/m, #0 // =0x0941; CHECK-NEXT: mov z0.d, p2/m, #0 // =0x0942; CHECK-NEXT: fcmuo p5.s, p0/z, z5.s, z5.s943; CHECK-NEXT: sel z5.d, p3, z3.d, z23.d944; CHECK-NEXT: str z8, [x8, #15, mul vl]945; CHECK-NEXT: fcmgt p3.s, p0/z, z6.s, z31.s946; CHECK-NEXT: str z0, [x8, #14, mul vl]947; CHECK-NEXT: fcmgt p1.s, p0/z, z17.s, z31.s948; CHECK-NEXT: mov z5.d, p6/m, #0 // =0x0949; CHECK-NEXT: fcmgt p2.s, p0/z, z14.s, z31.s950; CHECK-NEXT: fcmuo p6.s, p0/z, z6.s, z6.s951; CHECK-NEXT: sel z6.d, p4, z3.d, z15.d952; CHECK-NEXT: str z5, [x8, #13, mul vl]953; CHECK-NEXT: sel z0.d, p3, z3.d, z29.d954; CHECK-NEXT: fcmuo p4.s, p0/z, z17.s, z17.s955; CHECK-NEXT: sel z5.d, p1, z3.d, z21.d956; CHECK-NEXT: sel z29.d, p2, z3.d, z19.d957; CHECK-NEXT: mov z6.d, p5/m, #0 // =0x0958; CHECK-NEXT: mov z0.d, p6/m, #0 // =0x0959; CHECK-NEXT: fcmuo p3.s, p0/z, z14.s, z14.s960; CHECK-NEXT: mov z5.d, p4/m, #0 // =0x0961; CHECK-NEXT: str z6, [x8, #9, mul vl]962; CHECK-NEXT: fcmgt p1.s, p0/z, z1.s, z31.s963; CHECK-NEXT: str z0, [x8, #12, mul vl]964; CHECK-NEXT: fcmgt p2.s, p0/z, z24.s, z31.s965; CHECK-NEXT: mov z29.d, p3/m, #0 // =0x0966; CHECK-NEXT: str z5, [x8, #11, mul vl]967; CHECK-NEXT: fcmgt p4.s, p0/z, z25.s, z31.s968; CHECK-NEXT: fcmuo p3.s, p0/z, z30.s, z30.s969; CHECK-NEXT: sel z5.d, p1, z3.d, z26.d970; CHECK-NEXT: str z29, [x8, #10, mul vl]971; CHECK-NEXT: sel z26.d, p2, z3.d, z27.d972; CHECK-NEXT: ldr z4, [sp] // 16-byte Folded Reload973; CHECK-NEXT: str z11, [x8, #4, mul vl]974; CHECK-NEXT: fcmgt p6.s, p0/z, z9.s, z31.s975; CHECK-NEXT: sel z6.d, p4, z3.d, z28.d976; CHECK-NEXT: fcmuo p5.s, p0/z, z9.s, z9.s977; CHECK-NEXT: mov z7.d, p3/m, #0 // =0x0978; CHECK-NEXT: fcmgt p1.s, p0/z, z4.s, z31.s979; CHECK-NEXT: fcmuo p2.s, p0/z, z25.s, z25.s980; CHECK-NEXT: fcmuo p3.s, p0/z, z24.s, z24.s981; CHECK-NEXT: sel z0.d, p6, z3.d, z10.d982; CHECK-NEXT: str z7, [x8, #5, mul vl]983; CHECK-NEXT: fcmuo p4.s, p0/z, z1.s, z1.s984; CHECK-NEXT: fcmuo p0.s, p0/z, z4.s, z4.s985; CHECK-NEXT: sel z1.d, p1, z3.d, z2.d986; CHECK-NEXT: mov z0.d, p5/m, #0 // =0x0987; CHECK-NEXT: mov z6.d, p2/m, #0 // =0x0988; CHECK-NEXT: mov z26.d, p3/m, #0 // =0x0989; CHECK-NEXT: mov z5.d, p4/m, #0 // =0x0990; CHECK-NEXT: mov z1.d, p0/m, #0 // =0x0991; CHECK-NEXT: str z0, [x8, #6, mul vl]992; CHECK-NEXT: str z6, [x8, #3, mul vl]993; CHECK-NEXT: str z26, [x8, #2, mul vl]994; CHECK-NEXT: str z5, [x8, #1, mul vl]995; CHECK-NEXT: str z1, [x8]996; CHECK-NEXT: addvl sp, sp, #1997; CHECK-NEXT: ldr z23, [sp, #2, mul vl] // 16-byte Folded Reload998; CHECK-NEXT: ldr z22, [sp, #3, mul vl] // 16-byte Folded Reload999; CHECK-NEXT: ldr z21, [sp, #4, mul vl] // 16-byte Folded Reload1000; CHECK-NEXT: ldr z20, [sp, #5, mul vl] // 16-byte Folded Reload1001; CHECK-NEXT: ldr z19, [sp, #6, mul vl] // 16-byte Folded Reload1002; CHECK-NEXT: ldr z18, [sp, #7, mul vl] // 16-byte Folded Reload1003; CHECK-NEXT: ldr z17, [sp, #8, mul vl] // 16-byte Folded Reload1004; CHECK-NEXT: ldr z16, [sp, #9, mul vl] // 16-byte Folded Reload1005; CHECK-NEXT: ldr z15, [sp, #10, mul vl] // 16-byte Folded Reload1006; CHECK-NEXT: ldr z14, [sp, #11, mul vl] // 16-byte Folded Reload1007; CHECK-NEXT: ldr z13, [sp, #12, mul vl] // 16-byte Folded Reload1008; CHECK-NEXT: ldr z12, [sp, #13, mul vl] // 16-byte Folded Reload1009; CHECK-NEXT: ldr z11, [sp, #14, mul vl] // 16-byte Folded Reload1010; CHECK-NEXT: ldr z10, [sp, #15, mul vl] // 16-byte Folded Reload1011; CHECK-NEXT: ldr z9, [sp, #16, mul vl] // 16-byte Folded Reload1012; CHECK-NEXT: ldr z8, [sp, #17, mul vl] // 16-byte Folded Reload1013; CHECK-NEXT: ldr p12, [sp, #7, mul vl] // 2-byte Reload1014; CHECK-NEXT: ldr p11, [sp, #8, mul vl] // 2-byte Reload1015; CHECK-NEXT: ldr p10, [sp, #9, mul vl] // 2-byte Reload1016; CHECK-NEXT: ldr p9, [sp, #10, mul vl] // 2-byte Reload1017; CHECK-NEXT: ldr p8, [sp, #11, mul vl] // 2-byte Reload1018; CHECK-NEXT: ldr p7, [sp, #12, mul vl] // 2-byte Reload1019; CHECK-NEXT: ldr p6, [sp, #13, mul vl] // 2-byte Reload1020; CHECK-NEXT: ldr p5, [sp, #14, mul vl] // 2-byte Reload1021; CHECK-NEXT: ldr p4, [sp, #15, mul vl] // 2-byte Reload1022; CHECK-NEXT: addvl sp, sp, #181023; CHECK-NEXT: ldr x29, [sp], #16 // 8-byte Folded Reload1024; CHECK-NEXT: ret1025 %a = call <vscale x 32 x i64> @llvm.llrint.nxv32i64.nxv32f32(<vscale x 32 x float> %x)1026 ret <vscale x 32 x i64> %a1027}1028declare <vscale x 32 x i64> @llvm.llrint.nxv32i64.nxv32f32(<vscale x 32 x float>)1029 1030define <vscale x 1 x i64> @llrint_v1i64_v1f64(<vscale x 1 x double> %x) {1031; CHECK-LABEL: llrint_v1i64_v1f64:1032; CHECK: // %bb.0:1033; CHECK-NEXT: ptrue p0.d1034; CHECK-NEXT: mov x8, #-4332462841530417152 // =0xc3e00000000000001035; CHECK-NEXT: mov z2.d, #0x80000000000000001036; CHECK-NEXT: mov z1.d, x81037; CHECK-NEXT: mov x8, #4890909195324358655 // =0x43dfffffffffffff1038; CHECK-NEXT: frintx z0.d, p0/m, z0.d1039; CHECK-NEXT: fcmge p1.d, p0/z, z0.d, z1.d1040; CHECK-NEXT: mov z1.d, x81041; CHECK-NEXT: fcvtzs z2.d, p1/m, z0.d1042; CHECK-NEXT: fcmgt p1.d, p0/z, z0.d, z1.d1043; CHECK-NEXT: mov z1.d, #0x7fffffffffffffff1044; CHECK-NEXT: fcmuo p0.d, p0/z, z0.d, z0.d1045; CHECK-NEXT: sel z0.d, p1, z1.d, z2.d1046; CHECK-NEXT: mov z0.d, p0/m, #0 // =0x01047; CHECK-NEXT: ret1048 %a = call <vscale x 1 x i64> @llvm.llrint.nxv1i64.nxv1f64(<vscale x 1 x double> %x)1049 ret <vscale x 1 x i64> %a1050}1051declare <vscale x 1 x i64> @llvm.llrint.nxv1i64.nxv1f64(<vscale x 1 x double>)1052 1053define <vscale x 2 x i64> @llrint_v2i64_v2f64(<vscale x 2 x double> %x) {1054; CHECK-LABEL: llrint_v2i64_v2f64:1055; CHECK: // %bb.0:1056; CHECK-NEXT: ptrue p0.d1057; CHECK-NEXT: mov x8, #-4332462841530417152 // =0xc3e00000000000001058; CHECK-NEXT: mov z2.d, #0x80000000000000001059; CHECK-NEXT: mov z1.d, x81060; CHECK-NEXT: mov x8, #4890909195324358655 // =0x43dfffffffffffff1061; CHECK-NEXT: frintx z0.d, p0/m, z0.d1062; CHECK-NEXT: fcmge p1.d, p0/z, z0.d, z1.d1063; CHECK-NEXT: mov z1.d, x81064; CHECK-NEXT: fcvtzs z2.d, p1/m, z0.d1065; CHECK-NEXT: fcmgt p1.d, p0/z, z0.d, z1.d1066; CHECK-NEXT: mov z1.d, #0x7fffffffffffffff1067; CHECK-NEXT: fcmuo p0.d, p0/z, z0.d, z0.d1068; CHECK-NEXT: sel z0.d, p1, z1.d, z2.d1069; CHECK-NEXT: mov z0.d, p0/m, #0 // =0x01070; CHECK-NEXT: ret1071 %a = call <vscale x 2 x i64> @llvm.llrint.nxv2i64.nxv2f64(<vscale x 2 x double> %x)1072 ret <vscale x 2 x i64> %a1073}1074declare <vscale x 2 x i64> @llvm.llrint.nxv2i64.nxv2f64(<vscale x 2 x double>)1075 1076define <vscale x 4 x i64> @llrint_v4i64_v4f64(<vscale x 4 x double> %x) {1077; CHECK-LABEL: llrint_v4i64_v4f64:1078; CHECK: // %bb.0:1079; CHECK-NEXT: ptrue p0.d1080; CHECK-NEXT: mov x8, #-4332462841530417152 // =0xc3e00000000000001081; CHECK-NEXT: mov z3.d, #0x80000000000000001082; CHECK-NEXT: mov z2.d, x81083; CHECK-NEXT: mov z4.d, #0x80000000000000001084; CHECK-NEXT: mov x8, #4890909195324358655 // =0x43dfffffffffffff1085; CHECK-NEXT: frintx z0.d, p0/m, z0.d1086; CHECK-NEXT: frintx z1.d, p0/m, z1.d1087; CHECK-NEXT: mov z5.d, #0x7fffffffffffffff1088; CHECK-NEXT: fcmge p1.d, p0/z, z0.d, z2.d1089; CHECK-NEXT: fcmge p2.d, p0/z, z1.d, z2.d1090; CHECK-NEXT: mov z2.d, x81091; CHECK-NEXT: fcmuo p3.d, p0/z, z0.d, z0.d1092; CHECK-NEXT: fcvtzs z4.d, p1/m, z0.d1093; CHECK-NEXT: fcmgt p1.d, p0/z, z0.d, z2.d1094; CHECK-NEXT: fcvtzs z3.d, p2/m, z1.d1095; CHECK-NEXT: fcmgt p2.d, p0/z, z1.d, z2.d1096; CHECK-NEXT: fcmuo p0.d, p0/z, z1.d, z1.d1097; CHECK-NEXT: sel z0.d, p1, z5.d, z4.d1098; CHECK-NEXT: sel z1.d, p2, z5.d, z3.d1099; CHECK-NEXT: mov z0.d, p3/m, #0 // =0x01100; CHECK-NEXT: mov z1.d, p0/m, #0 // =0x01101; CHECK-NEXT: ret1102 %a = call <vscale x 4 x i64> @llvm.llrint.nxv4i64.nxv4f64(<vscale x 4 x double> %x)1103 ret <vscale x 4 x i64> %a1104}1105declare <vscale x 4 x i64> @llvm.llrint.nxv4i64.nxv4f64(<vscale x 4 x double>)1106 1107define <vscale x 8 x i64> @llrint_v8i64_v8f64(<vscale x 8 x double> %x) {1108; CHECK-LABEL: llrint_v8i64_v8f64:1109; CHECK: // %bb.0:1110; CHECK-NEXT: str x29, [sp, #-16]! // 8-byte Folded Spill1111; CHECK-NEXT: addvl sp, sp, #-11112; CHECK-NEXT: str p6, [sp, #5, mul vl] // 2-byte Spill1113; CHECK-NEXT: str p5, [sp, #6, mul vl] // 2-byte Spill1114; CHECK-NEXT: str p4, [sp, #7, mul vl] // 2-byte Spill1115; CHECK-NEXT: .cfi_escape 0x0f, 0x08, 0x8f, 0x10, 0x92, 0x2e, 0x00, 0x38, 0x1e, 0x22 // sp + 16 + 8 * VG1116; CHECK-NEXT: .cfi_offset w29, -161117; CHECK-NEXT: ptrue p0.d1118; CHECK-NEXT: mov x8, #-4332462841530417152 // =0xc3e00000000000001119; CHECK-NEXT: mov z4.d, #0x80000000000000001120; CHECK-NEXT: mov z5.d, x81121; CHECK-NEXT: mov x8, #4890909195324358655 // =0x43dfffffffffffff1122; CHECK-NEXT: mov z6.d, #0x80000000000000001123; CHECK-NEXT: frintx z0.d, p0/m, z0.d1124; CHECK-NEXT: frintx z1.d, p0/m, z1.d1125; CHECK-NEXT: frintx z2.d, p0/m, z2.d1126; CHECK-NEXT: mov z24.d, x81127; CHECK-NEXT: frintx z3.d, p0/m, z3.d1128; CHECK-NEXT: mov z7.d, #0x80000000000000001129; CHECK-NEXT: mov z25.d, #0x7fffffffffffffff1130; CHECK-NEXT: fcmge p1.d, p0/z, z0.d, z5.d1131; CHECK-NEXT: fcmge p2.d, p0/z, z1.d, z5.d1132; CHECK-NEXT: fcmge p3.d, p0/z, z2.d, z5.d1133; CHECK-NEXT: fcmgt p4.d, p0/z, z0.d, z24.d1134; CHECK-NEXT: fcvtzs z4.d, p1/m, z0.d1135; CHECK-NEXT: fcmge p1.d, p0/z, z3.d, z5.d1136; CHECK-NEXT: mov z5.d, #0x80000000000000001137; CHECK-NEXT: fcvtzs z6.d, p2/m, z1.d1138; CHECK-NEXT: fcvtzs z7.d, p3/m, z2.d1139; CHECK-NEXT: fcmuo p2.d, p0/z, z0.d, z0.d1140; CHECK-NEXT: fcmgt p3.d, p0/z, z1.d, z24.d1141; CHECK-NEXT: sel z0.d, p4, z25.d, z4.d1142; CHECK-NEXT: fcmgt p4.d, p0/z, z2.d, z24.d1143; CHECK-NEXT: fcvtzs z5.d, p1/m, z3.d1144; CHECK-NEXT: fcmgt p1.d, p0/z, z3.d, z24.d1145; CHECK-NEXT: fcmuo p5.d, p0/z, z1.d, z1.d1146; CHECK-NEXT: mov z0.d, p2/m, #0 // =0x01147; CHECK-NEXT: sel z1.d, p3, z25.d, z6.d1148; CHECK-NEXT: fcmuo p6.d, p0/z, z2.d, z2.d1149; CHECK-NEXT: sel z2.d, p4, z25.d, z7.d1150; CHECK-NEXT: ldr p4, [sp, #7, mul vl] // 2-byte Reload1151; CHECK-NEXT: fcmuo p0.d, p0/z, z3.d, z3.d1152; CHECK-NEXT: sel z3.d, p1, z25.d, z5.d1153; CHECK-NEXT: mov z1.d, p5/m, #0 // =0x01154; CHECK-NEXT: ldr p5, [sp, #6, mul vl] // 2-byte Reload1155; CHECK-NEXT: mov z2.d, p6/m, #0 // =0x01156; CHECK-NEXT: ldr p6, [sp, #5, mul vl] // 2-byte Reload1157; CHECK-NEXT: mov z3.d, p0/m, #0 // =0x01158; CHECK-NEXT: addvl sp, sp, #11159; CHECK-NEXT: ldr x29, [sp], #16 // 8-byte Folded Reload1160; CHECK-NEXT: ret1161 %a = call <vscale x 8 x i64> @llvm.llrint.nxv8i64.nxv8f64(<vscale x 8 x double> %x)1162 ret <vscale x 8 x i64> %a1163}1164declare <vscale x 8 x i64> @llvm.llrint.nxv8i64.nxv8f64(<vscale x 8 x double>)1165 1166define <vscale x 16 x i64> @llrint_v16f64(<vscale x 16 x double> %x) {1167; CHECK-LABEL: llrint_v16f64:1168; CHECK: // %bb.0:1169; CHECK-NEXT: str x29, [sp, #-16]! // 8-byte Folded Spill1170; CHECK-NEXT: addvl sp, sp, #-31171; CHECK-NEXT: str p10, [sp, #1, mul vl] // 2-byte Spill1172; CHECK-NEXT: str p9, [sp, #2, mul vl] // 2-byte Spill1173; CHECK-NEXT: str p8, [sp, #3, mul vl] // 2-byte Spill1174; CHECK-NEXT: str p7, [sp, #4, mul vl] // 2-byte Spill1175; CHECK-NEXT: str p6, [sp, #5, mul vl] // 2-byte Spill1176; CHECK-NEXT: str p5, [sp, #6, mul vl] // 2-byte Spill1177; CHECK-NEXT: str p4, [sp, #7, mul vl] // 2-byte Spill1178; CHECK-NEXT: str z9, [sp, #1, mul vl] // 16-byte Folded Spill1179; CHECK-NEXT: str z8, [sp, #2, mul vl] // 16-byte Folded Spill1180; CHECK-NEXT: .cfi_escape 0x0f, 0x08, 0x8f, 0x10, 0x92, 0x2e, 0x00, 0x48, 0x1e, 0x22 // sp + 16 + 24 * VG1181; CHECK-NEXT: .cfi_offset w29, -161182; CHECK-NEXT: .cfi_escape 0x10, 0x48, 0x09, 0x92, 0x2e, 0x00, 0x11, 0x78, 0x1e, 0x22, 0x40, 0x1c // $d8 @ cfa - 8 * VG - 161183; CHECK-NEXT: .cfi_escape 0x10, 0x49, 0x09, 0x92, 0x2e, 0x00, 0x11, 0x70, 0x1e, 0x22, 0x40, 0x1c // $d9 @ cfa - 16 * VG - 161184; CHECK-NEXT: ptrue p0.d1185; CHECK-NEXT: mov x8, #-4332462841530417152 // =0xc3e00000000000001186; CHECK-NEXT: mov z25.d, #0x80000000000000001187; CHECK-NEXT: mov z28.d, #0x80000000000000001188; CHECK-NEXT: mov z26.d, #0x80000000000000001189; CHECK-NEXT: mov z27.d, #0x80000000000000001190; CHECK-NEXT: movprfx z24, z01191; CHECK-NEXT: frintx z24.d, p0/m, z0.d1192; CHECK-NEXT: frintx z3.d, p0/m, z3.d1193; CHECK-NEXT: mov z0.d, x81194; CHECK-NEXT: frintx z1.d, p0/m, z1.d1195; CHECK-NEXT: mov x8, #4890909195324358655 // =0x43dfffffffffffff1196; CHECK-NEXT: frintx z2.d, p0/m, z2.d1197; CHECK-NEXT: frintx z4.d, p0/m, z4.d1198; CHECK-NEXT: frintx z6.d, p0/m, z6.d1199; CHECK-NEXT: mov z30.d, x81200; CHECK-NEXT: mov z29.d, #0x80000000000000001201; CHECK-NEXT: frintx z5.d, p0/m, z5.d1202; CHECK-NEXT: frintx z7.d, p0/m, z7.d1203; CHECK-NEXT: mov z31.d, #0x80000000000000001204; CHECK-NEXT: mov z8.d, #0x7fffffffffffffff1205; CHECK-NEXT: mov z9.d, #0x80000000000000001206; CHECK-NEXT: fcmge p1.d, p0/z, z24.d, z0.d1207; CHECK-NEXT: fcmge p4.d, p0/z, z3.d, z0.d1208; CHECK-NEXT: fcmge p2.d, p0/z, z1.d, z0.d1209; CHECK-NEXT: fcmge p3.d, p0/z, z2.d, z0.d1210; CHECK-NEXT: fcvtzs z25.d, p1/m, z24.d1211; CHECK-NEXT: fcvtzs z28.d, p4/m, z3.d1212; CHECK-NEXT: fcvtzs z26.d, p2/m, z1.d1213; CHECK-NEXT: fcmge p5.d, p0/z, z4.d, z0.d1214; CHECK-NEXT: fcvtzs z27.d, p3/m, z2.d1215; CHECK-NEXT: fcmgt p4.d, p0/z, z24.d, z30.d1216; CHECK-NEXT: fcmuo p1.d, p0/z, z24.d, z24.d1217; CHECK-NEXT: mov z24.d, #0x80000000000000001218; CHECK-NEXT: fcmge p7.d, p0/z, z6.d, z0.d1219; CHECK-NEXT: fcvtzs z29.d, p5/m, z4.d1220; CHECK-NEXT: fcmge p3.d, p0/z, z5.d, z0.d1221; CHECK-NEXT: fcmgt p5.d, p0/z, z1.d, z30.d1222; CHECK-NEXT: fcvtzs z24.d, p7/m, z6.d1223; CHECK-NEXT: fcmgt p6.d, p0/z, z2.d, z30.d1224; CHECK-NEXT: fcmge p7.d, p0/z, z7.d, z0.d1225; CHECK-NEXT: fcvtzs z31.d, p3/m, z5.d1226; CHECK-NEXT: sel z0.d, p4, z8.d, z25.d1227; CHECK-NEXT: fcmgt p8.d, p0/z, z3.d, z30.d1228; CHECK-NEXT: fcmgt p9.d, p0/z, z4.d, z30.d1229; CHECK-NEXT: mov z0.d, p1/m, #0 // =0x01230; CHECK-NEXT: fcvtzs z9.d, p7/m, z7.d1231; CHECK-NEXT: fcmuo p2.d, p0/z, z1.d, z1.d1232; CHECK-NEXT: sel z1.d, p5, z8.d, z26.d1233; CHECK-NEXT: fcmuo p3.d, p0/z, z2.d, z2.d1234; CHECK-NEXT: sel z2.d, p6, z8.d, z27.d1235; CHECK-NEXT: fcmgt p5.d, p0/z, z5.d, z30.d1236; CHECK-NEXT: fcmgt p6.d, p0/z, z6.d, z30.d1237; CHECK-NEXT: mov z1.d, p2/m, #0 // =0x01238; CHECK-NEXT: mov z2.d, p3/m, #0 // =0x01239; CHECK-NEXT: fcmgt p7.d, p0/z, z7.d, z30.d1240; CHECK-NEXT: fcmuo p10.d, p0/z, z3.d, z3.d1241; CHECK-NEXT: sel z3.d, p8, z8.d, z28.d1242; CHECK-NEXT: fcmuo p4.d, p0/z, z4.d, z4.d1243; CHECK-NEXT: sel z4.d, p9, z8.d, z29.d1244; CHECK-NEXT: fcmuo p8.d, p0/z, z5.d, z5.d1245; CHECK-NEXT: sel z5.d, p5, z8.d, z31.d1246; CHECK-NEXT: ldr p5, [sp, #6, mul vl] // 2-byte Reload1247; CHECK-NEXT: fcmuo p9.d, p0/z, z6.d, z6.d1248; CHECK-NEXT: sel z6.d, p6, z8.d, z24.d1249; CHECK-NEXT: ldr p6, [sp, #5, mul vl] // 2-byte Reload1250; CHECK-NEXT: mov z3.d, p10/m, #0 // =0x01251; CHECK-NEXT: ldr p10, [sp, #1, mul vl] // 2-byte Reload1252; CHECK-NEXT: mov z4.d, p4/m, #0 // =0x01253; CHECK-NEXT: ldr p4, [sp, #7, mul vl] // 2-byte Reload1254; CHECK-NEXT: mov z5.d, p8/m, #0 // =0x01255; CHECK-NEXT: ldr p8, [sp, #3, mul vl] // 2-byte Reload1256; CHECK-NEXT: mov z6.d, p9/m, #0 // =0x01257; CHECK-NEXT: ldr p9, [sp, #2, mul vl] // 2-byte Reload1258; CHECK-NEXT: fcmuo p0.d, p0/z, z7.d, z7.d1259; CHECK-NEXT: sel z7.d, p7, z8.d, z9.d1260; CHECK-NEXT: ldr z9, [sp, #1, mul vl] // 16-byte Folded Reload1261; CHECK-NEXT: ldr z8, [sp, #2, mul vl] // 16-byte Folded Reload1262; CHECK-NEXT: ldr p7, [sp, #4, mul vl] // 2-byte Reload1263; CHECK-NEXT: mov z7.d, p0/m, #0 // =0x01264; CHECK-NEXT: addvl sp, sp, #31265; CHECK-NEXT: ldr x29, [sp], #16 // 8-byte Folded Reload1266; CHECK-NEXT: ret1267 %a = call <vscale x 16 x i64> @llvm.llrint.nxv16i64.nxv16f64(<vscale x 16 x double> %x)1268 ret <vscale x 16 x i64> %a1269}1270declare <vscale x 16 x i64> @llvm.llrint.nxv16i64.nxv16f64(<vscale x 16 x double>)1271 1272define <vscale x 32 x i64> @llrint_v32f64(<vscale x 32 x double> %x) {1273; CHECK-LABEL: llrint_v32f64:1274; CHECK: // %bb.0:1275; CHECK-NEXT: str x29, [sp, #-16]! // 8-byte Folded Spill1276; CHECK-NEXT: addvl sp, sp, #-181277; CHECK-NEXT: str p12, [sp, #7, mul vl] // 2-byte Spill1278; CHECK-NEXT: str p11, [sp, #8, mul vl] // 2-byte Spill1279; CHECK-NEXT: str p10, [sp, #9, mul vl] // 2-byte Spill1280; CHECK-NEXT: str p9, [sp, #10, mul vl] // 2-byte Spill1281; CHECK-NEXT: str p8, [sp, #11, mul vl] // 2-byte Spill1282; CHECK-NEXT: str p7, [sp, #12, mul vl] // 2-byte Spill1283; CHECK-NEXT: str p6, [sp, #13, mul vl] // 2-byte Spill1284; CHECK-NEXT: str p5, [sp, #14, mul vl] // 2-byte Spill1285; CHECK-NEXT: str p4, [sp, #15, mul vl] // 2-byte Spill1286; CHECK-NEXT: str z23, [sp, #2, mul vl] // 16-byte Folded Spill1287; CHECK-NEXT: str z22, [sp, #3, mul vl] // 16-byte Folded Spill1288; CHECK-NEXT: str z21, [sp, #4, mul vl] // 16-byte Folded Spill1289; CHECK-NEXT: str z20, [sp, #5, mul vl] // 16-byte Folded Spill1290; CHECK-NEXT: str z19, [sp, #6, mul vl] // 16-byte Folded Spill1291; CHECK-NEXT: str z18, [sp, #7, mul vl] // 16-byte Folded Spill1292; CHECK-NEXT: str z17, [sp, #8, mul vl] // 16-byte Folded Spill1293; CHECK-NEXT: str z16, [sp, #9, mul vl] // 16-byte Folded Spill1294; CHECK-NEXT: str z15, [sp, #10, mul vl] // 16-byte Folded Spill1295; CHECK-NEXT: str z14, [sp, #11, mul vl] // 16-byte Folded Spill1296; CHECK-NEXT: str z13, [sp, #12, mul vl] // 16-byte Folded Spill1297; CHECK-NEXT: str z12, [sp, #13, mul vl] // 16-byte Folded Spill1298; CHECK-NEXT: str z11, [sp, #14, mul vl] // 16-byte Folded Spill1299; CHECK-NEXT: str z10, [sp, #15, mul vl] // 16-byte Folded Spill1300; CHECK-NEXT: str z9, [sp, #16, mul vl] // 16-byte Folded Spill1301; CHECK-NEXT: str z8, [sp, #17, mul vl] // 16-byte Folded Spill1302; CHECK-NEXT: addvl sp, sp, #-11303; CHECK-NEXT: .cfi_escape 0x0f, 0x0a, 0x8f, 0x10, 0x92, 0x2e, 0x00, 0x11, 0x98, 0x01, 0x1e, 0x22 // sp + 16 + 152 * VG1304; CHECK-NEXT: .cfi_offset w29, -161305; CHECK-NEXT: .cfi_escape 0x10, 0x48, 0x09, 0x92, 0x2e, 0x00, 0x11, 0x78, 0x1e, 0x22, 0x40, 0x1c // $d8 @ cfa - 8 * VG - 161306; CHECK-NEXT: .cfi_escape 0x10, 0x49, 0x09, 0x92, 0x2e, 0x00, 0x11, 0x70, 0x1e, 0x22, 0x40, 0x1c // $d9 @ cfa - 16 * VG - 161307; CHECK-NEXT: .cfi_escape 0x10, 0x4a, 0x09, 0x92, 0x2e, 0x00, 0x11, 0x68, 0x1e, 0x22, 0x40, 0x1c // $d10 @ cfa - 24 * VG - 161308; CHECK-NEXT: .cfi_escape 0x10, 0x4b, 0x09, 0x92, 0x2e, 0x00, 0x11, 0x60, 0x1e, 0x22, 0x40, 0x1c // $d11 @ cfa - 32 * VG - 161309; CHECK-NEXT: .cfi_escape 0x10, 0x4c, 0x09, 0x92, 0x2e, 0x00, 0x11, 0x58, 0x1e, 0x22, 0x40, 0x1c // $d12 @ cfa - 40 * VG - 161310; CHECK-NEXT: .cfi_escape 0x10, 0x4d, 0x09, 0x92, 0x2e, 0x00, 0x11, 0x50, 0x1e, 0x22, 0x40, 0x1c // $d13 @ cfa - 48 * VG - 161311; CHECK-NEXT: .cfi_escape 0x10, 0x4e, 0x09, 0x92, 0x2e, 0x00, 0x11, 0x48, 0x1e, 0x22, 0x40, 0x1c // $d14 @ cfa - 56 * VG - 161312; CHECK-NEXT: .cfi_escape 0x10, 0x4f, 0x09, 0x92, 0x2e, 0x00, 0x11, 0x40, 0x1e, 0x22, 0x40, 0x1c // $d15 @ cfa - 64 * VG - 161313; CHECK-NEXT: ldr z0, [x0]1314; CHECK-NEXT: ptrue p0.d1315; CHECK-NEXT: mov x9, #-4332462841530417152 // =0xc3e00000000000001316; CHECK-NEXT: mov z25.d, x91317; CHECK-NEXT: ldr z7, [x0, #3, mul vl]1318; CHECK-NEXT: ldr z27, [x0, #4, mul vl]1319; CHECK-NEXT: ldr z4, [x0, #2, mul vl]1320; CHECK-NEXT: ldr z2, [x0, #1, mul vl]1321; CHECK-NEXT: ldr z9, [x0, #15, mul vl]1322; CHECK-NEXT: movprfx z5, z01323; CHECK-NEXT: frintx z5.d, p0/m, z0.d1324; CHECK-NEXT: mov z0.d, #0x80000000000000001325; CHECK-NEXT: ldr z10, [x0, #14, mul vl]1326; CHECK-NEXT: frintx z7.d, p0/m, z7.d1327; CHECK-NEXT: movprfx z14, z271328; CHECK-NEXT: frintx z14.d, p0/m, z27.d1329; CHECK-NEXT: ldr z11, [x0, #13, mul vl]1330; CHECK-NEXT: frintx z4.d, p0/m, z4.d1331; CHECK-NEXT: ldr z8, [x0, #12, mul vl]1332; CHECK-NEXT: ldr z27, [x0, #5, mul vl]1333; CHECK-NEXT: ldr z18, [x0, #11, mul vl]1334; CHECK-NEXT: ldr z13, [x0, #10, mul vl]1335; CHECK-NEXT: ldr z29, [x0, #6, mul vl]1336; CHECK-NEXT: fcmge p1.d, p0/z, z5.d, z25.d1337; CHECK-NEXT: mov x9, #4890909195324358655 // =0x43dfffffffffffff1338; CHECK-NEXT: mov z24.d, #0x80000000000000001339; CHECK-NEXT: mov z30.d, #0x80000000000000001340; CHECK-NEXT: movprfx z28, z271341; CHECK-NEXT: frintx z28.d, p0/m, z27.d1342; CHECK-NEXT: mov z1.d, x91343; CHECK-NEXT: fcmge p2.d, p0/z, z7.d, z25.d1344; CHECK-NEXT: frintx z29.d, p0/m, z29.d1345; CHECK-NEXT: movprfx z3, z21346; CHECK-NEXT: frintx z3.d, p0/m, z2.d1347; CHECK-NEXT: fcmge p3.d, p0/z, z14.d, z25.d1348; CHECK-NEXT: mov z6.d, #0x80000000000000001349; CHECK-NEXT: mov z12.d, #0x80000000000000001350; CHECK-NEXT: fcvtzs z0.d, p1/m, z5.d1351; CHECK-NEXT: frintx z18.d, p0/m, z18.d1352; CHECK-NEXT: mov z2.d, #0x80000000000000001353; CHECK-NEXT: fcmge p5.d, p0/z, z4.d, z25.d1354; CHECK-NEXT: mov z16.d, #0x80000000000000001355; CHECK-NEXT: mov z17.d, #0x80000000000000001356; CHECK-NEXT: fcvtzs z24.d, p2/m, z7.d1357; CHECK-NEXT: frintx z10.d, p0/m, z10.d1358; CHECK-NEXT: frintx z9.d, p0/m, z9.d1359; CHECK-NEXT: fcvtzs z30.d, p3/m, z14.d1360; CHECK-NEXT: frintx z13.d, p0/m, z13.d1361; CHECK-NEXT: mov z21.d, #0x80000000000000001362; CHECK-NEXT: str z0, [sp] // 16-byte Folded Spill1363; CHECK-NEXT: mov z22.d, #0x80000000000000001364; CHECK-NEXT: movprfx z0, z81365; CHECK-NEXT: frintx z0.d, p0/m, z8.d1366; CHECK-NEXT: ldr z31, [x0, #7, mul vl]1367; CHECK-NEXT: ldr z15, [x0, #8, mul vl]1368; CHECK-NEXT: ldr z19, [x0, #9, mul vl]1369; CHECK-NEXT: fcmge p1.d, p0/z, z28.d, z25.d1370; CHECK-NEXT: fcvtzs z6.d, p5/m, z4.d1371; CHECK-NEXT: mov z26.d, #0x80000000000000001372; CHECK-NEXT: fcmgt p10.d, p0/z, z14.d, z1.d1373; CHECK-NEXT: mov z27.d, #0x7fffffffffffffff1374; CHECK-NEXT: mov z23.d, #0x80000000000000001375; CHECK-NEXT: movprfx z20, z311376; CHECK-NEXT: frintx z20.d, p0/m, z31.d1377; CHECK-NEXT: frintx z15.d, p0/m, z15.d1378; CHECK-NEXT: mov z31.d, #0x80000000000000001379; CHECK-NEXT: fcmge p2.d, p0/z, z29.d, z25.d1380; CHECK-NEXT: fcmuo p8.d, p0/z, z14.d, z14.d1381; CHECK-NEXT: movprfx z14, z191382; CHECK-NEXT: frintx z14.d, p0/m, z19.d1383; CHECK-NEXT: movprfx z19, z111384; CHECK-NEXT: frintx z19.d, p0/m, z11.d1385; CHECK-NEXT: fcmge p4.d, p0/z, z3.d, z25.d1386; CHECK-NEXT: fcvtzs z12.d, p1/m, z28.d1387; CHECK-NEXT: mov z11.d, #0x80000000000000001388; CHECK-NEXT: mov z30.d, p10/m, z27.d1389; CHECK-NEXT: fcvtzs z31.d, p2/m, z29.d1390; CHECK-NEXT: fcmge p5.d, p0/z, z20.d, z25.d1391; CHECK-NEXT: fcmge p6.d, p0/z, z15.d, z25.d1392; CHECK-NEXT: fcvtzs z2.d, p4/m, z3.d1393; CHECK-NEXT: mov z30.d, p8/m, #0 // =0x01394; CHECK-NEXT: fcmge p1.d, p0/z, z18.d, z25.d1395; CHECK-NEXT: fcmge p2.d, p0/z, z19.d, z25.d1396; CHECK-NEXT: fcvtzs z16.d, p5/m, z20.d1397; CHECK-NEXT: fcvtzs z17.d, p6/m, z15.d1398; CHECK-NEXT: fcmgt p12.d, p0/z, z28.d, z1.d1399; CHECK-NEXT: fcvtzs z21.d, p1/m, z18.d1400; CHECK-NEXT: fcvtzs z22.d, p2/m, z19.d1401; CHECK-NEXT: fcmgt p5.d, p0/z, z20.d, z1.d1402; CHECK-NEXT: fcmge p3.d, p0/z, z10.d, z25.d1403; CHECK-NEXT: fcmgt p11.d, p0/z, z15.d, z1.d1404; CHECK-NEXT: sel z8.d, p12, z27.d, z12.d1405; CHECK-NEXT: fcmge p4.d, p0/z, z9.d, z25.d1406; CHECK-NEXT: sel z12.d, p5, z27.d, z16.d1407; CHECK-NEXT: fcmge p6.d, p0/z, z14.d, z25.d1408; CHECK-NEXT: fcvtzs z23.d, p3/m, z10.d1409; CHECK-NEXT: fcmge p7.d, p0/z, z13.d, z25.d1410; CHECK-NEXT: fcvtzs z26.d, p4/m, z9.d1411; CHECK-NEXT: fcmuo p1.d, p0/z, z15.d, z15.d1412; CHECK-NEXT: sel z15.d, p11, z27.d, z17.d1413; CHECK-NEXT: fcvtzs z11.d, p6/m, z14.d1414; CHECK-NEXT: fcmge p2.d, p0/z, z0.d, z25.d1415; CHECK-NEXT: mov z25.d, #0x80000000000000001416; CHECK-NEXT: fcmgt p4.d, p0/z, z9.d, z1.d1417; CHECK-NEXT: mov z15.d, p1/m, #0 // =0x01418; CHECK-NEXT: fcmgt p5.d, p0/z, z10.d, z1.d1419; CHECK-NEXT: fcmgt p3.d, p0/z, z19.d, z1.d1420; CHECK-NEXT: fcvtzs z25.d, p2/m, z0.d1421; CHECK-NEXT: str z15, [x8, #8, mul vl]1422; CHECK-NEXT: mov z26.d, p4/m, z27.d1423; CHECK-NEXT: fcmuo p9.d, p0/z, z20.d, z20.d1424; CHECK-NEXT: mov z20.d, #0x80000000000000001425; CHECK-NEXT: fcmuo p1.d, p0/z, z9.d, z9.d1426; CHECK-NEXT: sel z9.d, p5, z27.d, z23.d1427; CHECK-NEXT: fcmuo p2.d, p0/z, z10.d, z10.d1428; CHECK-NEXT: sel z10.d, p3, z27.d, z22.d1429; CHECK-NEXT: fcmuo p6.d, p0/z, z19.d, z19.d1430; CHECK-NEXT: fcvtzs z20.d, p7/m, z13.d1431; CHECK-NEXT: mov z12.d, p9/m, #0 // =0x01432; CHECK-NEXT: mov z26.d, p1/m, #0 // =0x01433; CHECK-NEXT: mov z9.d, p2/m, #0 // =0x01434; CHECK-NEXT: str z12, [x8, #7, mul vl]1435; CHECK-NEXT: mov z10.d, p6/m, #0 // =0x01436; CHECK-NEXT: fcmgt p4.d, p0/z, z14.d, z1.d1437; CHECK-NEXT: str z26, [x8, #15, mul vl]1438; CHECK-NEXT: fcmgt p3.d, p0/z, z0.d, z1.d1439; CHECK-NEXT: str z9, [x8, #14, mul vl]1440; CHECK-NEXT: fcmgt p1.d, p0/z, z18.d, z1.d1441; CHECK-NEXT: str z10, [x8, #13, mul vl]1442; CHECK-NEXT: fcmgt p2.d, p0/z, z13.d, z1.d1443; CHECK-NEXT: fcmuo p5.d, p0/z, z14.d, z14.d1444; CHECK-NEXT: fcmuo p6.d, p0/z, z0.d, z0.d1445; CHECK-NEXT: sel z0.d, p4, z27.d, z11.d1446; CHECK-NEXT: mov z25.d, p3/m, z27.d1447; CHECK-NEXT: sel z26.d, p1, z27.d, z21.d1448; CHECK-NEXT: sel z9.d, p2, z27.d, z20.d1449; CHECK-NEXT: fcmuo p4.d, p0/z, z18.d, z18.d1450; CHECK-NEXT: mov z0.d, p5/m, #0 // =0x01451; CHECK-NEXT: mov z25.d, p6/m, #0 // =0x01452; CHECK-NEXT: fcmuo p3.d, p0/z, z13.d, z13.d1453; CHECK-NEXT: fcmgt p1.d, p0/z, z3.d, z1.d1454; CHECK-NEXT: str z0, [x8, #9, mul vl]1455; CHECK-NEXT: mov z26.d, p4/m, #0 // =0x01456; CHECK-NEXT: str z25, [x8, #12, mul vl]1457; CHECK-NEXT: fcmgt p2.d, p0/z, z4.d, z1.d1458; CHECK-NEXT: mov z9.d, p3/m, #0 // =0x01459; CHECK-NEXT: fcmgt p4.d, p0/z, z7.d, z1.d1460; CHECK-NEXT: str z26, [x8, #11, mul vl]1461; CHECK-NEXT: mov z2.d, p1/m, z27.d1462; CHECK-NEXT: fcmuo p3.d, p0/z, z28.d, z28.d1463; CHECK-NEXT: fcmgt p6.d, p0/z, z29.d, z1.d1464; CHECK-NEXT: str z9, [x8, #10, mul vl]1465; CHECK-NEXT: mov z6.d, p2/m, z27.d1466; CHECK-NEXT: fcmgt p1.d, p0/z, z5.d, z1.d1467; CHECK-NEXT: ldr z1, [sp] // 16-byte Folded Reload1468; CHECK-NEXT: str z30, [x8, #4, mul vl]1469; CHECK-NEXT: fcmuo p5.d, p0/z, z29.d, z29.d1470; CHECK-NEXT: sel z0.d, p4, z27.d, z24.d1471; CHECK-NEXT: mov z8.d, p3/m, #0 // =0x01472; CHECK-NEXT: fcmuo p2.d, p0/z, z7.d, z7.d1473; CHECK-NEXT: sel z25.d, p6, z27.d, z31.d1474; CHECK-NEXT: mov z1.d, p1/m, z27.d1475; CHECK-NEXT: fcmuo p3.d, p0/z, z4.d, z4.d1476; CHECK-NEXT: str z8, [x8, #5, mul vl]1477; CHECK-NEXT: fcmuo p4.d, p0/z, z3.d, z3.d1478; CHECK-NEXT: mov z25.d, p5/m, #0 // =0x01479; CHECK-NEXT: mov z0.d, p2/m, #0 // =0x01480; CHECK-NEXT: fcmuo p0.d, p0/z, z5.d, z5.d1481; CHECK-NEXT: mov z6.d, p3/m, #0 // =0x01482; CHECK-NEXT: str z25, [x8, #6, mul vl]1483; CHECK-NEXT: mov z2.d, p4/m, #0 // =0x01484; CHECK-NEXT: str z0, [x8, #3, mul vl]1485; CHECK-NEXT: mov z1.d, p0/m, #0 // =0x01486; CHECK-NEXT: str z6, [x8, #2, mul vl]1487; CHECK-NEXT: str z2, [x8, #1, mul vl]1488; CHECK-NEXT: str z1, [x8]1489; CHECK-NEXT: addvl sp, sp, #11490; CHECK-NEXT: ldr z23, [sp, #2, mul vl] // 16-byte Folded Reload1491; CHECK-NEXT: ldr z22, [sp, #3, mul vl] // 16-byte Folded Reload1492; CHECK-NEXT: ldr z21, [sp, #4, mul vl] // 16-byte Folded Reload1493; CHECK-NEXT: ldr z20, [sp, #5, mul vl] // 16-byte Folded Reload1494; CHECK-NEXT: ldr z19, [sp, #6, mul vl] // 16-byte Folded Reload1495; CHECK-NEXT: ldr z18, [sp, #7, mul vl] // 16-byte Folded Reload1496; CHECK-NEXT: ldr z17, [sp, #8, mul vl] // 16-byte Folded Reload1497; CHECK-NEXT: ldr z16, [sp, #9, mul vl] // 16-byte Folded Reload1498; CHECK-NEXT: ldr z15, [sp, #10, mul vl] // 16-byte Folded Reload1499; CHECK-NEXT: ldr z14, [sp, #11, mul vl] // 16-byte Folded Reload1500; CHECK-NEXT: ldr z13, [sp, #12, mul vl] // 16-byte Folded Reload1501; CHECK-NEXT: ldr z12, [sp, #13, mul vl] // 16-byte Folded Reload1502; CHECK-NEXT: ldr z11, [sp, #14, mul vl] // 16-byte Folded Reload1503; CHECK-NEXT: ldr z10, [sp, #15, mul vl] // 16-byte Folded Reload1504; CHECK-NEXT: ldr z9, [sp, #16, mul vl] // 16-byte Folded Reload1505; CHECK-NEXT: ldr z8, [sp, #17, mul vl] // 16-byte Folded Reload1506; CHECK-NEXT: ldr p12, [sp, #7, mul vl] // 2-byte Reload1507; CHECK-NEXT: ldr p11, [sp, #8, mul vl] // 2-byte Reload1508; CHECK-NEXT: ldr p10, [sp, #9, mul vl] // 2-byte Reload1509; CHECK-NEXT: ldr p9, [sp, #10, mul vl] // 2-byte Reload1510; CHECK-NEXT: ldr p8, [sp, #11, mul vl] // 2-byte Reload1511; CHECK-NEXT: ldr p7, [sp, #12, mul vl] // 2-byte Reload1512; CHECK-NEXT: ldr p6, [sp, #13, mul vl] // 2-byte Reload1513; CHECK-NEXT: ldr p5, [sp, #14, mul vl] // 2-byte Reload1514; CHECK-NEXT: ldr p4, [sp, #15, mul vl] // 2-byte Reload1515; CHECK-NEXT: addvl sp, sp, #181516; CHECK-NEXT: ldr x29, [sp], #16 // 8-byte Folded Reload1517; CHECK-NEXT: ret1518 %a = call <vscale x 32 x i64> @llvm.llrint.nxv32i64.nxv16f64(<vscale x 32 x double> %x)1519 ret <vscale x 32 x i64> %a1520}1521declare <vscale x 32 x i64> @llvm.llrint.nxv32i64.nxv32f64(<vscale x 32 x double>)1522