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1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py2; RUN: llc -mtriple=aarch64-linux-gnu -mattr=+sve < %s | FileCheck %s3 4;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;5; unscaled unpacked 32-bit offsets6;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;7 8define void @masked_scatter_nxv2i8_sext_offsets(<vscale x 2 x i8> %data, ptr %base, <vscale x 2 x i32> %i32offsets, <vscale x 2 x i1> %masks) nounwind {9; CHECK-LABEL: masked_scatter_nxv2i8_sext_offsets:10; CHECK: // %bb.0:11; CHECK-NEXT: st1b { z0.d }, p0, [x0, z1.d, sxtw]12; CHECK-NEXT: ret13 %offsets = sext <vscale x 2 x i32> %i32offsets to <vscale x 2 x i64>14 %byte_ptrs = getelementptr i8, ptr %base, <vscale x 2 x i64> %offsets15 %ptrs = bitcast <vscale x 2 x ptr> %byte_ptrs to <vscale x 2 x ptr>16 call void @llvm.masked.scatter.nxv2i8(<vscale x 2 x i8> %data, <vscale x 2 x ptr> %ptrs, i32 0, <vscale x 2 x i1> %masks)17 ret void18}19 20define void @masked_scatter_nxv2i16_sext_offsets(<vscale x 2 x i16> %data, ptr %base, <vscale x 2 x i32> %i32offsets, <vscale x 2 x i1> %masks) nounwind {21; CHECK-LABEL: masked_scatter_nxv2i16_sext_offsets:22; CHECK: // %bb.0:23; CHECK-NEXT: st1h { z0.d }, p0, [x0, z1.d, sxtw]24; CHECK-NEXT: ret25 %offsets = sext <vscale x 2 x i32> %i32offsets to <vscale x 2 x i64>26 %byte_ptrs = getelementptr i8, ptr %base, <vscale x 2 x i64> %offsets27 %ptrs = bitcast <vscale x 2 x ptr> %byte_ptrs to <vscale x 2 x ptr>28 call void @llvm.masked.scatter.nxv2i16(<vscale x 2 x i16> %data, <vscale x 2 x ptr> %ptrs, i32 0, <vscale x 2 x i1> %masks)29 ret void30}31 32define void @masked_scatter_nxv2i32_sext_offsets(<vscale x 2 x i32> %data, ptr %base, <vscale x 2 x i32> %i32offsets, <vscale x 2 x i1> %masks) nounwind {33; CHECK-LABEL: masked_scatter_nxv2i32_sext_offsets:34; CHECK: // %bb.0:35; CHECK-NEXT: st1w { z0.d }, p0, [x0, z1.d, sxtw]36; CHECK-NEXT: ret37 %offsets = sext <vscale x 2 x i32> %i32offsets to <vscale x 2 x i64>38 %byte_ptrs = getelementptr i8, ptr %base, <vscale x 2 x i64> %offsets39 %ptrs = bitcast <vscale x 2 x ptr> %byte_ptrs to <vscale x 2 x ptr>40 call void @llvm.masked.scatter.nxv2i32(<vscale x 2 x i32> %data, <vscale x 2 x ptr> %ptrs, i32 0, <vscale x 2 x i1> %masks)41 ret void42}43 44define void @masked_scatter_nxv2i64_sext_offsets(<vscale x 2 x i64> %data, ptr %base, <vscale x 2 x i32> %i32offsets, <vscale x 2 x i1> %masks) nounwind {45; CHECK-LABEL: masked_scatter_nxv2i64_sext_offsets:46; CHECK: // %bb.0:47; CHECK-NEXT: st1d { z0.d }, p0, [x0, z1.d, sxtw]48; CHECK-NEXT: ret49 %offsets = sext <vscale x 2 x i32> %i32offsets to <vscale x 2 x i64>50 %byte_ptrs = getelementptr i8, ptr %base, <vscale x 2 x i64> %offsets51 %ptrs = bitcast <vscale x 2 x ptr> %byte_ptrs to <vscale x 2 x ptr>52 call void @llvm.masked.scatter.nxv2i64(<vscale x 2 x i64> %data, <vscale x 2 x ptr> %ptrs, i32 0, <vscale x 2 x i1> %masks)53 ret void54}55 56define void @masked_scatter_nxv2f16_sext_offsets(<vscale x 2 x half> %data, ptr %base, <vscale x 2 x i32> %i32offsets, <vscale x 2 x i1> %masks) nounwind {57; CHECK-LABEL: masked_scatter_nxv2f16_sext_offsets:58; CHECK: // %bb.0:59; CHECK-NEXT: st1h { z0.d }, p0, [x0, z1.d, sxtw]60; CHECK-NEXT: ret61 %offsets = sext <vscale x 2 x i32> %i32offsets to <vscale x 2 x i64>62 %byte_ptrs = getelementptr i8, ptr %base, <vscale x 2 x i64> %offsets63 %ptrs = bitcast <vscale x 2 x ptr> %byte_ptrs to <vscale x 2 x ptr>64 call void @llvm.masked.scatter.nxv2f16(<vscale x 2 x half> %data, <vscale x 2 x ptr> %ptrs, i32 0, <vscale x 2 x i1> %masks)65 ret void66}67 68define void @masked_scatter_nxv2bf16_sext_offsets(<vscale x 2 x bfloat> %data, ptr %base, <vscale x 2 x i32> %i32offsets, <vscale x 2 x i1> %masks) nounwind #0 {69; CHECK-LABEL: masked_scatter_nxv2bf16_sext_offsets:70; CHECK: // %bb.0:71; CHECK-NEXT: st1h { z0.d }, p0, [x0, z1.d, sxtw]72; CHECK-NEXT: ret73 %offsets = sext <vscale x 2 x i32> %i32offsets to <vscale x 2 x i64>74 %byte_ptrs = getelementptr i8, ptr %base, <vscale x 2 x i64> %offsets75 %ptrs = bitcast <vscale x 2 x ptr> %byte_ptrs to <vscale x 2 x ptr>76 call void @llvm.masked.scatter.nxv2bf16(<vscale x 2 x bfloat> %data, <vscale x 2 x ptr> %ptrs, i32 0, <vscale x 2 x i1> %masks)77 ret void78}79 80define void @masked_scatter_nxv2f32_sext_offsets(<vscale x 2 x float> %data, ptr %base, <vscale x 2 x i32> %i32offsets, <vscale x 2 x i1> %masks) nounwind {81; CHECK-LABEL: masked_scatter_nxv2f32_sext_offsets:82; CHECK: // %bb.0:83; CHECK-NEXT: st1w { z0.d }, p0, [x0, z1.d, sxtw]84; CHECK-NEXT: ret85 %offsets = sext <vscale x 2 x i32> %i32offsets to <vscale x 2 x i64>86 %byte_ptrs = getelementptr i8, ptr %base, <vscale x 2 x i64> %offsets87 %ptrs = bitcast <vscale x 2 x ptr> %byte_ptrs to <vscale x 2 x ptr>88 call void @llvm.masked.scatter.nxv2f32(<vscale x 2 x float> %data, <vscale x 2 x ptr> %ptrs, i32 0, <vscale x 2 x i1> %masks)89 ret void90}91 92define void @masked_scatter_nxv2f64_sext_offsets(<vscale x 2 x double> %data, ptr %base, <vscale x 2 x i32> %i32offsets, <vscale x 2 x i1> %masks) nounwind {93; CHECK-LABEL: masked_scatter_nxv2f64_sext_offsets:94; CHECK: // %bb.0:95; CHECK-NEXT: st1d { z0.d }, p0, [x0, z1.d, sxtw]96; CHECK-NEXT: ret97 %offsets = sext <vscale x 2 x i32> %i32offsets to <vscale x 2 x i64>98 %byte_ptrs = getelementptr i8, ptr %base, <vscale x 2 x i64> %offsets99 %ptrs = bitcast <vscale x 2 x ptr> %byte_ptrs to <vscale x 2 x ptr>100 call void @llvm.masked.scatter.nxv2f64(<vscale x 2 x double> %data, <vscale x 2 x ptr> %ptrs, i32 0, <vscale x 2 x i1> %masks)101 ret void102}103 104define void @masked_scatter_nxv2i8_zext_offsets(<vscale x 2 x i8> %data, ptr %base, <vscale x 2 x i32> %i32offsets, <vscale x 2 x i1> %masks) nounwind {105; CHECK-LABEL: masked_scatter_nxv2i8_zext_offsets:106; CHECK: // %bb.0:107; CHECK-NEXT: st1b { z0.d }, p0, [x0, z1.d, uxtw]108; CHECK-NEXT: ret109 %offsets = zext <vscale x 2 x i32> %i32offsets to <vscale x 2 x i64>110 %byte_ptrs = getelementptr i8, ptr %base, <vscale x 2 x i64> %offsets111 %ptrs = bitcast <vscale x 2 x ptr> %byte_ptrs to <vscale x 2 x ptr>112 call void @llvm.masked.scatter.nxv2i8(<vscale x 2 x i8> %data, <vscale x 2 x ptr> %ptrs, i32 0, <vscale x 2 x i1> %masks)113 ret void114}115 116define void @masked_scatter_nxv2i16_zext_offsets(<vscale x 2 x i16> %data, ptr %base, <vscale x 2 x i32> %i32offsets, <vscale x 2 x i1> %masks) nounwind {117; CHECK-LABEL: masked_scatter_nxv2i16_zext_offsets:118; CHECK: // %bb.0:119; CHECK-NEXT: st1h { z0.d }, p0, [x0, z1.d, uxtw]120; CHECK-NEXT: ret121 %offsets = zext <vscale x 2 x i32> %i32offsets to <vscale x 2 x i64>122 %byte_ptrs = getelementptr i8, ptr %base, <vscale x 2 x i64> %offsets123 %ptrs = bitcast <vscale x 2 x ptr> %byte_ptrs to <vscale x 2 x ptr>124 call void @llvm.masked.scatter.nxv2i16(<vscale x 2 x i16> %data, <vscale x 2 x ptr> %ptrs, i32 0, <vscale x 2 x i1> %masks)125 ret void126}127 128define void @masked_scatter_nxv2i32_zext_offsets(<vscale x 2 x i32> %data, ptr %base, <vscale x 2 x i32> %i32offsets, <vscale x 2 x i1> %masks) nounwind {129; CHECK-LABEL: masked_scatter_nxv2i32_zext_offsets:130; CHECK: // %bb.0:131; CHECK-NEXT: st1w { z0.d }, p0, [x0, z1.d, uxtw]132; CHECK-NEXT: ret133 %offsets = zext <vscale x 2 x i32> %i32offsets to <vscale x 2 x i64>134 %byte_ptrs = getelementptr i8, ptr %base, <vscale x 2 x i64> %offsets135 %ptrs = bitcast <vscale x 2 x ptr> %byte_ptrs to <vscale x 2 x ptr>136 call void @llvm.masked.scatter.nxv2i32(<vscale x 2 x i32> %data, <vscale x 2 x ptr> %ptrs, i32 0, <vscale x 2 x i1> %masks)137 ret void138}139 140define void @masked_scatter_nxv2i64_zext_offsets(<vscale x 2 x i64> %data, ptr %base, <vscale x 2 x i32> %i32offsets, <vscale x 2 x i1> %masks) nounwind {141; CHECK-LABEL: masked_scatter_nxv2i64_zext_offsets:142; CHECK: // %bb.0:143; CHECK-NEXT: st1d { z0.d }, p0, [x0, z1.d, uxtw]144; CHECK-NEXT: ret145 %offsets = zext <vscale x 2 x i32> %i32offsets to <vscale x 2 x i64>146 %byte_ptrs = getelementptr i8, ptr %base, <vscale x 2 x i64> %offsets147 %ptrs = bitcast <vscale x 2 x ptr> %byte_ptrs to <vscale x 2 x ptr>148 call void @llvm.masked.scatter.nxv2i64(<vscale x 2 x i64> %data, <vscale x 2 x ptr> %ptrs, i32 0, <vscale x 2 x i1> %masks)149 ret void150}151 152define void @masked_scatter_nxv2f16_zext_offsets(<vscale x 2 x half> %data, ptr %base, <vscale x 2 x i32> %i32offsets, <vscale x 2 x i1> %masks) nounwind {153; CHECK-LABEL: masked_scatter_nxv2f16_zext_offsets:154; CHECK: // %bb.0:155; CHECK-NEXT: st1h { z0.d }, p0, [x0, z1.d, uxtw]156; CHECK-NEXT: ret157 %offsets = zext <vscale x 2 x i32> %i32offsets to <vscale x 2 x i64>158 %byte_ptrs = getelementptr i8, ptr %base, <vscale x 2 x i64> %offsets159 %ptrs = bitcast <vscale x 2 x ptr> %byte_ptrs to <vscale x 2 x ptr>160 call void @llvm.masked.scatter.nxv2f16(<vscale x 2 x half> %data, <vscale x 2 x ptr> %ptrs, i32 0, <vscale x 2 x i1> %masks)161 ret void162}163 164define void @masked_scatter_nxv2bf16_zext_offsets(<vscale x 2 x bfloat> %data, ptr %base, <vscale x 2 x i32> %i32offsets, <vscale x 2 x i1> %masks) nounwind #0 {165; CHECK-LABEL: masked_scatter_nxv2bf16_zext_offsets:166; CHECK: // %bb.0:167; CHECK-NEXT: st1h { z0.d }, p0, [x0, z1.d, uxtw]168; CHECK-NEXT: ret169 %offsets = zext <vscale x 2 x i32> %i32offsets to <vscale x 2 x i64>170 %byte_ptrs = getelementptr i8, ptr %base, <vscale x 2 x i64> %offsets171 %ptrs = bitcast <vscale x 2 x ptr> %byte_ptrs to <vscale x 2 x ptr>172 call void @llvm.masked.scatter.nxv2bf16(<vscale x 2 x bfloat> %data, <vscale x 2 x ptr> %ptrs, i32 0, <vscale x 2 x i1> %masks)173 ret void174}175 176define void @masked_scatter_nxv2f32_zext_offsets(<vscale x 2 x float> %data, ptr %base, <vscale x 2 x i32> %i32offsets, <vscale x 2 x i1> %masks) nounwind {177; CHECK-LABEL: masked_scatter_nxv2f32_zext_offsets:178; CHECK: // %bb.0:179; CHECK-NEXT: st1w { z0.d }, p0, [x0, z1.d, uxtw]180; CHECK-NEXT: ret181 %offsets = zext <vscale x 2 x i32> %i32offsets to <vscale x 2 x i64>182 %byte_ptrs = getelementptr i8, ptr %base, <vscale x 2 x i64> %offsets183 %ptrs = bitcast <vscale x 2 x ptr> %byte_ptrs to <vscale x 2 x ptr>184 call void @llvm.masked.scatter.nxv2f32(<vscale x 2 x float> %data, <vscale x 2 x ptr> %ptrs, i32 0, <vscale x 2 x i1> %masks)185 ret void186}187 188define void @masked_scatter_nxv2f64_zext_offsets(<vscale x 2 x double> %data, ptr %base, <vscale x 2 x i32> %i32offsets, <vscale x 2 x i1> %masks) nounwind {189; CHECK-LABEL: masked_scatter_nxv2f64_zext_offsets:190; CHECK: // %bb.0:191; CHECK-NEXT: st1d { z0.d }, p0, [x0, z1.d, uxtw]192; CHECK-NEXT: ret193 %offsets = zext <vscale x 2 x i32> %i32offsets to <vscale x 2 x i64>194 %byte_ptrs = getelementptr i8, ptr %base, <vscale x 2 x i64> %offsets195 %ptrs = bitcast <vscale x 2 x ptr> %byte_ptrs to <vscale x 2 x ptr>196 call void @llvm.masked.scatter.nxv2f64(<vscale x 2 x double> %data, <vscale x 2 x ptr> %ptrs, i32 0, <vscale x 2 x i1> %masks)197 ret void198}199 200;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;201; unscaled packed 32-bit offsets202;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;203define void @masked_scatter_nxv4i8_sext_offsets(<vscale x 4 x i8> %data, ptr %base, <vscale x 4 x i32> %i32offsets, <vscale x 4 x i1> %masks) nounwind {204; CHECK-LABEL: masked_scatter_nxv4i8_sext_offsets:205; CHECK: // %bb.0:206; CHECK-NEXT: st1b { z0.s }, p0, [x0, z1.s, sxtw]207; CHECK-NEXT: ret208 %offsets = sext <vscale x 4 x i32> %i32offsets to <vscale x 4 x i64>209 %byte_ptrs = getelementptr i8, ptr %base, <vscale x 4 x i64> %offsets210 %ptrs = bitcast <vscale x 4 x ptr> %byte_ptrs to <vscale x 4 x ptr>211 call void @llvm.masked.scatter.nxv4i8(<vscale x 4 x i8> %data, <vscale x 4 x ptr> %ptrs, i32 0, <vscale x 4 x i1> %masks)212 ret void213}214 215define void @masked_scatter_nxv4i16_sext_offsets(<vscale x 4 x i16> %data, ptr %base, <vscale x 4 x i32> %i32offsets, <vscale x 4 x i1> %masks) nounwind {216; CHECK-LABEL: masked_scatter_nxv4i16_sext_offsets:217; CHECK: // %bb.0:218; CHECK-NEXT: st1h { z0.s }, p0, [x0, z1.s, sxtw]219; CHECK-NEXT: ret220 %offsets = sext <vscale x 4 x i32> %i32offsets to <vscale x 4 x i64>221 %byte_ptrs = getelementptr i8, ptr %base, <vscale x 4 x i64> %offsets222 %ptrs = bitcast <vscale x 4 x ptr> %byte_ptrs to <vscale x 4 x ptr>223 call void @llvm.masked.scatter.nxv4i16(<vscale x 4 x i16> %data, <vscale x 4 x ptr> %ptrs, i32 0, <vscale x 4 x i1> %masks)224 ret void225}226 227define void @masked_scatter_nxv4i32_sext_offsets(<vscale x 4 x i32> %data, ptr %base, <vscale x 4 x i32> %i32offsets, <vscale x 4 x i1> %masks) nounwind {228; CHECK-LABEL: masked_scatter_nxv4i32_sext_offsets:229; CHECK: // %bb.0:230; CHECK-NEXT: st1w { z0.s }, p0, [x0, z1.s, sxtw]231; CHECK-NEXT: ret232 %offsets = sext <vscale x 4 x i32> %i32offsets to <vscale x 4 x i64>233 %byte_ptrs = getelementptr i8, ptr %base, <vscale x 4 x i64> %offsets234 %ptrs = bitcast <vscale x 4 x ptr> %byte_ptrs to <vscale x 4 x ptr>235 call void @llvm.masked.scatter.nxv4i32(<vscale x 4 x i32> %data, <vscale x 4 x ptr> %ptrs, i32 0, <vscale x 4 x i1> %masks)236 ret void237}238 239define void @masked_scatter_nxv4f16_sext_offsets(<vscale x 4 x half> %data, ptr %base, <vscale x 4 x i32> %i32offsets, <vscale x 4 x i1> %masks) nounwind {240; CHECK-LABEL: masked_scatter_nxv4f16_sext_offsets:241; CHECK: // %bb.0:242; CHECK-NEXT: st1h { z0.s }, p0, [x0, z1.s, sxtw]243; CHECK-NEXT: ret244 %offsets = sext <vscale x 4 x i32> %i32offsets to <vscale x 4 x i64>245 %byte_ptrs = getelementptr i8, ptr %base, <vscale x 4 x i64> %offsets246 %ptrs = bitcast <vscale x 4 x ptr> %byte_ptrs to <vscale x 4 x ptr>247 call void @llvm.masked.scatter.nxv4f16(<vscale x 4 x half> %data, <vscale x 4 x ptr> %ptrs, i32 0, <vscale x 4 x i1> %masks)248 ret void249}250 251define void @masked_scatter_nxv4bf16_sext_offsets(<vscale x 4 x bfloat> %data, ptr %base, <vscale x 4 x i32> %i32offsets, <vscale x 4 x i1> %masks) nounwind #0 {252; CHECK-LABEL: masked_scatter_nxv4bf16_sext_offsets:253; CHECK: // %bb.0:254; CHECK-NEXT: st1h { z0.s }, p0, [x0, z1.s, sxtw]255; CHECK-NEXT: ret256 %offsets = sext <vscale x 4 x i32> %i32offsets to <vscale x 4 x i64>257 %byte_ptrs = getelementptr i8, ptr %base, <vscale x 4 x i64> %offsets258 %ptrs = bitcast <vscale x 4 x ptr> %byte_ptrs to <vscale x 4 x ptr>259 call void @llvm.masked.scatter.nxv4bf16(<vscale x 4 x bfloat> %data, <vscale x 4 x ptr> %ptrs, i32 0, <vscale x 4 x i1> %masks)260 ret void261}262 263define void @masked_scatter_nxv4f32_sext_offsets(<vscale x 4 x float> %data, ptr %base, <vscale x 4 x i32> %i32offsets, <vscale x 4 x i1> %masks) nounwind #0 {264; CHECK-LABEL: masked_scatter_nxv4f32_sext_offsets:265; CHECK: // %bb.0:266; CHECK-NEXT: st1w { z0.s }, p0, [x0, z1.s, sxtw]267; CHECK-NEXT: ret268 %offsets = sext <vscale x 4 x i32> %i32offsets to <vscale x 4 x i64>269 %byte_ptrs = getelementptr i8, ptr %base, <vscale x 4 x i64> %offsets270 %ptrs = bitcast <vscale x 4 x ptr> %byte_ptrs to <vscale x 4 x ptr>271 call void @llvm.masked.scatter.nxv4f32(<vscale x 4 x float> %data, <vscale x 4 x ptr> %ptrs, i32 0, <vscale x 4 x i1> %masks)272 ret void273}274 275define void @masked_scatter_nxv4i8_zext_offsets(<vscale x 4 x i8> %data, ptr %base, <vscale x 4 x i32> %i32offsets, <vscale x 4 x i1> %masks) nounwind {276; CHECK-LABEL: masked_scatter_nxv4i8_zext_offsets:277; CHECK: // %bb.0:278; CHECK-NEXT: st1b { z0.s }, p0, [x0, z1.s, uxtw]279; CHECK-NEXT: ret280 %offsets = zext <vscale x 4 x i32> %i32offsets to <vscale x 4 x i64>281 %byte_ptrs = getelementptr i8, ptr %base, <vscale x 4 x i64> %offsets282 %ptrs = bitcast <vscale x 4 x ptr> %byte_ptrs to <vscale x 4 x ptr>283 call void @llvm.masked.scatter.nxv4i8(<vscale x 4 x i8> %data, <vscale x 4 x ptr> %ptrs, i32 0, <vscale x 4 x i1> %masks)284 ret void285}286 287define void @masked_scatter_nxv4i16_zext_offsets(<vscale x 4 x i16> %data, ptr %base, <vscale x 4 x i32> %i32offsets, <vscale x 4 x i1> %masks) nounwind {288; CHECK-LABEL: masked_scatter_nxv4i16_zext_offsets:289; CHECK: // %bb.0:290; CHECK-NEXT: st1h { z0.s }, p0, [x0, z1.s, uxtw]291; CHECK-NEXT: ret292 %offsets = zext <vscale x 4 x i32> %i32offsets to <vscale x 4 x i64>293 %byte_ptrs = getelementptr i8, ptr %base, <vscale x 4 x i64> %offsets294 %ptrs = bitcast <vscale x 4 x ptr> %byte_ptrs to <vscale x 4 x ptr>295 call void @llvm.masked.scatter.nxv4i16(<vscale x 4 x i16> %data, <vscale x 4 x ptr> %ptrs, i32 0, <vscale x 4 x i1> %masks)296 ret void297}298 299define void @masked_scatter_nxv4i32_zext_offsets(<vscale x 4 x i32> %data, ptr %base, <vscale x 4 x i32> %i32offsets, <vscale x 4 x i1> %masks) nounwind {300; CHECK-LABEL: masked_scatter_nxv4i32_zext_offsets:301; CHECK: // %bb.0:302; CHECK-NEXT: st1w { z0.s }, p0, [x0, z1.s, uxtw]303; CHECK-NEXT: ret304 %offsets = zext <vscale x 4 x i32> %i32offsets to <vscale x 4 x i64>305 %byte_ptrs = getelementptr i8, ptr %base, <vscale x 4 x i64> %offsets306 %ptrs = bitcast <vscale x 4 x ptr> %byte_ptrs to <vscale x 4 x ptr>307 call void @llvm.masked.scatter.nxv4i32(<vscale x 4 x i32> %data, <vscale x 4 x ptr> %ptrs, i32 0, <vscale x 4 x i1> %masks)308 ret void309}310 311define void @masked_scatter_nxv4f16_zext_offsets(<vscale x 4 x half> %data, ptr %base, <vscale x 4 x i32> %i32offsets, <vscale x 4 x i1> %masks) nounwind {312; CHECK-LABEL: masked_scatter_nxv4f16_zext_offsets:313; CHECK: // %bb.0:314; CHECK-NEXT: st1h { z0.s }, p0, [x0, z1.s, uxtw]315; CHECK-NEXT: ret316 %offsets = zext <vscale x 4 x i32> %i32offsets to <vscale x 4 x i64>317 %byte_ptrs = getelementptr i8, ptr %base, <vscale x 4 x i64> %offsets318 %ptrs = bitcast <vscale x 4 x ptr> %byte_ptrs to <vscale x 4 x ptr>319 call void @llvm.masked.scatter.nxv4f16(<vscale x 4 x half> %data, <vscale x 4 x ptr> %ptrs, i32 0, <vscale x 4 x i1> %masks)320 ret void321}322 323define void @masked_scatter_nxv4bf16_zext_offsets(<vscale x 4 x bfloat> %data, ptr %base, <vscale x 4 x i32> %i32offsets, <vscale x 4 x i1> %masks) nounwind #0 {324; CHECK-LABEL: masked_scatter_nxv4bf16_zext_offsets:325; CHECK: // %bb.0:326; CHECK-NEXT: st1h { z0.s }, p0, [x0, z1.s, uxtw]327; CHECK-NEXT: ret328 %offsets = zext <vscale x 4 x i32> %i32offsets to <vscale x 4 x i64>329 %byte_ptrs = getelementptr i8, ptr %base, <vscale x 4 x i64> %offsets330 %ptrs = bitcast <vscale x 4 x ptr> %byte_ptrs to <vscale x 4 x ptr>331 call void @llvm.masked.scatter.nxv4bf16(<vscale x 4 x bfloat> %data, <vscale x 4 x ptr> %ptrs, i32 0, <vscale x 4 x i1> %masks)332 ret void333}334 335define void @masked_scatter_nxv4f32_zext_offsets(<vscale x 4 x float> %data, ptr %base, <vscale x 4 x i32> %i32offsets, <vscale x 4 x i1> %masks) nounwind #0 {336; CHECK-LABEL: masked_scatter_nxv4f32_zext_offsets:337; CHECK: // %bb.0:338; CHECK-NEXT: st1w { z0.s }, p0, [x0, z1.s, uxtw]339; CHECK-NEXT: ret340 %offsets = zext <vscale x 4 x i32> %i32offsets to <vscale x 4 x i64>341 %byte_ptrs = getelementptr i8, ptr %base, <vscale x 4 x i64> %offsets342 %ptrs = bitcast <vscale x 4 x ptr> %byte_ptrs to <vscale x 4 x ptr>343 call void @llvm.masked.scatter.nxv4f32(<vscale x 4 x float> %data, <vscale x 4 x ptr> %ptrs, i32 0, <vscale x 4 x i1> %masks)344 ret void345}346 347declare void @llvm.masked.scatter.nxv2f16(<vscale x 2 x half>, <vscale x 2 x ptr>, i32, <vscale x 2 x i1>)348declare void @llvm.masked.scatter.nxv4f16(<vscale x 4 x half>, <vscale x 4 x ptr>, i32, <vscale x 4 x i1>)349declare void @llvm.masked.scatter.nxv4bf16(<vscale x 4 x bfloat>, <vscale x 4 x ptr>, i32, <vscale x 4 x i1>)350declare void @llvm.masked.scatter.nxv4f32(<vscale x 4 x float>, <vscale x 4 x ptr>, i32, <vscale x 4 x i1>)351declare void @llvm.masked.scatter.nxv2bf16(<vscale x 2 x bfloat>, <vscale x 2 x ptr>, i32, <vscale x 2 x i1>)352declare void @llvm.masked.scatter.nxv2f32(<vscale x 2 x float>, <vscale x 2 x ptr>, i32, <vscale x 2 x i1>)353declare void @llvm.masked.scatter.nxv2f64(<vscale x 2 x double>, <vscale x 2 x ptr>, i32, <vscale x 2 x i1>)354declare void @llvm.masked.scatter.nxv2i16(<vscale x 2 x i16>, <vscale x 2 x ptr>, i32, <vscale x 2 x i1>)355declare void @llvm.masked.scatter.nxv2i32(<vscale x 2 x i32>, <vscale x 2 x ptr>, i32, <vscale x 2 x i1>)356declare void @llvm.masked.scatter.nxv2i64(<vscale x 2 x i64>, <vscale x 2 x ptr>, i32, <vscale x 2 x i1>)357declare void @llvm.masked.scatter.nxv2i8(<vscale x 2 x i8>, <vscale x 2 x ptr>, i32, <vscale x 2 x i1>)358declare void @llvm.masked.scatter.nxv4i16(<vscale x 4 x i16>, <vscale x 4 x ptr>, i32, <vscale x 4 x i1>)359declare void @llvm.masked.scatter.nxv4i32(<vscale x 4 x i32>, <vscale x 4 x ptr>, i32, <vscale x 4 x i1>)360declare void @llvm.masked.scatter.nxv4i8(<vscale x 4 x i8>, <vscale x 4 x ptr>, i32, <vscale x 4 x i1>)361attributes #0 = { "target-features"="+sve,+bf16" }362