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1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py2; RUN: llc -mtriple=aarch64-linux-gnu -mattr=+sve < %s | FileCheck %s3 4;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;5; unscaled 64-bit offsets6;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;7 8define void @masked_scatter_nxv2i8_unscaled_64bit_offsets(<vscale x 2 x i8> %data, ptr %base, <vscale x 2 x i64> %offsets, <vscale x 2 x i1> %masks) nounwind {9; CHECK-LABEL: masked_scatter_nxv2i8_unscaled_64bit_offsets:10; CHECK: // %bb.0:11; CHECK-NEXT: st1b { z0.d }, p0, [x0, z1.d]12; CHECK-NEXT: ret13 %byte_ptrs = getelementptr i8, ptr %base, <vscale x 2 x i64> %offsets14 %ptrs = bitcast <vscale x 2 x ptr> %byte_ptrs to <vscale x 2 x ptr>15 call void @llvm.masked.scatter.nxv2i8(<vscale x 2 x i8> %data, <vscale x 2 x ptr> %ptrs, i32 0, <vscale x 2 x i1> %masks)16 ret void17}18 19define void @masked_scatter_nxv2i16_unscaled_64bit_offsets(<vscale x 2 x i16> %data, ptr %base, <vscale x 2 x i64> %offsets, <vscale x 2 x i1> %masks) nounwind {20; CHECK-LABEL: masked_scatter_nxv2i16_unscaled_64bit_offsets:21; CHECK: // %bb.0:22; CHECK-NEXT: st1h { z0.d }, p0, [x0, z1.d]23; CHECK-NEXT: ret24 %byte_ptrs = getelementptr i8, ptr %base, <vscale x 2 x i64> %offsets25 %ptrs = bitcast <vscale x 2 x ptr> %byte_ptrs to <vscale x 2 x ptr>26 call void @llvm.masked.scatter.nxv2i16(<vscale x 2 x i16> %data, <vscale x 2 x ptr> %ptrs, i32 0, <vscale x 2 x i1> %masks)27 ret void28}29 30define void @masked_scatter_nxv2i32_unscaled_64bit_offsets(<vscale x 2 x i32> %data, ptr %base, <vscale x 2 x i64> %offsets, <vscale x 2 x i1> %masks) nounwind {31; CHECK-LABEL: masked_scatter_nxv2i32_unscaled_64bit_offsets:32; CHECK: // %bb.0:33; CHECK-NEXT: st1w { z0.d }, p0, [x0, z1.d]34; CHECK-NEXT: ret35 %byte_ptrs = getelementptr i8, ptr %base, <vscale x 2 x i64> %offsets36 %ptrs = bitcast <vscale x 2 x ptr> %byte_ptrs to <vscale x 2 x ptr>37 call void @llvm.masked.scatter.nxv2i32(<vscale x 2 x i32> %data, <vscale x 2 x ptr> %ptrs, i32 0, <vscale x 2 x i1> %masks)38 ret void39}40 41define void @masked_scatter_nxv2i64_unscaled_64bit_offsets(<vscale x 2 x i64> %data, ptr %base, <vscale x 2 x i64> %offsets, <vscale x 2 x i1> %masks) nounwind {42; CHECK-LABEL: masked_scatter_nxv2i64_unscaled_64bit_offsets:43; CHECK: // %bb.0:44; CHECK-NEXT: st1d { z0.d }, p0, [x0, z1.d]45; CHECK-NEXT: ret46 %byte_ptrs = getelementptr i8, ptr %base, <vscale x 2 x i64> %offsets47 %ptrs = bitcast <vscale x 2 x ptr> %byte_ptrs to <vscale x 2 x ptr>48 call void @llvm.masked.scatter.nxv2i64(<vscale x 2 x i64> %data, <vscale x 2 x ptr> %ptrs, i32 0, <vscale x 2 x i1> %masks)49 ret void50}51 52define void @masked_scatter_nxv2f16_unscaled_64bit_offsets(<vscale x 2 x half> %data, ptr %base, <vscale x 2 x i64> %offsets, <vscale x 2 x i1> %masks) nounwind {53; CHECK-LABEL: masked_scatter_nxv2f16_unscaled_64bit_offsets:54; CHECK: // %bb.0:55; CHECK-NEXT: st1h { z0.d }, p0, [x0, z1.d]56; CHECK-NEXT: ret57 %byte_ptrs = getelementptr i8, ptr %base, <vscale x 2 x i64> %offsets58 %ptrs = bitcast <vscale x 2 x ptr> %byte_ptrs to <vscale x 2 x ptr>59 call void @llvm.masked.scatter.nxv2f16(<vscale x 2 x half> %data, <vscale x 2 x ptr> %ptrs, i32 0, <vscale x 2 x i1> %masks)60 ret void61}62 63define void @masked_scatter_nxv2bf16_unscaled_64bit_offsets(<vscale x 2 x bfloat> %data, ptr %base, <vscale x 2 x i64> %offsets, <vscale x 2 x i1> %masks) nounwind #0 {64; CHECK-LABEL: masked_scatter_nxv2bf16_unscaled_64bit_offsets:65; CHECK: // %bb.0:66; CHECK-NEXT: st1h { z0.d }, p0, [x0, z1.d]67; CHECK-NEXT: ret68 %byte_ptrs = getelementptr i8, ptr %base, <vscale x 2 x i64> %offsets69 %ptrs = bitcast <vscale x 2 x ptr> %byte_ptrs to <vscale x 2 x ptr>70 call void @llvm.masked.scatter.nxv2bf16(<vscale x 2 x bfloat> %data, <vscale x 2 x ptr> %ptrs, i32 0, <vscale x 2 x i1> %masks)71 ret void72}73 74define void @masked_scatter_nxv2f32_unscaled_64bit_offsets(<vscale x 2 x float> %data, ptr %base, <vscale x 2 x i64> %offsets, <vscale x 2 x i1> %masks) nounwind #0 {75; CHECK-LABEL: masked_scatter_nxv2f32_unscaled_64bit_offsets:76; CHECK: // %bb.0:77; CHECK-NEXT: st1w { z0.d }, p0, [x0, z1.d]78; CHECK-NEXT: ret79 %byte_ptrs = getelementptr i8, ptr %base, <vscale x 2 x i64> %offsets80 %ptrs = bitcast <vscale x 2 x ptr> %byte_ptrs to <vscale x 2 x ptr>81 call void @llvm.masked.scatter.nxv2f32(<vscale x 2 x float> %data, <vscale x 2 x ptr> %ptrs, i32 0, <vscale x 2 x i1> %masks)82 ret void83}84 85define void @masked_scatter_nxv2f64_unscaled_64bit_offsets(<vscale x 2 x double> %data, ptr %base, <vscale x 2 x i64> %offsets, <vscale x 2 x i1> %masks) nounwind #0 {86; CHECK-LABEL: masked_scatter_nxv2f64_unscaled_64bit_offsets:87; CHECK: // %bb.0:88; CHECK-NEXT: st1d { z0.d }, p0, [x0, z1.d]89; CHECK-NEXT: ret90 %byte_ptrs = getelementptr i8, ptr %base, <vscale x 2 x i64> %offsets91 %ptrs = bitcast <vscale x 2 x ptr> %byte_ptrs to <vscale x 2 x ptr>92 call void @llvm.masked.scatter.nxv2f64(<vscale x 2 x double> %data, <vscale x 2 x ptr> %ptrs, i32 0, <vscale x 2 x i1> %masks)93 ret void94}95 96declare void @llvm.masked.scatter.nxv2f16(<vscale x 2 x half>, <vscale x 2 x ptr>, i32, <vscale x 2 x i1>)97declare void @llvm.masked.scatter.nxv4f16(<vscale x 4 x half>, <vscale x 4 x ptr>, i32, <vscale x 4 x i1>)98declare void @llvm.masked.scatter.nxv2bf16(<vscale x 2 x bfloat>, <vscale x 2 x ptr>, i32, <vscale x 2 x i1>)99declare void @llvm.masked.scatter.nxv2f32(<vscale x 2 x float>, <vscale x 2 x ptr>, i32, <vscale x 2 x i1>)100declare void @llvm.masked.scatter.nxv2f64(<vscale x 2 x double>, <vscale x 2 x ptr>, i32, <vscale x 2 x i1>)101declare void @llvm.masked.scatter.nxv2i16(<vscale x 2 x i16>, <vscale x 2 x ptr>, i32, <vscale x 2 x i1>)102declare void @llvm.masked.scatter.nxv2i32(<vscale x 2 x i32>, <vscale x 2 x ptr>, i32, <vscale x 2 x i1>)103declare void @llvm.masked.scatter.nxv2i64(<vscale x 2 x i64>, <vscale x 2 x ptr>, i32, <vscale x 2 x i1>)104declare void @llvm.masked.scatter.nxv2i8(<vscale x 2 x i8>, <vscale x 2 x ptr>, i32, <vscale x 2 x i1>)105declare void @llvm.masked.scatter.nxv4i16(<vscale x 4 x i16>, <vscale x 4 x ptr>, i32, <vscale x 4 x i1>)106declare void @llvm.masked.scatter.nxv4i32(<vscale x 4 x i32>, <vscale x 4 x ptr>, i32, <vscale x 4 x i1>)107declare void @llvm.masked.scatter.nxv4i8(<vscale x 4 x i8>, <vscale x 4 x ptr>, i32, <vscale x 4 x i1>)108attributes #0 = { "target-features"="+sve,+bf16" }109